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Component Implementation
1 - PhaDiscnct_IntegrationManual
Integration Manual
For
PhaDiscnct
VERSION: 2.0
DATE: 03-OCT-2017
Prepared By:
Software Group,
Nexteer Automotive,
Saginaw, MI, USA
Revision History
| Sl. No. | Description | Author | Version | Date |
| 1 | Initial version | Krzysztof Byrski | 1.0 | 24-Aug-2017 |
| 2 | Updated as per Design version 1.2.0 | Krzysztof Byrski | 2.0 | 03-Oct-2017 |
Table of Contents
3.2 Global Functions(Non RTE) to be provided to Integration Project 6
4 Configuration REQUIREMeNTS 7
4.2 Configuration Files to be provided by Integration Project 7
4.3 Da Vinci Parameter Configuration Changes 7
4.4 DaVinci Interrupt Configuration Changes 7
4.5 Manual Configuration Changes 7
5 Integration DATAFLOW REQUIREMENTS 8
5.1 Required Global Data Inputs 8
5.2 Required Global Data Outputs 8
5.3 Specific Include Path present 8
Abbrevations And Acronyms
| Abbreviation | Description |
| DFD | Design functional diagram |
| MDD | Module design Document |
| FDD | Functional Design Document |
References
This section lists the title & version of all the documents that are referred for development of this document
| Sr. No. | Title | Version |
| 1 | EA4 Software Naming Conventions | 01.01.00 |
| 2 | Software Design and Coding Standards | 2.1 |
| 3 | ES330A_PhaDiscnct_Design | See Synergy Sub Project Version |
Dependencies
SWCs
| Module | Required Feature |
| ES999A_ElecGlbPrm_Impl | ElecGlbPrm.h, #define ELECGLBPRM_STRTUPSTPHADISCNCTWRMININSTRT_CNT_U08 |
Note : Referencing the external components should be avoided in most cases. Only in unavoidable circumstance external components should be referred. Developer should track the references.
Global Functions(Non RTE) to be provided to Integration Project
None
Configuration REQUIREMeNTS
Build Time Config
| Modules | Notes | |
| None |
Configuration Files to be provided by Integration Project
None
Da Vinci Parameter Configuration Changes
| Parameter | Notes | SWC |
| None |
DaVinci Interrupt Configuration Changes
| ISR Name | VIM # | Priority Dependency | Notes |
| None |
Manual Configuration Changes
| Constant | Notes | SWC |
| None |
Integration DATAFLOW REQUIREMENTS
Required Global Data Inputs
Refer FDD
Required Global Data Outputs
Refer FDD
Specific Include Path present
No
Runnable Scheduling
This section specifies the required runnable scheduling.
| Init | Scheduling Requirements | Trigger |
| PhaDiscnctInit1 | None | RTE (Init) |
| Runnable | Scheduling Requirements | Trigger |
| PhaDiscnctPer1 | None | RTE(2ms) |
| PhaDiscnctPer2 | None | RTE(2ms) |
.
Memory Map REQUIREMENTS
Mapping
| Memory Section | Contents | Notes |
| PhaDiscnct_START_SEC_CODE | Code |
* Each …START_SEC… constant is terminated by a …STOP_SEC… constant as specified in the AUTOSAR Memory Mapping requirements.
Usage
| Feature | RAM | ROM |
Table 1: ARM Cortex R4 Memory Usage
NvM Blocks
*See DataDict.m
Compiler Settings
Preprocessor MACRO
None
Optimization Settings
None
Appendix
2 - PhaDiscnct_MDD
Module Design Document
For
PhaDiscnct
February 16, 2018
Prepared For:
Software Engineering
Nexteer Automotive,
Saginaw, MI, USA
Prepared By:
Software Group,
Nexteer Automotive,
Saginaw, MI, USA
Change History
| Description | Author | Version | Date |
| Initial Version | Krzysztof Byrski | 1 | 24-Aug-2017 |
| Updated as per Design version 1.2.0 | Krzysztof Byrski | 2 | 03-Oct-2017 |
| Updated as per Design version 1.3.0 | Krzysztof Byrski | 3 | 16-Feb-2018 |
Table of Contents
2 PhaDiscnct & High-Level Description 5
3 Design details of software module 6
3.1 Graphical representation of PhaDiscnct 6
4.1 Program (fixed) Constants 7
5 Software Component Implementation 8
5.4 Module Internal (Local) Functions 9
5.4.1 Local Function PerformDiag 9
5.4.2 Local Function ClosingStateBody 9
5.4.3 Local Function ClosedStateBody 10
5.4.4 Local Function OpeningStateBody 10
5.4.5 Local Function OpenedStateBody 10
5.4.6 Local Function SetHwPhaDiscnctIO 11
5.5 GLOBAL Function/Macro Definitions 12
6 Known Limitations with Design 13
Appendix A Abbreviations and Acronyms 15
Introduction
Purpose
MDD for ES330A_PhaDiscnct_Impl
Scope
The following definitions are used throughout this document:
Shall: indicates a mandatory requirement without exception in compliance.
Should: indicates a mandatory requirement; exceptions allowed only with documented justification.
May: indicates an optional action.
PhaDiscnct & High-Level Description
Phase Disconnect provides mechanism of disconnecting Motor Phases from system in order to prevent generation of unintended negative or positive motor torque. Phase Disconnect is controlled by System State and Motor Control Gate Driver FET fault signals. Phase Disconnect functionality provides support for loss of assist mitigation.
Design details of software module
Graphical representation of PhaDiscnct

Data Flow Diagram
Refer FDD
Component level DFD
Refer FDD
Function level DFD
Refer FDD
Constant Data Dictionary
Program (fixed) Constants
Embedded Constants
Local Constants
| Constant Name | Resolution | Units | Value |
|---|---|---|---|
| DIAGFLTPRMFAILTODIAGFLG_CNT_U08 | 1 | Cnt | 8 |
| DIAGMOTCURRCORRDABITPOSN_CNT_U08 | 1 | Cnt | 1 |
| DIAGMOTCURRCORRDBBITPOSN_CNT_U08 | 1 | Cnt | 2 |
| DIAGMOTCURRCORRDCBITPOSN_CNT_U08 | 1 | Cnt | 4 |
| DIAGSTCMPL_CNT_U08 | 1 | Cnt | 2 |
| DIAGSTINI_CNT_U08 | 1 | Cnt | 0 |
| DIAGSTPROC_CNT_U08 | 1 | Cnt | 1 |
| DIAGSTSFAILTODIAG_CNT_U08 | 1 | Cnt | 2 |
| DIAGSTSFAILTOOPEN_CNT_U08 | 1 | Cnt | 1 |
| DIAGSTSPASS_CNT_U08 | 1 | Cnt | 0 |
| DIAGTSTITRNPHAA_CNT_U08 | 1 | Cnt | 2 |
| DIAGTSTITRNPHAB_CNT_U08 | 1 | Cnt | 1 |
| DIAGTSTITRNPHAC_CNT_U08 | 1 | Cnt | 0 |
| DISCNCTCURRCOMPIDX_CNT_U08 | 1 | Cnt | 0 |
| OPERSTCLSPROGSN_CNT_U08 | 1 | Cnt | 0 |
| OPERSTCLS_CNT_U08 | 1 | Cnt | 1 |
| OPERSTOPENPROGSN_CNT_U08 | 1 | Cnt | 2 |
| OPERSTOPEN_CNT_U08 | 1 | Cnt | 3 |
| PHADISCNCTCMDALLOFF_CNT_U08 | 1 | Cnt | 0 |
| PHADISCNCTCMDALLON_CNT_U08 | 1 | Cnt | 7 |
| PHADISCNCTCMDAON_CNT_U08 | 1 | Cnt | 1 |
| PHADISCNCTCMDBON_CNT_U08 | 1 | Cnt | 2 |
| PHADISCNCTCMDCON_CNT_U08 | 1 | Cnt | 4 |
Software Component Implementation
Sub-Module Functions
Init: Init1
Design Rationale
Refer FDD
Module Outputs
Refer FDD
Per: Per1
Design Rationale
Refer FDD
Store Module Inputs to Local copies
Refer FDD
(Processing of function)………
Refer FDD
Store Local copy of outputs into Module Outputs
Refer FDD
Per: PhaDiscnctPer2
Design Rationale
Refer FDD
Store Module Inputs to Local copies
Refer FDD
(Processing of function)………
Refer FDD
Store Local copy of outputs into Module Outputs
Refer FDD
Server Runables
None
Interrupt Functions
None
Module Internal (Local) Functions
Local Function PerformDiag
| Function Name | PerformDiag | Type | Min | Max |
| Arguments Passed | MotCurrCorrdA_Ampr_T_f32 | float32 | -200.0 | 200.0 |
| MotCurrCorrdB_Ampr_T_f32 | float32 | -200.0 | 200.0 | |
| MotCurrCorrdC_Ampr_T_f32 | float32 | -200.0 | 200.0 | |
| Return Value | PhaDiscnctDiagcPwmVect_Cnt_T_enum | enum | 1 | 4 |
Design Rationale
Refer FDD
Processing
Refer FDD
Local Function ClosingStateBody
| Function Name | ClosingStateBody | Type | Min | Max |
| Arguments Passed | StrtUpSt_Cnt_T_u08 | uint8 | 0 | 160 |
| SysSt_Cnt_T_enum | enum | 0 | 3 | |
| Return Value | PhaDiscnctInactvTemp_Cnt_T_logl | boolean | FALSE | TRUE |
Design Rationale
Refer FDD
Processing
Refer FDD
Local Function ClosedStateBody
| Function Name | ClosedStateBody | Type | Min | Max |
| Arguments Passed | IvtrFetFltPha_Cnt_T_enum | enum | 0 | 4 |
| IvtrFetFltTyp_Cnt_T_enum | enum | 0 | 4 | |
| SysSt_Cnt_T_enum | enum | 0 | 3 | |
| Return Value | PhaDiscnctCmdTemp_Cnt_T_u08 | Uint8 | 0 | 7 |
Design Rationale
Refer FDD
Processing
Refer FDD
Local Function OpeningStateBody
| Function Name | OpeningStateBody | Type | Min | Max |
| Arguments Passed | IvtrFetFltTyp_Cnt_T_enum | enum | 0 | 4 |
| SysSt_Cnt_T_enum | enum | 0 | 3 | |
| Return Value | PhaDiscnctCmdTemp_Cnt_T_u08 | uint8 | 0 | 7 |
Design Rationale
Refer FDD
Processing
Refer FDD
Local Function OpenedStateBody
| Function Name | OpenedStateBody | Type | Min | Max |
| Arguments Passed | IvtrFetFltPha_Cnt_T_enum | enum | 0 | 4 |
| IvtrFetFltTyp_Cnt_T_enum | enum | 0 | 4 | |
| SysSt_Cnt_T_enum | enum | 0 | 3 | |
| Return Value | PhaDiscnctInactvTemp_Cnt_T_logl | boolean | FALSE | TRUE |
| PhaDiscnctCmdTemp_Cnt_T_u08 | uint8 | 0 | 7 |
Design Rationale
Refer FDD
Processing
Refer FDD
Local Function SetHwPhaDiscnctIO
| Function Name | SetHwPhaDiscnctIO | Type | Min | Max |
| Arguments Passed | PhaDiscnt_Cnt_T_u08 | uint8 | 0 | 7 |
| Return Value | N/A |
Design Rationale
Refer FDD
Processing
Refer FDD
GLOBAL Function/Macro Definitions
None
Known Limitations with Design
None
UNIT TEST CONSIDERATION
None
Abbreviations and Acronyms
| Abbreviation or Acronym | Description |
|---|---|
Glossary
Note: Terms and definitions from the source “Nexteer Automotive” take precedence over all other definitions of the same term. Terms and definitions from the source “Nexteer Automotive” are formulated from multiple sources, including the following:
ISO 9000
ISO/IEC 12207
ISO/IEC 15504
Automotive SPICE® Process Reference Model (PRM)
Automotive SPICE® Process Assessment Model (PAM)
ISO/IEC 15288
ISO 26262
IEEE Standards
SWEBOK
PMBOK
Existing Nexteer Automotive documentation
| Term | Definition | Source |
|---|---|---|
| MDD | Module Design Document | |
| DFD | Data Flow Diagram |
References
| Ref. # | Title | Version |
|---|---|---|
| 1 | AUTOSAR Specification of Memory Mapping (Link:AUTOSAR_SWS_MemoryMapping.pdf) | v1.4.0 R4.0 Rev 3 |
| 2 | MDD Guideline EA4 | 1.02 |
| 3 | EA4 Software Naming Conventions | 1.01 |
| 4 | Software Design and Coding Standards | 2.01 |
| 5 | ES330A_PhaDiscnct_Design | See Synergy Sub Project Version |
3 - PhaDiscnct_Review
Overview
Summary SheetSynergy Project
Source Code
MDD
PolySpace
Sheet 1: Summary Sheet
Sheet 2: Synergy Project
| Rev 2.00 | 29-Nov-17 | |||||||||||||||||||||||
| Peer Review Meeting Log (Component Synergy Project Review) | ||||||||||||||||||||||||
| Quality Check Items: | ||||||||||||||||||||||||
| Rationale is required for all answers of No | ||||||||||||||||||||||||
| New baseline version name from Summary Sheet follows | Yes | Comments: | ||||||||||||||||||||||
| naming convention | ||||||||||||||||||||||||
| Project contains necessary subprojects | Yes | Comments: | ||||||||||||||||||||||
| Project contains the correct version of subprojects | Yes | Comments: | ||||||||||||||||||||||
| Design subproject is correct version | Yes | Comments: | ||||||||||||||||||||||
| .gpj file in tools folder matches .gpj generated by TL109 script | Yes | Comments: | ||||||||||||||||||||||
| File/folder structure is correct per documentation in | Yes | Comments: | ||||||||||||||||||||||
| TL109A_SwcSuprt | ||||||||||||||||||||||||
| General Notes / Comments: | ||||||||||||||||||||||||
| Review Board: | ||||||||||||||||||||||||
| Change Owner: | Krzysztof Byrski | Review Date : | 02/16/2018 | |||||||||||||||||||||
| Lead Peer Reviewer: | Mateusz Bartocha | Approved by Reviewer(s): | Yes | |||||||||||||||||||||
| Other Reviewer(s): | ||||||||||||||||||||||||
| Rationale/justification for items marked "No" approved by: | ||||||||||||||||||||||||
Sheet 3: Source Code
Sheet 4: MDD
| Rev 2.00 | 29-Nov-17 | |||||||||||||||||||||||
| Nexteer SWC Implementation Peer Review Meeting Log (MDD Review) | ||||||||||||||||||||||||
| MDD Name: | PhaDiscnct_MDD.docx | MDD Revision: | 3 | |||||||||||||||||||||
| Source File Name: | PhaDiscnct.c | Source File Revision: | 2 | |||||||||||||||||||||
| Source File Name: | - | Source File Revision: | - | |||||||||||||||||||||
| Source File Name: | - | Source File Revision: | - | |||||||||||||||||||||
| Quality Check Items: | ||||||||||||||||||||||||
| Rationale is required for all answers of No | ||||||||||||||||||||||||
| Synergy version matches document | Yes | Comments: | ||||||||||||||||||||||
| Change log contains detailed description of changes | Yes | Comments: | ||||||||||||||||||||||
| Changes Highlighted (for Unit Tester) | Yes | Comments: | ||||||||||||||||||||||
| Diagrams have been included per MDD Guideline | N/A | Comments: | ||||||||||||||||||||||
| and reviewed | N/A for changes | |||||||||||||||||||||||
| All Design Exceptions and Limitations are listed | N/A | Comments: | ||||||||||||||||||||||
| N/A for changes | ||||||||||||||||||||||||
| Design rationale given for all global | N/A | Comments: | ||||||||||||||||||||||
| data not communicated through RTE ports, per | N/A for changes | |||||||||||||||||||||||
| Design and Coding Standards rules [N9] and [N10]. | ||||||||||||||||||||||||
| All implementation details that differ from the SWC | N/A | Comments: | ||||||||||||||||||||||
| Design are noted and explained in Design Rationale | N/A for changes | |||||||||||||||||||||||
| All Unit Test Considerations have been described | N/A | Comments: | ||||||||||||||||||||||
| N/A for changes | ||||||||||||||||||||||||
| General Notes / Comments: | ||||||||||||||||||||||||
| Review Board: | ||||||||||||||||||||||||
| Change Owner: | Krzysztof Byrski | Review Date : | 02/16/2018 | |||||||||||||||||||||
| Lead Peer Reviewer: | Mateusz Bartocha | Approved by Reviewer(s): | Yes | |||||||||||||||||||||
| Other Reviewer(s): | ||||||||||||||||||||||||
| Rationale/justification for items marked "No" approved by: | ||||||||||||||||||||||||