Sr. No.	Title	Version
<1>	<MDD Guidelines>	Process 4.01.00
<2>	<Software Naming Conventions>	Process 4.01.00
<3>	<Coding standards>	Process 4.01.00
<4>	FDD – SF014A_InertiaCmpVel_Design	See Synergy Subproject version

Dependencies

SWCs

Module	Required Feature
None

Global Functions(Non RTE) to be provided to Integration Project

None

Configuration REQUIREMeNTS

Build Time Config

Modules	Notes
FLTINJENA	Set to STD_ON for Fault injection

Configuration Files to be provided by Integration Project

None

Da Vinci Parameter Configuration Changes

Parameter	Notes	SWC
N/A

DaVinci Interrupt Configuration Changes

ISR Name	VIM #	Priority Dependency	Notes
N/A

Manual Configuration Changes

Constant	Notes	SWC
N/A

Integration DATAFLOW REQUIREMENTS

Required Global Data Inputs

Refer DataDict.m file

Required Global Data Outputs

Refer DataDict.m file

Specific Include Path present

Runnable Scheduling

This section specifies the required runnable scheduling.

Init	Scheduling Requirements	Trigger
InertiaCmpVelInit1	On Init	RTE_Init

Runnable	Scheduling Requirements	Trigger
InertiaCmpVelPer1	None	RTE(2ms)

Memory Map REQUIREMENTS

Mapping

Memory Section	Contents	Notes
None

* Each …START_SEC… constant is terminated by a …STOP_SEC… constant as specified in the AUTOSAR Memory Mapping requirements.

Usage

Feature	RAM	ROM
None

NvM Blocks

None

Compiler Settings

Preprocessor MACRO

None

Optimization Settings

None

Appendix

None

2 - InertiaCmpVel_MDD

Module Design Document

For

InertiaCmpVel

August 18, 2017

Prepared By:

Matthew Leser,

Nexteer Automotive,

Saginaw, MI, USA
Change History

SNo	Description	Author	Version	Date
1	Initial Version	SB	1.0	23-Jul-2015
2	Updated to version 1.3.0 of design	SB	2.0	11-Mar-2016
3	Updated to version 1.7.0 and 1.8.0 of design	KK	3.0	21-Jun-2016
4	Updated to version 1.9.0 of design	KK	4.0	14-Jul-2016
5	Updated Graph and function input	ML	5.0	18-Aug-2017

Table of Contents

1 Introduction 4

1.1 Purpose 4

1.2 Scope 4

2 InertiaCmpVel & High-Level Description 5

3 Design details of software module 6

3.1 Graphical representation of InertiaCmpVel 6

3.2 Data Flow Diagram 7

3.2.1 Component level DFD 7

3.2.2 Function level DFD 7

4 Constant Data Dictionary 8

4.1 Program (fixed) Constants 8

4.1.1 Embedded Constants 8

5 Software Component Implementation 9

5.1.1 Sub-Module Functions 9

5.1.2 Interrupt Service Routines 9

5.1.3 Server Runnable Functions 9

5.1.4 Module Internal (Local) Functions 9

5.1.5 Transition Functions 11

6 Known Limitations with Design 12

7 UNIT TEST CONSIDERATION 13

Appendix A Abbreviations and Acronyms 14

Appendix B Glossary 15

Appendix C References 16

Introduction

Purpose

Scope

InertiaCmpVel & High-Level Description

Refer FDD

Design details of software module

Graphical representation of InertiaCmpVel

Data Flow Diagram

Component level DFD

Refer FDD

Function level DFD

Refer FDD

Constant Data Dictionary

Program (fixed) Constants

Embedded Constants

Local Constants

None

Global Constants

Refer .m file

User defined typedef definition/declaration

This section documents any user types uniquely used for the module.

Typedef Name	Element Name	User Defined Type	Legal Range (min)	Legal Range (max)
typedef struct FilCoeffRec	b0_Uls_f32	Float32	FULL	FULL
	b1_Uls_f32	Float32	FULL	FULL
	b2_Uls_f32	Float32	FULL	FULL
	a0_Uls_f32	Float32	FULL	FULL
	a1_Uls_f32	Float32	FULL	FULL
	a2_Uls_f32	Float32	FULL	FULL

Software Component Implementation

Sub-Module Functions

Initialization sub-module InertiaCmpVelInit1()

Design Rational:

Init function is not present in the model but in reference to the Init.txt text file Low pass filter and Notch filter are initialized.

For Low pass filter standard EA4 LPF implementation from NxtrFil.h is followed and for Notch filter initialization, EA3 implementation is followed.

Periodic sub-module InertiaCmpVelPer1()

Interrupt Service Routines

None

Server Runnable Functions

None

Module Internal (Local) Functions

Calculate Driver Velocity

Function Name	DrvrVelCalc	Type	Min	Max
Arguments Passed	HwTq_HwNwtMtr_T_f32	float32	-10	10
	MotVelCrf_MotRadPerSec_T_f32	float32	-1350	1350
	VehSpd_Kph_T_f32	float32	0	511
Return Value	ScadDrvrVel_MotRadPerSec_T_f32	float32	-1350	1350

Calculate ADD Coefficient

Function Name	ADDCoeffCalc	Type	Min	Max
Arguments Passed	AssiCmdBas_MotNwtMtr_T_f32	float32	-8.8	8.8
	WhlImbRejctnAmp_MotNwtMtr_T_f32	float32	0	8.8
	VehSpd_Kph_T_f32	float32	0	511
Return Value	ADDCoeffCalc_MotNwtMtrSpRad_T_f32	float32	0.0	0.00007

Calculate Gain

Function Name	DecelGain	Type	Min	Max
Arguments Passed	VehLgtA_KphPerSec_T_f32	float32	-35	35
	MotVelCrf_MotRadPerSec_T_f32	float32	-1350	1350
Return Value	DecelGain_Uls_T_f32	float32	0	1

Calculate Filter Coefficients

Function Name	FilCoeffCalc		Type	Min	Max
Arguments Passed	ADDCoeff_MotNwtMtrPerMotRadPerSec_T_f32		float32	0.0	0.041306
	WhlImbRejctnAmp_MotNwtMtr_T_f32		float32	0	8.8
	VehSpd_Kph_T_f32		float32	0	511
Return Value	*FilCoeff_T_Rec	b0_Uls_f32	float32	-2.74156205240179	0
		b1_Uls_f32	float32	0.0	0.330448
		b2_Uls_f32	float32	-0.160083862455113	2.41111405240179
		a0_Uls_f32	float32	0.5525885	3.9498924
		a1_Uls_f32	float32	-7.9996842	-4.8417266
		a2_Uls_f32	float32	4.0504234	10.6056849

Generate Command

Function Name	GenFddIcCmd		Type	Min	Max
Arguments Passed	ScadDrvrVel_MotRadPerSec_T_f32		float32	-7226.652	7226.652
	*FilCoeff_T_Rec	b0_Uls_f32	float32	-2.74156205240179	0
		b1_Uls_f32	float32	0.0	0.330448
		b2_Uls_f32	float32	-0.166262133009164	2.41111405240179
		a0_Uls_f32	float32	0.5525885	3.9498924
		a1_Uls_f32	float32	-7.9996842	-4.8417266
		a2_Uls_f32	float32	4.0504234	10.6056849
Return Value	InertiaCmp_MotNwtMtr_T_f32		Float	-8.8	8.8

NotchCmp

Function Name	NotchCmp	Type	Min	Max
Arguments Passed	VehSpd_Kph_T_f32	float32	0	511
	InertiaCmp_MotNwtMtr_T_f32	float32	-8.8	8.8
	WhlImbRejctnAmp_MotNwtMtr_T_f32	float32	0	8.8
Return Value	NotchCmp _MotNwtMtr_T_f32	float32	-8.8	8.8

FilNotchFullUpdOutp_f32

Function Name	FilNotchFullUpdOutp_f32	Type	Min	Max
Arguments Passed	Inp	float32	See unit test consideration
	FilNotchStRecPtr	FilNotchStRec1
	FilNotchGainRecPtr	FilNotchGainRec1
Return Value	None

Description

Notch filter output calculation implemented based on ‘Inertia Comp Notch’ block functionality.

FilNotchInit

Function Name	FilNotchInit	Type	Min	Max
Arguments Passed	Inp	float32	See unit test consideration
	FilNotchStRecPtr	FilNotchStRec1
	FilNotchGainRecPtr	FilNotchGainRec1
Return Value	FilOut	float32

Description

Notch filter initialization function implemented based on EA3 design.

Transition Functions

None

Known Limitations with Design

None

UNIT TEST CONSIDERATION

Since the notch filter implementation used in this module is dynamic in nature, absolute ranges are difficult to determine without pre-defined knowledge on the combination of coefficient values (A1, A2, B0, B1, B2). Because of this, the systems group ran simulations on 10 different combinations of coefficients (2 with defined default calibrations, 8 considered extreme cases of notch filters) and logged the ranges of the filter state variables and outputs during a frequency sweep. The ranges given throughout this module were taken as the worst case results of all of the given test cases.

To provide useful cases for unit testing, the boundary checks tested during unit testing should be altered to test the state variable minimum and maximum for each of the 10 test cases with the given coefficients set to the values given in that test case. In the case where the default values of the coefficients are used in a vector, the unit tester should not test the corresponding state variables with values over the range defined for that set of coefficients. See attached simulation results.

GenFddIcCmd function is designed to work with argument values from the calling function as used with the other functions in the module, and outputs may be out of the expected range if tested with arbitrary combinations of input values. Unit testing of this function should use only passed argument value combinations coming from the calling function.

Abbreviations and Acronyms

Abbreviation or Acronym	Description

Glossary

Note: Terms and definitions from the source “Nexteer Automotive” take precedence over all other definitions of the same term. Terms and definitions from the source “Nexteer Automotive” are formulated from multiple sources, including the following:

ISO 9000
ISO/IEC 12207
ISO/IEC 15504
Automotive SPICE® Process Reference Model (PRM)
Automotive SPICE® Process Assessment Model (PAM)
ISO/IEC 15288
ISO 26262
IEEE Standards
SWEBOK
PMBOK
Existing Nexteer Automotive documentation

Term	Definition	Source
MDD	Module Design Document
DFD	Data Flow Diagram

References

Ref. #	Title	Version
1	AUTOSAR Specification of Memory Mapping (Link:AUTOSAR_SWS_MemoryMapping.pdf)	v1.3.0 R4.0 Rev 2
2	MDD Guideline	EA4 01.00.00
3	Software Naming Conventions.doc	2.0
4	Software Design and Coding Standards.doc	2.1
5	FDD – SF014A_InetiaCmpVel_Design	See Synergy Sub project version

3 - InertiaCmpVel_PeerReview

Overview

Summary Sheet
Synergy Project
Source Code
PolySpace

Sheet 1: Summary Sheet

Rev 2.00

29-Nov-17

Nexteer SWC Implementation Peer Review Summary Sheet

Component Short Name:

Windows User: Intended Use: Identify which component is being reviewed. This should match the component short name from the DataDict.m fileand the middle part of the Synergy project name, e.g. Assi for the SF001A_Assi_Impl Synergy project

InertiaCmpVel

Revision / Baseline:

Windows User: Intended Use: Identify the implementation baseline name intended to be used for the changed component when changes are approved E.g. SF001A_Assi_Impl_1.2.0

SF014A_IntertiaCmpVel_Impl_1.13.0

Change Owner:

Windows User: Intended Use: Identify the developer who made the change(s) being reviewed

Matthew Leser

Work CR ID:

Windows User: Intended Use: Identify the Implementation Work CR whose work is being reviewed (may be more than one)

EA4#19710

kzshz2: Intended Use: Intended to identify at a high level to the reviewers which areas of the component have been changed. Rationale: This will be good information to know when ensuring appropriate reviews have been completed. Modified File Types:

Check the file types that needed modification for the Work CR(s); macros for the check boxes will populate the appropriate checklist tabs for the review.

kzshz2: Intended Use: Identify who where the reviewers, what they reviewed, and if the reviewed changes have been approved to release the code for testing. Comments here should be at a highlevel, the specific comments should be present on the specific review form sheet. Rationale: Since this Form will be attached to the Change Request it will confirm the approval and provides feedback in case of audits. ADD DR Level Move reviewer and approval to individual checklist form Review Checklist Summary:

Reviewed:

At start of review, all items below should be marked "No". At the end of the review, all items should be marked "Yes" or "N/A" where N/A indicates the reviewers have reviewed the existing (unchanged) item and confirmed no updates were needed for the Work CR(s).

N/A

MDD

Yes

Source Code

Yes

PolySpace

N/A

Integration Manual

N/A

Davinci Files

Comments:

General Guidelines:
- The reviews shall be performed over the portions of the component that were modified as a result of the Change Request.
- New components should include SWC Owner and/or SWC Design author and Integrator and/or SW Lead as apart of the Group Review Board (Source Code, Integration Manual, and Davinci Files)
- Enter any rework required into the comment field and select No. When the rework is complete, review again using this same review sheet and select Yes. Add date and additional comment stating that the rework is completed.
- To review a component with multiple source code files use the "Add Source" button to create a Source code tab for each source file.
- .h file should be reviewed with the source file as part of the source file.

Each peer review shall start with a clean copy of the latest peer review checklist template. Before the peer review, the change owner shall:
o Review the previous component peer review and copy any relevant comments to the new review sheet.
o Review all checklist items and make all corrections needed, so that the component is ready for peer review. The expectation is that peer review should find very few issues,
because the change owner has already used the checklist to ensure the component changes are complete and correct.
o Fill in all file name and version information as needed on peer review checklist tabs (file names may be copied from the previous peer review where appropriate)
o Fill in checklist answers (Yes/No/NA pulldowns) ONLY on those items which are NA for the current change. All other checklist items should be blank going into the review
meeting.

During the peer review meeting:
o For each page of the review, first review the items already marked as N/A for this change, to confirm that reviewers agree with this assessment; change the checklist box to
blank if it is found that the item does apply.
o Then review the items with the checklist box blank. After reviewing each of these items, the checklist box will be marked as "Yes", or the checklist box will be marked as
"No" with needed rework indicated or with rationale indicated.
o If any items are marked "No" with rationale indicated, this must be approved by a software supervisor or the software manager; there is a line in the "Review Board" section
of each tab to indicate who approved the "No" items on that tab.

Sheet 2: Synergy Project

Rev 2.00

29-Nov-17

Peer Review Meeting Log (Component Synergy Project Review)

Quality Check Items:

Rationale is required for all answers of No

New baseline version name from Summary Sheet follows

Yes

Comments:

naming convention

Project contains necessary subprojects

Yes

Comments:

Project contains the correct version of subprojects

Yes

Comments:

Design subproject is correct version

Yes

Comments:

.gpj file in tools folder matches .gpj generated by TL109 script

Yes

Comments:

File/folder structure is correct per documentation in

Yes

Comments:

TL109A_SwcSuprt

General Notes / Comments:

Review Board:

Change Owner:

Matthew Leser

Review Date :

02/06/18

Lead Peer Reviewer:

Avinash James

Approved by Reviewer(s):

Yes

Other Reviewer(s):

Rationale/justification for items marked "No" approved by:

Sheet 3: Source Code

Rev 2.00

29-Nov-17

Nexteer SWC Implementation Peer Review Meeting Log (Source Code Review)

Source File Name:

InertiaCmpVel.c

Source File Revision:

Windows User: Intended Use: Synergy version number of the file being reviewed. (Version number that Synergy displays on the checked out or unmodified file in the working project) 10

Header File Name:

Header File Revision:

Windows User: Intended Use: Synergy version number of the file being reviewed. (Version number that Synergy displays on the checked out or unmodified file in the working project)

MDD Name:

InertiaCmpVel_MDD.docx

Revision:

Windows User: Intended Use: Synergy version number of the file being reviewed. (Version number that Synergy displays on the checked out or unmodified file in the working project) 5

SWC Design Name:

SF014A_InertiaCmpVel_Design

Revision:

Windows User: Intended Use: For FDDs, list the Synergy baseline number (just the number part of the Synergy baseline name) of the FDD baseline being implemented. E.g., for SF001A_Assi_Design_1.3.1, this field would say "1.3.1" 1.16.0

Quality Check Items:

Rationale is required for all answers of No

EA4 Common Naming Convention followed:

Version: 01.01.00

EA4 Software Naming Convention followed:

Version: 01.01.00

for variable names

N/A

Comments:

for constant names

N/A

Comments:

for function names

N/A

Comments:

for other names (component, memory

N/A

Comments:

mapping handles, typedefs, etc.)

Verified no possibility of uninitialized variables being

N/A

Comments:

written to component outputs or IRVs

Any requirements traceability tags have been removed

N/A

Comments:

from at least the changed areas of code

All variables are declared at the function level.

N/A

Comments:

Synergy version matches change history

kzshz2: Intended Use: Indicate that the the versioning was confirmed by the peer reviewer(s). Rationale: There have been many occassions where versions were not updated in files and as a result Unit Test were referencing wrong versions. This often time leads to the need to re-run of batch tests.

Yes

Comments:

and Version Control version in file comment block

Change log contains detailed description of changes

Yes

Comments:

(including any anomaly number(s) being fixed) and

Work CR number

Code accurately implements SWC Design (Document or Model)

Yes

Comments:

in all areas where code was changed and/or Simulink

model was color-coded as changed and/or mentioned

in SWC Design change log. (This item includes looking at all

layers of Simulink model for possible color coding not

reflected at a higher level, and includes looking at any

intermediate SWC Design versions between the version being

implemented and the version that was included as a

subproject in the previous implementation.)

Code comparison against previous version matches

Yes

Comments:

changes needed as described by the work CR(s), all

parent CRs and parent anomalies, and the SWC

Design change log.

Verified no Compiler Errors or Warnings

KMC: Intended Use: To confirm no compiler errors or warnings exist for the code under review (warnings from contract header files may be ignored). Rationale: This is needed to ensure there will be no errors discovered at the time of integration. A Sandox project should be used.

Yes

Comments:

(and verified for all possible combinations

of any conditionally compiled code)

Component.h is included

N/A

Comments:

All other includes are actually needed. (System includes

N/A

Comments:

only allowed in Nexteer library components)

Software Design and Coding Standards followed:

Windows User: Intended Use: list version/revision of latest released Software Design and Coding Standards document. Version: 2.1

Code comments are clear, correct, and adequate

N/A

Comments:

and have been updated for the change: [N40] and

all other rules in the same section as rule [N40],

plus [N75], [N12], [N23], [N33], [N37], [N38],

[N48], [N54], [N77], [N79], [N72]

Source file (.c and .h) comment blocks are per

Yes

Comments:

standards and contain correct information: [N41], [N42]

Function comment blocks are per standards and

N/A

Comments:

contain correct information: [N43]

Code formatting (indentation, placement of

Yes

Comments:

braces, etc.) is per standards: [N5], [N55], [N56],

[N57], [N58], [N59]

Embedded constants used per standards; no

N/A

Comments:

"magic numbers": [N12]

Memory mapping for non-RTE code

N/A

Comments:

is per standard

All access of motor control loop data uses macros

N/A

Comments:

generated by the motor control manager

All loops have termination conditions that ensure

N/A

Comments:

finite loop iterations: [N63]

All divides protect against divide by zero

N/A

Comments:

if needed: [N65]

All integer division and modulus operations

N/A

Comments:

handle negative numbers correctly: [N76]

All typecasting and fixed point arithmetic,

N/A

Comments:

including all use of fixed point macros and

timer functions, is correct and has no possibility

of unintended overflow or underflow: [N66]

All float-to-unsigned conversions ensure the.

N/A

Comments:

float value is non-negative: [N67]

All conversions between signed and unsigned

N/A

Comments:

types handle msb==1 as intended: [N78]

All pointer dereferencing protects against

N/A

Comments:

null pointer if needed: [N70]

Component outputs are limited to the legal range

N/A

Comments:

defined in the SWC Design DataDict.m file : [N53]

All code is mapped with SWC Design (all SWC

Yes

Comments:

Design subfunctions and/or model blocks identified

with code comments; all code corresponds to

some SWC Design subfunction and/or model block):

[N40]

Any other violations of design and coding

N/A

Comments:

standards noticed during the review are noted in the

comments section for rework.

Anomaly or Design Work CR created

N/A

Comments: List Anomaly or CR numbers

for any SWC Design corrections needed

General Notes / Comments:

Review Board:

Change Owner:

Matthew Leser

Review Date :

02/06/18

Lead Peer Reviewer:

Avinash James

Approved by Reviewer(s):

Yes

SWC owner and/or
SWC Design author:

Fei Yuan

Comments:

Integrator and or
SW lead:

Comments:

Unit test co-ordinator:

Comments:

Other Reviewer(s):

Rationale/justification for items marked "No" approved by:

Sheet 4: PolySpace

Rev 2.00

29-Nov-17

Nexteer SWC Implementation Peer Review Meeting Log (PolySpace Review)

Source File Name:

InertiaCmpVel.c

Source File Revision:

Source File Name:

Source File Revision:

Source File Name:

Source File Revision:

EA4 Static Analysis Compliance Guideline version:

01.04.00

Poly Space version:

Windows User: eg. 2013b

2013b

TL109A sub project version:

2.2.0

Quality Check Items:

Rationale is required for all answers of No

tools/local folders' header files are appropriate and

Yes

Comments:

function prototypes match the latest component version

100% Compliance to the EA4 Static Analysis

Yes

Comments:

Compliance Guideline

Are previously added justification and deviation

Yes

Comments:

comments still appropriate

Do all MISRA deviation comments use approved

Yes

Comments:

deviation tags

For any component source files (.c, .h, generated Cfg.c and Cfg.h)

N/A

Comments:

with conditional compilation, has Polyspace been run with all

combinations of build constants that can be used together in a build?

(Note which conditional compilation results have been archived)

Cyclomatic complexity and Static path count OK

Yes

Comments:

for all functions in the component per Design

and Coding Standards rule [N47]

General Notes / Comments:

Review Board:

Change Owner:

Matthew Leser

Review Date :

02/06/18

Lead Peer Reviewer:

Avinash James

Approved by Reviewer(s):

Yes

Other Reviewer(s):

Rationale/justification for items marked "No" approved by: