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Component Implementation

1: BattVltgCorrln_IntegrationManual
2: BattVltgCorrln_MDD
3: BattVltgCorrln_PeerReview

Component Implementation

Component Documentation

1 - BattVltgCorrln_IntegrationManual

Integration Manual

For

BattVltgCorrln

VERSION: 2.0

DATE: 27-Jun-2017

Prepared By:

Brionna Spencer,

Nexteer Automotive,

Saginaw, MI, USA

Location: The official version of this document is stored in the Nexteer Configuration Management System.

Revision History

Sl. No.	Description	Author	Version	Date
1	Initial version	N. Saxton	1.0	25-May-2016
2	Listed missing memory section in 7.1 Mapping.	B. Spencer	2.0	27-Jun-2017

Table of Contents

1 Abbrevations And Acronyms 4

2 References 5

3 Dependencies 6

3.1 SWCs 6

3.2 Global Functions(Non RTE) to be provided to Integration Project 6

4 Configuration REQUIREMeNTS 7

4.1 Build Time Config 7

4.2 Configuration Files to be provided by Integration Project 7

4.3 Da Vinci Parameter Configuration Changes 7

4.4 DaVinci Interrupt Configuration Changes 7

4.5 Manual Configuration Changes 7

5 Integration DATAFLOW REQUIREMENTS 8

5.1 Required Global Data Inputs 8

5.2 Required Global Data Outputs 8

5.3 Specific Include Path present 8

6 Runnable Scheduling 9

7 Memory Map REQUIREMENTS 10

7.1 Mapping 10

7.2 Usage 10

7.3 Non RTE NvM Blocks 10

7.4 RTE NvM Blocks 10

8 Compiler Settings 11

8.1 Preprocessor MACRO 11

8.2 Optimization Settings 11

9 Appendix 12

Abbrevations And Acronyms

Abbreviation	Description
DFD	Design functional diagram
MDD	Module design Document

References

This section lists the title & version of all the documents that are referred for development of this document

Sr. No.	Title	Version
1	FDD – ES259B Battery or Switched Voltage Correlation	See Synergy subproject version
2	EA4 Software Naming Conventions	01.01.00
3	Software Design and Coding Standards	2.1

Dependencies

SWCs

Module	Required Feature
None

Global Functions(Non RTE) to be provided to Integration Project

None

Configuration REQUIREMeNTS

Build Time Config

Modules	Notes
None

Configuration Files to be provided by Integration Project

None

Da Vinci Parameter Configuration Changes

Parameter	Notes	SWC
None

DaVinci Interrupt Configuration Changes

ISR Name	VIM #	Priority Dependency	Notes
None

Manual Configuration Changes

Constant	Notes	SWC
None

Integration DATAFLOW REQUIREMENTS

Required Global Data Inputs

Refer to DataDict.m file in the FDD.

Required Global Data Outputs

Refer to DataDict.m file in the FDD.

Specific Include Path present

Runnable Scheduling

This section specifies the required runnable scheduling.

Init	Scheduling Requirements	Trigger
BattVltgCorrlnInit1	None	RTE (Init)

Runnable	Scheduling Requirements	Trigger
BattVltgCorrlnPer1	None	RTE (2ms)

Memory Map REQUIREMENTS

Mapping

Memory Section	Contents	Notes
BattVltgCorrln_START_SEC_CODE

* Each …START_SEC… constant is terminated by a …STOP_SEC… constant as specified in the AUTOSAR Memory Mapping requirements.

Usage

Feature	RAM	ROM

Table 1: ARM Cortex R4 Memory Usage

NvM Blocks

None

Compiler Settings

Preprocessor MACRO

None

Optimization Settings

None

Appendix

None

2 - BattVltgCorrln_MDD

Module Design Document

For

BattVltgCorrln

27-Jun-2017

Prepared For:

Software Engineering

Nexteer Automotive,

Saginaw, MI, USA

Prepared By:

Brionna Spencer,

Nexteer Automotive,

Saginaw, MI, USAChange History

Description	Author	Version	Date
Initial Version	N. Saxton	1.0	7-Jun-2016
Updated the graphical representation, added design rationale for BattVltgCorrlnPer1, and updated the documentation for modified local functions (i.e. DetInstCorrln, DetIdptSig, and DetCorrlnSts).	B. Spencer	2.0	27-Jun-2017

Table of Contents

1 BattVltgCorrln & High-Level Description 4

2 Design details of software module 5

2.1 Graphical representation of BattVltgCorrln 5

2.2 Data Flow Diagram 6

2.2.1 Component level DFD 6

2.2.2 Function level DFD 6

3 Constant Data Dictionary 7

3.1 Program (fixed) Constants 7

3.1.1 Embedded Constants 7

4 Software Component Implementation 8

4.1.1 Sub-Module Functions 8

4.1.2 Interrupt Service Routines 8

4.1.3 Server Runnable Functions 8

4.1.4 Module Internal (Local) Functions 8

4.1.5 Transition Functions 10

5 Known Limitations with Design 11

6 UNIT TEST CONSIDERATION 12

Appendix A Abbreviations and Acronyms 13

Appendix B Glossary 14

Appendix C References 15

BattVltgCorrln & High-Level Description

Refer FDD

Design details of software module

Graphical representation of BattVltgCorrln

Data Flow Diagram

Component level DFD

N/A

Function level DFD

N/A

Constant Data Dictionary

Program (fixed) Constants

Embedded Constants

Local Constants

Constant Name	Resolution	Units	Value
BATTVLTGIDPTSIGMIN_CNT_U08	None	Cnt	0
BATTVLTGIDPTSIGMAX_CNT_U08	None	Cnt	2

* Refer FDD for other constant definition

Software Component Implementation

Sub-Module Functions

Initialization sub-module {_Init()}

BattVltgCorrlnInit1

Design Rationale

Refer to FDD

Store module inputs to local copies

Refer to FDD

(Processing of function)……

Refer to FDD

Store local copy of outputs into module outputs

Refer FDD

Periodic sub-module {_Per()}

BattVltgCorrlnPer1

Design Rationale

Refer to FDD

Note the BattAndSwdVltgPassed temporary variable in the FDD was renamed to BattVltgAndSwd1NotFailed because the ‘no result’ case is also considered in the logic.

Store module inputs to local copies

Refer to FDD

(Processing of function)……

Refer to FDD

Store local copy of outputs into module outputs

Refer FDD

Interrupt Service Routines

None

Server Runnable Functions

None

Module Internal (Local) Functions

Local Function #1

Function Name	DetInstCorrln	Type	Min	Max
Arguments Passed	BattVltg_Volt_T_f32	float32	0	40
	BattVltgSwd1_Volt_T_f32	float32	0	40
	DiagcStsIvtr1Inactv_Cnt_T_logl	boolean	FALSE	TRUE
	*BattVltgAndSwd1Ok_Cnt_T_logl	boolean	FALSE	TRUE

	*UseSwdVltg_Cnt_T_logl	boolean	FALSE	TRUE
	*UseBattVltg_Cnt_T_logl	boolean	FALSE	TRUE
	*Ntc0x03CQlfrSts_Cnt_T_enum	SigQlfr1	SIGQLFR_NORES	SIGQLFR_FAILD
	*Ntc0x044QlfrSts_Cnt_T_enum	SigQlfr1	SIGQLFR_NORES	SIGQLFR_FAILD
Return Value	SwdVltgLimd_Cnt_T_logl	boolean	FALSE	TRUE

Description

Refer “Determine Instantaneous Correlation” subsystem in FDD.

Local Function #2

Function Name	DetIdptSig	Type	Min	Max
Arguments Passed	Ntc0x03CQlfrSts_Cnt_T_enum	SigQlfr1	SIGQLFR_NORES	SIGQLFR_FAILD
	Ntc0x044QlfrSts_Cnt_T_enum	SigQlfr1	SIGQLFR_NORES	SIGQLFR_FAILD
	*BattVltgAndSwd1NotFailed_Cnt_T_logl	boolean	FALSE	TRUE

Return Value	BattVltgCorrlnIdptSig_Cnt_T_u08	uint8	0	2

Description

This function implements the “Determine Independent Signals” subsystem in the model.

Local Function #3

Function Name	DetCorrlnSts	Type	Min	Max
Arguments Passed	BattVltgAndSwd1NotFailed_Cnt_T_logl	boolean	FALSE	TRUE

	BattVltgAndSwd1Ok_Cnt_T_logl	boolean	FALSE	TRUE

	UseSwdVltg_Cnt_T_logl	boolean	FALSE	TRUE
	UseBattVltg_Cnt_T_logl	boolean	FALSE	TRUE
	*DftBrdgVltgActv_Cnt_T_logl	boolean	FALSE	TRUE
Return Value	BattSwdVltgCorrlnSts_Cnt_T_u08	uint8	0	2

Description

This function implements the “Determine Correlation Status” subsystem in the model.

Local Function #4

Function Name	BattVltgDiag	Type	Min	Max
Arguments Passed	BattVltg_Volt_T_f32	float32	0	40
	InhbBattVltgDiagc_Cnt_T_logl	boolean	FALSE	TRUE

Description

Implements “Battery Voltage Diagnostics” subsystem.

Local Function #5

Function Name	RngChk	Type	Min	Max
Arguments Passed	BattVltg_Volt_T_f32	float32	0	40
	BattVltgSwdMax_Volt_T_f32	float32	0	40
Return Value	TestLgc_Cnt_T_logl	boolean	FALSE	TRUE

Description

Implements “Range Check” block in the model. Created to reduce cyclomatic complexity and static path count.

Transition Functions

None

Known Limitations with Design

None

UNIT TEST CONSIDERATION

None

Abbreviations and Acronyms

None

Glossary

Note: Terms and definitions from the source “Nexteer Automotive” take precedence over all other definitions of the same term. Terms and definitions from the source “Nexteer Automotive” are formulated from multiple sources, including the following:

ISO 9000
ISO/IEC 12207
ISO/IEC 15504
Automotive SPICE® Process Reference Model (PRM)
Automotive SPICE® Process Assessment Model (PAM)
ISO/IEC 15288
ISO 26262
IEEE Standards
SWEBOK
PMBOK
Existing Nexteer Automotive documentation

Term	Definition	Source
MDD	Module Design Document
DFD	Data Flow Diagram

References

Ref. #	Title	Version
1	AUTOSAR Specification of Memory Mapping	v1.3.0 R4.0 Rev 2
2	MDD Guideline	EA4 01.00.01
3	EA4 Software Naming Conventions	01.01.00
4	Software Design and Coding Standards	2.1
5	FDD – ES259B Battery or Switched Voltage Correlation	See Synergy subproject version

3 - BattVltgCorrln_PeerReview

Overview

Summary Sheet
Synergy Project
Davinci Files
Source Code
PolySpace

Sheet 1: Summary Sheet

Rev 1.2

8-Jun-15

Peer Review Summary Sheet

Synergy Project Name:

kzshz2: Intended Use: Identify which component is being reviewed. This should be the Module Short Name from Synergy Rationale: Required for traceability. It will help to ensure this form is not attaced to the the wrong change request. ES259B_BattVltgCorrln_Impl

Revision / Baseline:

kzshz2: Intended Use: Identify which Synergy revision of this component is being reviewed Rationale: Required for traceability. It will help to ensure this form is not attaced to the the wrong change request. ES259B_BattVltgCorrln_Impl_1.2.0

Change Owner:

kzshz2: Intended Use: Identify the developer who made the change(s) Rationale: A change request may have more than one resolver, this will help identify who made what change. Change owner identification may be required by indusrty standards. Matthew Leser

Work CR ID:

EA4#16065

kzshz2: Intended Use: Intended to identify at a high level to the reviewers which areas of the component have been changed. Rationale: This will be good information to know when ensuring appropriate reviews have been completed. Modified File Types:

kzshz2: Intended Use: Identify who where the reviewers, what they reviewed, and if the reviewed changes have been approved to release the code for testing. Comments here should be at a highlevel, the specific comments should be present on the specific review form sheet. Rationale: Since this Form will be attached to the Change Request it will confirm the approval and provides feedback in case of audits. ADD DR Level Move reviewer and approval to individual checklist form Review Checklist Summary:

Reviewed:

N/A

MDD

Yes

Source Code

Yes

PolySpace

N/A

Integration Manual

Yes

Davinci Files

Comments:

General Guidelines:
- The reviews shall be performed over the portions of the component that were modified as a result of the Change Request.
- New components should include FDD Owner and Integrator as apart of the Group Review Board (Source Code, Integration Manual, and Davinci Files)
- Enter any rework required into the comment field and select No. When the rework is complete, review again using this same review sheet and select Yes. Add date and additional comment stating that the rework is completed.
- To review a component with multiple source code files use the "Add Source" button to create a Source code tab for each source file.
- .h file should be reviewed with the source file as part of the source file.

Sheet 2: Synergy Project

Peer Review Meeting Log (Component Synergy Project Review)

Quality Check Items:

Rationale is required for all answers of No

New baseline version name from Summary Sheet follows

Yes

Comments:

naming convention

Project contains necessary subprojects

Yes

Comments:

Project contains the correct version of subprojects

Yes

Comments:

Design subproject is correct version

Yes

Comments:

General Notes / Comments:

LN: Intended Use: Identify who were the reviewers and if the reviewed changes have been approved. Rationale: Since this Form will be attached to the Change Request it will confirm the approval and provides feedback in case of audits. KMC: Group Review Level removed in Rev 4.0 since the design review is not checked in until approved, so it would always be DR4. Review Board:

Change Owner:

Matthew Leser

Review Date :

11/01/17

Lead Peer Reviewer:

Brendon Binder

Approved by Reviewer(s):

Yes

Other Reviewer(s):

Sheet 3: Davinci Files

Rev 1.2

8-Jun-15

Peer Review Meeting Log (Davinci Review)

Quality Check Items:

Rationale is required for all answers of No

Only StdDef Port types are used

N/A

Comments:

For components not using application data types, do all

N/A

Comments:

port interface names end in PortIf and a sequence number

Non-program-specific components saved

Yes

Comments:

in Autosar 4.0.3 format

*Cfg.arxml.TT: Verfied Davinci Configurator imported the

N/A

Comments:

change correctly

*Cfg.h.TT: Verfied Davinci Configurator generates

N/A

Comments:

the configuration header(s) file correctly

kzshz2: Either a generic sandbox or a baselined integration project can be used to verify

All changed files have been compared against previous

Yes

Comments:

versions (If available)

kzshz2: Intended Use: Identify if previous version was compared and only the expected change(s) was present. This is for text files only, not binary or GUIs Rationale: This is helpful in identifying unapproved (intended or mistaken) changes.

Automated validation check is performed

Yes

Comments:

Naming conventions followed. All names should

N/A

Comments:

match DataDict.m

Sender/Receiver port properties match DataDict.m

N/A

Comments:

file (use .m file helper tool)

Calibration port properties match DataDict.m

N/A

Comments:

file (use .m file helper tool)

Components using application data types:

Sender/Receiver port initialization values match

N/A

Comments:

DataDict.m file

Calibration port initialization values match

N/A

Comments:

DataDict.m file

Components not using application data types:

Sender/Receiver port initialization values match

Yes

Comments:

DataDict.m file and have been converted to counts

for fixed point types

Calibration port initialization values match

N/A

Comments:

DataDict.m file and have been converted to counts

for fixed point types

Mapping set and all unused items have been

N/A

Comments:

removed

All sender/receiver port read/writes using direct

N/A

Comments:

read/writes(List justification if not)

Runnable calling frequencies match FDD

N/A

Comments:

DataDict.m display variables: created as

N/A

Comments:

PerInstanceMemory. Matches the FDD

Component is correct component type

Yes

Comments:

General Notes / Comments:

Change Owner:

Matthew Leser

Review Date :

11/01/17

Component Type :

Application

Lead Peer Reviewer:

Brendon Binder

Approved by Reviewer(s):

Yes

Other Reviewer(s):

Sheet 4: Source Code

Rev 1.2

8-Jun-15

Peer Review Meeting Log (Source Code Review)

Source File Name:

BattVltgCorrln.c

Source File Revision:

Header File Name:

N/A

Header File Revision:

kzshz2: Intended Use: Identify which version of the source file is being review. Rationale: Required for traceability between source code and review. Auditors will likely require this. N/A

MDD Name:

BattVltgCorrln_MDD.doc

Revision:

FDD/SCIR/DSR/FDR/CM Name:

ES259B_BattVltgCorrln_Design

Revision:

1.4.0

Quality Check Items:

Rationale is required for all answers of No

Working EA4 Software Naming Convention followed:

for variable names

N/A

Comments:

for constant names

N/A

Comments:

for function names

N/A

Comments:

for other names (component, memory

N/A

Comments:

mapping handles, typedefs, etc.)

All paths assign a value to outputs, ensuring

N/A

Comments:

all outputs are initialized prior to being written

Requirements Tracability tags in code match the

N/A

Comments:

requirements tracability in the FDD

All variables are declared at the function level.

N/A

Comments:

Synergy version matches change history

kzshz2: Intended Use: Indicate that the the versioning was confirmed by the peer reviewer(s). Rationale: There have been many occassions where versions were not updated in files and as a result Unit Test were referencing wrong versions. This often time leads to the need to re-run of batch tests.

Yes

Comments:

and Version Control version in file comment block

Change log contains detailed description of changes

Yes

Comments:

and Work CR number

Code accurately implements FDD (Document or Model)

Yes

Comments:

Verified no Compiler Errors or Warnings

KMC: Intended Use: To confirm no compiler errors or warnings exist for the code under review (warnings from contract header files may be ignored). Rationale: This is needed to ensure there will be no errors discovered at the time of integration. A Sandox project should be used; QAC can find compiler errors but not warnings.

Yes

Comments:

Component.h is included

N/A

Comments:

All other includes are actually needed. (System includes

N/A

Comments:

only allowed in Nexteer library components)

Software Design and Coding Standards followed:

Version: 2.1

Code comments are clear, correct, and adequate

N/A

Comments:

and have been updated for the change: [N40] and

all other rules in the same section as rule [N40],

plus [N75], [N12], [N23], [N33], [N37], [N38],

[N48], [N54], [N77], [N79], [N72]

Source file (.c and .h) comment blocks are per

Yes

Comments:

standards and contain correct information: [N41], [N42]

Function comment blocks are per standards and

N/A

Comments:

contain correct information: [N43]

Code formatting (indentation, placement of

N/A

Comments:

braces, etc.) is per standards: [N5], [N55], [N56],

[N57], [N58], [N59]

Embedded constants used per standards; no

N/A

Comments:

"magic numbers": [N12]

Memory mapping for non-RTE code

N/A

Comments:

is per standard

All execution-order-dependent code can be

N/A

Comments:

recognized by the compiler: [N80]

All loops have termination conditions that ensure

N/A

Comments:

finite loop iterations: [N63]

All divides protect against divide by zero

N/A

Comments:

if needed: [N65]

All integer division and modulus operations

N/A

Comments:

handle negative numbers correctly: [N76]

All typecasting and fixed point arithmetic,

N/A

Comments:

including all use of fixed point macros and

timer functions, is correct and has no possibility

of unintended overflow or underflow: [N66]

All float-to-unsiged conversions ensure the.

N/A

Comments:

float value is non-negative: [N67]

All conversions between signed and unsigned

N/A

Comments:

types handle msb==1 as intended: [N78]

All pointer dereferencing protects against

N/A

Comments:

null pointer if needed: [N70]

Component outputs are limited to the legal range

N/A

Comments:

defined in the FDD DataDict.m file : [N53]

All code is mapped with FDD (all FDD

Yes

Comments:

subfunctions and/or model blocks identified

with code comments; all code corresponds to

some FDD subfunction and/or model block): [N40]

Review did not identify violations of other

Yes

Comments:

coding standard rules

Anomaly or Design Work CR created

N/A

Comments: List Anomaly or CR numbers

for any FDD corrections needed

General Notes / Comments:

Change Owner:

Matthew Leser

Review Date :

11/01/17

Lead Peer Reviewer:

Brendon Binder

Approved by Reviewer(s):

Yes

Other Reviewer(s):

Sheet 5: PolySpace

Rev 1.2

8-Jun-15

Peer Review Meeting Log (QAC/PolySpace Review)

Source File Name:

BattVltgCorrln.c

Source File Revision:

Source File Name:

Source File Revision:

Source File Name:

Source File Revision:

EA4 Static Analysis Compliance Guideline version:

01.03.00

Poly Space version:

Windows User: eg. 2013b 2013b

Polyspace sub project version:

Windows User: eg. TL108a_PolyspaceSuprt_1.0.0

Quality Check Items:

Rationale is required for all answers of No

Contract Folder's header files are appropriate and

kzshz2: Intended Use: Identify that the contract folder contains only the information required for this component. All other variables, constants, function prototypes, etc. should be removed. Rationale: This will help avoid unit testers having to considers object not used. It will also avoid having other files required for QAC.

Yes

Comments:

function prototypes match the latest component version

100% Compliance to the EA4 Static Analysis

Yes

Comments:

Compliance Guideline

Are previously added justification and deviation

Yes

Comments:

comments still appropriate

Do all MISRA deviation comments use approved

Yes

Comments:

deviation tags

Cyclomatic complexity and Static path count OK

Creager, Kathleen: use Browse Function Metrics, STCYC and STPTH

Yes

Comments:

for all functions in the component per Design

and Coding Standards rule [N47]

General Notes / Comments:

Unreachable code warning with respect to Lim_u08 is okay; output limit is required by design and coding standards.

Change Owner:

Matthew Leser

Review Date :

11/01/17

Lead Peer Reviewer:

Brendon Binder

Approved by Reviewer(s):

Yes

Other Reviewer(s):