Component Implementation

• 1: HwAg1Meas_IntegrationManual
• 2: HwAg1Meas_MDD
• 3: HwAg1Meas_PeerReview

1 - HwAg1Meas_IntegrationManual

Integration Manual

For

HwAg1Meas

VERSION: 6.0

DATE: 14-Aug-2017

Prepared By:

Software Engineering,

Nexteer Automotive,

Saginaw, MI, USA

Revision History

Table of Contents

1 Abbrevations And Acronyms 4

2 References 5

3 Dependencies 6

3.1 SWCs 6

3.2 Global Functions(Non RTE) to be provided to Integration Project 6

4 Configuration REQUIREMeNTS 7

4.1 Build Time Config 7

4.2 Configuration Files to be provided by Integration Project 7

4.3 Da Vinci Parameter Configuration Changes 7

4.4 DaVinci Interrupt Configuration Changes 7

4.5 Manual Configuration Changes 7

5 Integration DATAFLOW REQUIREMENTS 8

5.1 Required Global Data Inputs 8

5.2 Required Global Data Outputs 8

5.3 Specific Include Path present 8

6 Runnable Scheduling 9

7 Memory Map REQUIREMENTS 10

7.1 Mapping 10

7.2 Usage 10

7.3 NvM Blocks 10

7.4 RTE NvM Blocks 10

8 Compiler Settings 11

8.1 Preprocessor MACRO 11

8.2 Optimization Settings 11

9 Appendix 12

Abbrevations And Acronyms

References

This section lists the title & version of all the documents that are referred for development of this document

Dependencies

SWCs

Global Functions(Non RTE) to be provided to Integration Project

None

Configuration REQUIREMeNTS

Build Time Config

Configuration Files to be provided by Integration Project

HwAg1Meas_Cfg.h

Da Vinci Parameter Configuration Changes

DaVinci Interrupt Configuration Changes

Manual Configuration Changes

Integration DATAFLOW REQUIREMENTS

Required Global Data Inputs

Refer DataDict.m file in the FDD

Required Global Data Outputs

Refer DataDict.m file file in the FDD

Specific Include Path present

No

Runnable Scheduling

This section specifies the required runnable scheduling.

Memory Map REQUIREMENTS

Mapping

* Each …START_SEC… constant is terminated by a …STOP_SEC… constant as specified in the AUTOSAR Memory Mapping requirements.

Usage

Table 1: ARM Cortex R4 Memory Usage

NvM Blocks

RTE NvM Blocks

Note : Size of the NVM block if configured in developer

Compiler Settings

Preprocessor MACRO

None.

Optimization Settings

None.

Appendix

SENT2SPCO port out should be configured to be high level on port configurations refer CM10 for SPCO port configuration (SENT2SPCO shall be port level high). Port configuration SENT2SPCO output:

Port (that’s needs to be configured as SENT2SPCO) should be initialized as input dio with level high. The client call Iohwab_Setfctprphlhwag1_oper will reset the pin to output alterante mode for SENT2SPCO.

Design Recommandation:

- Port Config RSENT2 IO pin shall setup default input.

- Schedule execution of tasks as per below order at the end of 2ms task

1. "HwAg1MeasPer2"

2. "HwAg1MeasPer3"

3. "HwAg1MeasPer4"

4. "HwAg1MeasPer1"

- Schedule "HwAg1MeasPer4" & "HwAg1MeasPer1" shall at least 110us apart.

2 - HwAg1Meas_MDD

Module Design Document

For

HwAg1Meas

14-Aug-2017

Prepared For:

Software Engineering

Nexteer Automotive,

Saginaw, MI, USA

Prepared By:

Software Engineering,

Nexteer Automotive,

Saginaw, MI, USA

Change History

Table of Contents

1 Introduction 5

1.1 Purpose 5

1.2 Scope 5

2 HwAg1Meas High-Level Description 6

3 Design details of software module 7

3.1 Graphical representation of HwAg1Meas 7

3.2 Data Flow Diagram 7

3.2.1 Component level DFD 7

3.2.2 Function level DFD 7

4 Constant Data Dictionary 8

4.1 Program (fixed) Constants 8

4.1.1 Embedded Constants 8

5 Software Component Implementation 9

5.1 Sub-Module Functions 9

5.1.1 Init: HwAg1MeasInit1 9

5.1.1.1 Design Rationale 9

5.1.2 Per: HwAg1MeasPer1 9

5.1.2.1 Design Rationale 9

5.1.3 Per: HwAg1MeasPer2 9

5.1.3.1 Design Rationale 9

5.1.4 Per: HwAg1MeasPer3 9

5.1.4.1 Design Rationale 9

5.1.5 Per: HwAg1MeasPer4 9

5.1.5.1 Design Rationale 9

5.1.6 Per: HwAg1MeasPer5 9

5.1.6.1 Design Rationale 9

5.2 Server Runnables 10

5.2.1 HwAg1AutTrim 10

5.2.1.1 Design Rationale 10

5.2.2 HwAg1ClrLtch 10

5.2.2.1 Design Rationale 10

5.2.3 HwAg1ClrTrim 10

5.2.3.1 Design Rationale 10

5.2.4 HwAg1ReadTrim 10

5.2.4.1 Design Rationale 10

5.2.5 HwAg1TrimPrfmdSts 10

5.2.5.1 Design Rationale 10

5.2.6 HwAg1WrTrim 10

5.2.6.1 Design Rationale 10

5.3 Interrupt Functions 10

5.4 Module Internal (Local) Functions 11

5.4.1 Local Function #1 11

5.4.1.1 Design Rationale 11

5.4.2 Local Function #2 11

5.4.2.1 Design Rationale 11

5.4.3 Local Function #3 11

5.4.3.1 Design Rationale 11

6 Known Limitations with Design 12

7 UNIT TEST CONSIDERATION 13

Appendix A Abbreviations and Acronyms 14

Appendix B Glossary 15

Appendix C References 16

Introduction

Purpose

Refer to FDD.

Scope

HwAg1Meas High-Level Description

Refer to FDD

Design details of software module

Graphical representation of HwAg1Meas

Data Flow Diagram

Component level DFD

Refer to FDD

Function level DFD

Refer to FDD

Constant Data Dictionary

Program (fixed) Constants

Embedded Constants

Local Constants

* Refer to FDD for other constant definitions

Software Component Implementation

Sub-Module Functions

Init: HwAg1MeasInit1

Design Rationale

None

Per: HwAg1MeasPer1

Design Rationale

None

Per: HwAg1MeasPer2

Design Rationale

None

Per: HwAg1MeasPer3

Design Rationale

None

Per: HwAg1MeasPer4

Design Rationale

None

Per: HwAg1MeasPer5

Design Rationale

The implementation brings in the block “HwAg1Final” inside the True Condition of the “finalAbsAg” as the other error condition will just retain the previous value and rolling counter will not change. It saves extra instructions in the implementation to the match the FDD. Final Functionality is still the same.

Server Runnables

HwAg1AutTrim

Design Rationale

None

HwAg1ClrLtch

Design Rationale

None

HwAg1ClrTrim

Design Rationale

None

HwAg1ReadTrim

Design Rationale

None

HwAg1TrimPrfmdSts

Design Rationale

None

HwAg1WrTrim

Design Rationale

None

Interrupt Functions

None

Module Internal (Local) Functions

Local Function #1

Design Rationale

The implementation deviates from the FDD block “Intpn” block. The implementation finds the minimum of absolute values of the difference between HwAg1Step with all the values from the Calibration table and find the index associated with minimum value of the difference in the calibration table.

Local Function #2

Design Rationale

This function can be used both for read-and-use and for read-and-discard.

Local Function #3

Design Rationale

This function is split from Per4 to reduce path count and cyclomatic complexity.

Path in Model: CM670A_HwAg1Meas/HwAg1Meas/HwAg1MeasPer4/HwAgRead/Update Latch on value change

Known Limitations with Design

None

UNIT TEST CONSIDERATION

• Roll Over is intentional for

  • *Rte_Pim_HwAg1Snsr0ComStsErrCntr()

  • *Rte_Pim_HwAg1Snsr0IdErrCntr()

  • *Rte_Pim_HwAg1Snsr0IntSnsrErrCntr()

  • *Rte_Pim_HwAg1Snsr0NoMsgErrCntr()

  • *Rte_Pim_HwAg1Snsr1ComStsErrCntr()

  • *Rte_Pim_HwAg1Snsr1IdErrCntr()

  • *Rte_Pim_HwAg1Snsr1IntSnsrErrCntr()

  • *Rte_Pim_HwAg1Snsr1NoMsgErrCntr()

  • (*Rte_Pim_HwAg1PrevRollCnt).

• Thus, counter acts in circular

Abbreviations and Acronyms

Glossary

Note: Terms and definitions from the source “Nexteer Automotive” take precedence over all other definitions of the same term. Terms and definitions from the source “Nexteer Automotive” are formulated from multiple sources, including the following:

• ISO 9000

• ISO/IEC 12207

• ISO/IEC 15504

• Automotive SPICE® Process Reference Model (PRM)

• Automotive SPICE® Process Assessment Model (PAM)

• ISO/IEC 15288

• ISO 26262

• IEEE Standards

• SWEBOK

• PMBOK

• Existing Nexteer Automotive documentation

References

3 - HwAg1Meas_PeerReview

Rev 1.2

8-Jun-15

Peer Review Summary Sheet

Synergy Project Name:

kzshz2: Intended Use: Identify which component is being reviewed. This should be the Module Short Name from Synergy Rationale: Required for traceability. It will help to ensure this form is not attached to the wrong change request. CM670A_HwAg1Meas_Impl

Revision / Baseline:

kzshz2: Intended Use: Identify which Synergy revision of this component is being reviewed Rationale: Required for traceability. It will help to ensure this form is not attached to the wrong change request. CM670A_HwAg1Meas_Impl_3.1.0

Change Owner:

kzshz2: Intended Use: Identify the developer who made the change(s) Rationale: A change request may have more than one resolver, this will help identify who made what change. Change owner identification may be required by industry standards. Brionna Spencer

Work CR ID:

EA4#12552

kzshz2: Intended Use: Intended to identify at a high level to the reviewers which areas of the component have been changed. Rationale: This will be good information to know when ensuring appropriate reviews have been completed. Modified File Types:

kzshz2: Intended Use: Identify who where the reviewers, what they reviewed, and if the reviewed changes have been approved to release the code for testing. Comments here should be at a high-level, the specific comments should be present on the specific review form sheet. Rationale: Since this Form will be attached to the Change Request it will confirm the approval and provides feedback in case of audits. ADD DR Level Move reviewer and approval to individual checklist form Review Checklist Summary:

Reviewed:

Yes

MDD

Yes

Source Code

Yes

Polyspace

Yes

Integration Manual

Yes

DaVinci Files

Comments:

General Guidelines: - The reviews shall be performed over the portions of the component that were modified as a result of the Change Request. - New components should include FDD Owner and Integrator as apart of the Group Review Board (Source Code, Integration Manual, and DaVinci Files) - Enter any rework required into the comment field and select No. When the rework is complete, review again using this same review sheet and select Yes. Add date and additional comment stating that the rework is completed. - To review a component with multiple source code files use the "Add Source" button to create a Source code tab for each source file. - .h file should be reviewed with the source file as part of the source file.