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Component Implementation

1: FordMsg41EBusHiSpd_IntegrationManual
2: FordMsg41EBusHiSpd_MDD
3: FordMsg41EBusHiSpd_PeerReviewChecklist

Component Implementation

Component Documentation

1 - FordMsg41EBusHiSpd_IntegrationManual

Integration Manual

For

FordMsg41EBusHiSpd

VERSION: 2.0

DATE: 23-Apr-2018

Prepared By:

Nexteer ISC,

Bengaluru, INDIA.

Location: The official version of this document is stored in the Nexteer Configuration Management System.

Revision History

Sl. No.	Description	Author	Version	Date
1	Initial version	TATA	1.0	11/21/2017
2	Updated based on Model Version V4.0.0	Nexteer ISC	2.0	23-Apr-2018

Table of Contents

1 Abbrevations And Acronyms 4

2 References 5

3 Dependencies 6

3.1 SWCs 6

3.2 Global Functions(Non RTE) to be provided to Integration Project 6

4 Configuration REQUIREMeNTS 7

4.1 Build Time Config 7

4.2 Configuration Files to be provided by Integration Project 7

4.3 Da Vinci Parameter Configuration Changes 7

4.4 DaVinci Interrupt Configuration Changes 7

4.5 Manual Configuration Changes 7

5 Integration DATAFLOW REQUIREMENTS 8

5.1 Required Global Data Inputs 8

5.2 Required Global Data Outputs 8

5.3 Specific Include Path present 8

6 Runnable Scheduling 9

7 Memory Map REQUIREMENTS 10

7.1 Mapping 10

7.2 Usage 10

7.3 Non RTE NvM Blocks 10

7.4 RTE NvM Blocks 10

8 Compiler Settings 11

8.1 Preprocessor MACRO 11

8.2 Optimization Settings 11

9 Appendix 12

Abbrevations And Acronyms

Abbreviation	Description
DFD	Design Functional Diagram
MDD	Module Design Document
FDD	Functional Design Document

References

This section lists the title & version of all the documents that are referred for development of this document

Sr. No.	Title	Version
1	FDD: MM079A_FordMsg41EBusHiSpd_Design	See synergy sub project version
2	Software Naming Conventions	1.0
3	Software Coding Standards	2.1

Dependencies

SWCs

Module	Required Feature
None	N/A

Note : Referencing the external components should be avoided in most cases. Only in unavoidable circumstance external components should be referred. Developer should track the references.

Global Functions(Non RTE) to be provided to Integration Project

ComIPduCallout_BrakeSysFeatures_3_FD1, ComTimeoutNotification_SelDrvMdeChassis2_D_Rq

Configuration REQUIREMeNTS

Build Time Config

Modules	Notes
None	N/A

Configuration Files to be provided by Integration Project

None

Da Vinci Parameter Configuration Changes

Parameter	Notes	SWC
None	N/A

DaVinci Interrupt Configuration Changes

ISR Name	VIM #	Priority Dependency	Notes
None			N/A

Manual Configuration Changes

Constant	Notes	SWC
None	N/A

Integration DATAFLOW REQUIREMENTS

Required Global Data Inputs

Refer DataDict.m file

Required Global Data Outputs

Refer DataDict.m file

Specific Include Path present

Runnable Scheduling

This section specifies the required runnable scheduling.

Init	Scheduling Requirements	Trigger
FordMsg41EBusHiSpdInit1	None	RTE Init

Runnable	Scheduling Requirements	Trigger
FordMsg41EBusHiSpdPer1	None	RTE (10ms)

Srv Runnable

Scheduling Requirements

Trigger

ComIPduCallout_BrakeSysFeatures_3_FD1

None

On invocation of

ComIPduCallout_BrakeSysFeatures_3_HS2.Oper(NON-RTE)

Srv Runnable

Scheduling Requirements

Trigger

ComTimeoutNotification_SelDrvMdeChassis2_D_Rq

None

On invocation of

ComTimeoutNotification_SelDrvMdeChassis2_D_Rq.

Oper(NON-RTE)

Memory Map REQUIREMENTS

Mapping

Memory Section	Contents	Notes
None

* Each …START_SEC… constant is terminated by a …STOP_SEC… constant as specified in the AUTOSAR Memory Mapping requirements.

Usage

Feature	RAM	ROM
None

Table 1: ARM Cortex R4 Memory Usage

Non RTE NvM Blocks

Block Name

None

Note : Size of the NVM block if configured in developer

RTE NvM Blocks

Block Name

None

Note : Size of the NVM block if configured in developer

Compiler Settings

Preprocessor MACRO

None

Optimization Settings

None

Appendix

None

2 - FordMsg41EBusHiSpd_MDD

Module Design Document

For

FordMsg41EBusHiSpd

June 19, 20158

Prepared For:

Software Engineering

Nexteer Automotive,

Saginaw, MI, USA

Prepared By:

Nexteer ISC,

Bengaluru, INDIA.

Change History

Sl. No.	Description	Author	Version	Date
1	Initial Version	TATA	1.0	21-Nov-2017
2	Updated based on Model Version V4.0.0	Nexteer ISC	2.0	23-Apr-2018

Table of Contents

1 Introduction 5

1.1 Purpose 5

2 FordMsg41EBusHiSpd & High-Level Description 6

3 Design details of software module 7

3.1 Graphical representation of FordMsg41EBusHiSpd 7

3.2 Data Flow Diagram 7

3.2.1 Component level DFD 7

3.2.2 Function level DFD 7

4 Constant Data Dictionary 8

4.1 Program (fixed) Constants 8

4.1.1 Embedded Constants 8

5 Software Component Implementation 9

5.1 Sub-Module Functions 9

5.1.1 Init: FordMsg41EBusHiSpdInit1 9

5.1.1.1 Design Rationale 9

5.1.1.2 Module Outputs 9

5.1.2 Per: FordMsg41EBusHiSpdPer1 9

5.1.2.1 Design Rationale 9

5.1.2.2 Store Module Inputs to Local copies 9

5.1.2.3 Processing of function 9

5.1.2.4 Store Local copy of outputs into Module Outputs 9

5.2 Server Runnables 9

5.2.1 ComIPduCallout_BrakeSysFeatures_3_HS2_Oper 9

5.2.1.1 Design Rationale 9

5.2.1.2 (Processing of function) 9

5.2.2 ComTimeoutNotification_SelDrvMdeChassis2_D_Rq_Oper 9

5.2.2.1 Design Rationale 9

5.2.2.2 (Processing of function) 9

5.3 Interrupt Functions 10

5.4 Module Internal (Local) Functions 10

5.4.1 Local Function #1 10

5.4.1.1 Design Rationale 10

5.4.1.2 Processing 10

5.4.2 Local Function #2 10

5.4.2.1 Design Rationale 11

5.4.2.2 Processing 11

5.4.3 Local Function #3 11

5.4.3.1 Design Rationale 11

5.4.3.2 Processing 11

5.4.4 Local Function #4 11

5.4.4.1 Design Rationale 11

5.4.4.2 Processing 12

5.4.5 Local Function #5 12

5.4.5.1 Design Rationale 12

5.4.5.2 Processing 12

5.4.6 Local Function #5 12

5.4.6.1 Design Rationale 13

5.4.6.2 Processing 13

5.4.7 GLOBAL Function/Macro Definitions 13

6 Known Limitations with Design 14

7 UNIT TEST CONSIDERATION 15

Appendix A Abbreviations and Acronyms 16

Appendix B Glossary 17

Appendix C References 18

Introduction

Purpose

MDD for FordMsg41EBusHiSpd

FordMsg41EBusHiSpd & High-Level Description

Please refer FDD.

Design details of software module

Graphical representation of FordMsg41EBusHiSpd

Data Flow Diagram

Component level DFD

Function level DFD

Constant Data Dictionary

Program (fixed) Constants

Embedded Constants

Local Constants

Constant Name	Resolution	Units	Value
Please refer Data Dictionary .m file	NA	NA	NA

Software Component Implementation

Sub-Module Functions

Init: FordMsg41EBusHiSpdInit1

5.1.1.1 Design Rationale

5.1.1.2 Module Outputs

5.1.2 Per: FordMsg41EBusHiSpdPer1

5.1.2.1 Design Rationale

5.1.2.2 Store Module Inputs to Local copies

5.1.2.3 Processing of function

5.1.2.4 Store Local copy of outputs into Module Outputs

Server Runnables

5.2.1 ComIPduCallout_BrakeSysFeatures_3_HS2_Oper

5.2.1.1 Design Rationale

None

5.2.1.2 (Processing of function)

None

5.2.2 ComTimeoutNotification_SelDrvMdeChassis2_D_Rq_Oper

5.2.2.1 Design Rationale

None

5.2.2.2 (Processing of function)

None

Interrupt Functions

None

Module Internal (Local) Functions

Local Function #1

Function Name	DiagEna	Type	Min	Max
Arguments Passed	FordCanDtcInhb_Cnt_T_logl	boolean	FALSE	TRUE

	ClrDiagcFlgProxy_Cnt_T_u08	uint8	0U	1U
	FordSelDrvModEnad_Cnt_T_logl	boolean	FALSE	TRUE


	* DiagEna_Cnt_T_logl	boolean	FALSE	TRUE
	* ClrDiagcFlgProxyEna_Cnt_T_logl	boolean	FALSE	TRUE
Return Value	NA	NA	NA	NA

Design Rationale

None

Processing

Please refer to the below path in the FDD model.

MM079A_FordMsg41EBusHiSpd/FordMsg41EBusHiSpd/FordMsg41EBusHiSpdPer1/DiagEna

Local Function #2

Function Name	MsgMiss	Type	Min	Max
Arguments Passed	DiagEna_Cnt_T_logl	boolean	FALSE	TRUE
	ClrDiagcFlgProxyEna_Cnt_T_logl	boolean	FALSE	TRUE
	BusHiSpdMissMsgThd_Cnt_T_u16	Uint16	0U	65535U
Return Value	NA	NA	NA	NA

Design Rationale

None

Processing

Please refer to the below path in the FDD model.

MM079A_FordMsg41EBusHiSpd_400/FordMsg41EBusHiSpd/FordMsg41EBusHiSpdPer1/Msg_Missing

Local Function #3

Function Name	ChkElpdTi	Type	Min	Max
Arguments Passed	FordVehSelDrvModChassisVldInp_Cnt_T_logl	boolean	FALSE	TRUE
	VldElpdTi_Cnt_T_logl	boolean	FALSE	TRUE
	InvldElpdTi_Cnt_T_logl	boolean	FALSE	TRUE
Return Value	*FordVehSelDrvModChassisVld_Cnt_T_logl	boolean	FALSE	TRUE

Design Rationale

None

Processing

Please refer to the below path in the FDD model.

MM079A_FordMsg41EBusHiSpd_400/FordMsg41EBusHiSpd/FordMsg41EBusHiSpdPer1/Msg_Present/OutputProcessing/ChkElpdTi

Local Function #4

Function Name	FordVehSelDrvModChassisVldInpNtc	Type	Min	Max
Arguments Passed	FordVehPenSelDrvModVld_Cnt_T_logl	boolean	FALSE	TRUE
	BusHiSpdInvldThd_Cnt_T_u16	Uint16	0U	65535U
Return Value	NA	NA	NA	NA

Design Rationale

None

Processing

Please refer to the below path in the FDD model.

MM079A_FordMsg41EBusHiSpd_400/FordMsg41EBusHiSpd/FordMsg41EBusHiSpdPer1/Msg_Present/OutputProcessing/FordVehPenSelDrvModSelnProcessing

Local Function #5

Function Name	VldElpdTi	Type	Min	Max
Arguments Passed	FordVehSelDrvModChassisVldInp_Cnt_T_logl	boolean	FALSE	TRUE
	*VldElpdTi_Cnt_T_logl	boolean	FALSE	TRUE
	*InvldElpdTi_Cnt_T_logl	boolean	FALSE	TRUE
	*FordVehSelDrvModChassisVld_Cnt_T_logl	boolean	FALSE	TRUE
Return Value	NA	NA	NA	NA

Design Rationale

None

Processing

Please refer to the below path in the FDD model.

MM079A_FordMsg41EBusHiSpd_400/FordMsg41EBusHiSpd/FordMsg41EBusHiSpdPer1/Msg_Present/OutputProcessing/VldElpdTi

Local Function #6

Function Name	CalSeln	Type	Min	Max
Arguments Passed	FordEpsLifeCycMod_Cnt_T_u08	Uint8	0U	1U
	*VldElpdTi_Cnt_T_logl	boolean	FALSE	TRUE
	*InvldElpdTi_Cnt_T_logl	boolean	FALSE	TRUE
	*FordVehSelDrvModChassisVld_Cnt_T_logl	boolean	FALSE	TRUE
Return Value	NA	NA	NA	NA

Design Rationale

None

Processing

Please refer to the below path in the FDD model.

MM079A_FordMsg41EBusHiSpd_400/FordMsg41EBusHiSpd/FordMsg41EBusHiSpdPer1/CalSeln

GLOBAL Function/Macro Definitions

None

Known Limitations with Design

UNIT TEST CONSIDERATION

Abbreviations and Acronyms

Abbreviation or Acronym	Description

Glossary

Note: Terms and definitions from the source “Nexteer Automotive” take precedence over all other definitions of the same term. Terms and definitions from the source “Nexteer Automotive” are formulated from multiple sources, including the following:

ISO 9000
ISO/IEC 12207
ISO/IEC 15504
Automotive SPICE® Process Reference Model (PRM)
Automotive SPICE® Process Assessment Model (PAM)
ISO/IEC 15288
ISO 26262
IEEE Standards
SWEBOK
PMBOK
Existing Nexteer Automotive documentation

Term	Definition	Source
MDD	Module Design Document
DFD	Data Flow Diagram

References

Ref. #	Title	Version
1	AUTOSAR Specification of Memory Mapping (Link:AUTOSAR_SWS_MemoryMapping.pdf)	v1.3.0 R4.0 Rev 2
2	MDD Guideline	EA4 01.00.00
3	Software Naming Conventions.doc	1.0
4	Software Design and Coding Standards.doc	2.1
5	FDD: MM079A_FordMsg41EBusHiSpd_Design	See Synergy sub project version

3 - FordMsg41EBusHiSpd_PeerReviewChecklist

Overview

Summary Sheet
Davinci Files
Source Code
MDD
PolySpace

Sheet 1: Summary Sheet

Rev 2.00

29-Nov-17

Nexteer SWC Implementation Peer Review Summary Sheet

Component Short Name:

Windows User: Intended Use: Identify which component is being reviewed. This should match the component short name from the DataDict.m fileand the middle part of the Synergy project name, e.g. Assi for the SF001A_Assi_Impl Synergy project

MM079A_FordMsg41EBusHiSpd_Impl

Revision / Baseline:

Windows User: Intended Use: Identify the implementation baseline name intended to be used for the changed component when changes are approved E.g. SF001A_Assi_Impl_1.2.0

MM079A_FordMsg41EBusHiSpd_Impl_4.0.0

Change Owner:

Windows User: Intended Use: Identify the developer who made the change(s) being reviewed

Thenmozhi M

Work CR ID:

Windows User: Intended Use: Identify the Implementation Work CR whose work is being reviewed (may be more than one)

EA4#20148

kzshz2: Intended Use: Intended to identify at a high level to the reviewers which areas of the component have been changed. Rationale: This will be good information to know when ensuring appropriate reviews have been completed. Modified File Types:

Check the file types that needed modification for the Work CR(s); macros for the check boxes will populate the appropriate checklist tabs for the review.

kzshz2: Intended Use: Identify who where the reviewers, what they reviewed, and if the reviewed changes have been approved to release the code for testing. Comments here should be at a highlevel, the specific comments should be present on the specific review form sheet. Rationale: Since this Form will be attached to the Change Request it will confirm the approval and provides feedback in case of audits. ADD DR Level Move reviewer and approval to individual checklist form Review Checklist Summary:

Reviewed:

At start of review, all items below should be marked "No". At the end of the review, all items should be marked "Yes" or "N/A" where N/A indicates the reviewers have reviewed the existing (unchanged) item and confirmed no updates were needed for the Work CR(s).

N/A

MDD

Yes

Source Code

Yes

PolySpace

N/A

Integration Manual

Yes

Davinci Files

Comments:

Offline review was done for this component for timing as per management decision.

General Guidelines:
- The reviews shall be performed over the portions of the component that were modified as a result of the Change Request.
- New components should include SWC Owner and/or SWC Design author and Integrator and/or SW Lead as apart of the Group Review Board (Source Code, Integration Manual, and Davinci Files)
- Enter any rework required into the comment field and select No. When the rework is complete, review again using this same review sheet and select Yes. Add date and additional comment stating that the rework is completed.
- To review a component with multiple source code files use the "Add Source" button to create a Source code tab for each source file.
- .h file should be reviewed with the source file as part of the source file.

Each peer review shall start with a clean copy of the latest peer review checklist template. Before the peer review, the change owner shall:
o Review the previous component peer review and copy any relevant comments to the new review sheet.
o Review all checklist items and make all corrections needed, so that the component is ready for peer review. The expectation is that peer review should find very few issues,
because the change owner has already used the checklist to ensure the component changes are complete and correct.
o Fill in all file name and version information as needed on peer review checklist tabs (file names may be copied from the previous peer review where appropriate)
o Fill in checklist answers (Yes/No/NA pulldowns) ONLY on those items which are NA for the current change. All other checklist items should be blank going into the review
meeting.

During the peer review meeting:
o For each page of the review, first review the items already marked as N/A for this change, to confirm that reviewers agree with this assessment; change the checklist box to
blank if it is found that the item does apply.
o Then review the items with the checklist box blank. After reviewing each of these items, the checklist box will be marked as "Yes", or the checklist box will be marked as
"No" with needed rework indicated or with rationale indicated.
o If any items are marked "No" with rationale indicated, this must be approved by a software supervisor or the software manager; there is a line in the "Review Board" section
of each tab to indicate who approved the "No" items on that tab.

Sheet 2: Davinci Files

Rev 2.00

29-Nov-17

Nexteer SWC Implementation Peer Review Meeting Log (Davinci Review)

Quality Check Items:

Rationale is required for all answers of No

Only StdDef Port interfaces and datatypes are used

Yes

Comments:

(compare against TL107B to ensure only implementation

Ford_MM_5.arxml is used with StdDef

data types are used)

OBSOLETE/OBSELETE doesn’t appear in any arxml file

Yes

Comments:

Do all port interface names end in PortIf and a sequence

Yes

Comments:

number

Non-program-specific components saved

Yes

Comments:

in Autosar 4.0.3 format

For components with generated configurable content:

Yes

Comments:

*Cfg.arxml.TT: Verfied Davinci Configurator imported the

change correctly

*Cfg.h.TT: Verfied Davinci Configurator generates

Yes

Comments:

the configuration header file(s) correctly

All changed files have been compared against previous

kzshz2: Intended Use: Identify if previous version was compared and only the expected change(s) was present. This is for text files only, not binary or GUIs Rationale: This is helpful in identifying unapproved (intended or mistaken) changes.

N/A

Comments:

versions (If available) and changes match changes

Initial version

needed as described by the work CR(s), all parent CRs

and parent anomalies, and the SWC Design change log.

Davinci files accurately implement SWC Design (DataDict.m

Yes

Comments:

file) in all areas where arxml was changed and/or the

DataDict.m file was changed as shown by

comparing the DataDict.m from the current SWC Design

with the DataDict.m used in the previous implementation.

(This is NOT always the predecessor.)

Automated validation check is performed with no issues found

Yes

Comments:

Naming conventions followed. All names should

Yes

Comments:

match DataDict.m

Sender/Receiver port properties match DataDict.m file

Yes

Comments:

(name, data type, direction)

Calibration port properties match DataDict.m file

Yes

Comments:

(name, data type)

Sender/Receiver port initialization values match

Yes

Comments:

DataDict.m file and have been converted to counts

for fixed point types

Calibration port initialization values match

Yes

Comments:

DataDict.m file and have been converted to counts

for fixed point types

Mapping set and all unused items have been

Yes

Comments:

removed

All sender/receiver port read/writes using "Write (explicit)"

Yes

Comments:

and "Read (explicit by argument)"(List justification if not)

Runnable calling frequencies match DataDict.m file

Yes

Comments:

Runnable port access matches the DataDict.m file

Yes

Comments:

DataDict.m display variables: created as

N/A

Comments:

PerInstanceMemory. Name and data type match DataDict.m file.

Per Instance Memory names and data types

Yes

Comments:

match DataDict.m file

NVM blocks match DataDict.m file

N/A

Comments:

(Named per naming convention. Default block

used if specified in DataDict.m file. Data type

matches DatatDict.m file)

Component is correct component type

Yes

Comments:

General Notes / Comments:

Review Board:

Change Owner:

Thenmozhi M

Review Date :

04/30/18

Component Type :

Application

Lead Peer Reviewer:

Krishna Anne

Approved by Reviewer(s):

Yes

Integrator and or
SW lead:

Comments:

Other Reviewer(s):

Rationale/justification for items marked "No" approved by:

Sheet 3: Source Code

Rev 2.00

29-Nov-17

Nexteer SWC Implementation Peer Review Meeting Log (Source Code Review)

Source File Name:

FordMsg41EBusHiSpd.c

Source File Revision:

Windows User: Intended Use: Synergy version number of the file being reviewed. (Version number that Synergy displays on the checked out or unmodified file in the working project) 3

Header File Name:

Header File Revision:

Windows User: Intended Use: Synergy version number of the file being reviewed. (Version number that Synergy displays on the checked out or unmodified file in the working project) NA

MDD Name:

FordMsg41EBusHiSpd_MDD

Revision:

Windows User: Intended Use: Synergy version number of the file being reviewed. (Version number that Synergy displays on the checked out or unmodified file in the working project) 2

SWC Design Name:

MM079A_FordMsg41EBusHiSpd_Design

Revision:

Windows User: Intended Use: For FDDs, list the Synergy baseline number (just the number part of the Synergy baseline name) of the FDD baseline being implemented. E.g., for SF001A_Assi_Design_1.3.1, this field would say "1.3.1" 4.0.0

Quality Check Items:

Rationale is required for all answers of No

EA4 Common Naming Convention followed:

Yes

Version:1.0

EA4 Software Naming Convention followed:

Yes

Version:1.0

for variable names

Yes

Comments:

for constant names

Yes

Comments:

for function names

Yes

Comments:

for other names (component, memory

N/A

Comments:

mapping handles, typedefs, etc.)

Verified no possibility of uninitialized variables being

Yes

Comments:

written to component outputs or IRVs

Any requirements traceability tags have been removed

N/A

Comments:

from at least the changed areas of code

All variables are declared at the function level.

Yes

Comments:

Synergy version matches change history

kzshz2: Intended Use: Indicate that the the versioning was confirmed by the peer reviewer(s). Rationale: There have been many occassions where versions were not updated in files and as a result Unit Test were referencing wrong versions. This often time leads to the need to re-run of batch tests.

Yes

Comments:

and Version Control version in file comment block

Change log contains detailed description of changes

Yes

Comments:

(including any anomaly number(s) being fixed) and

Work CR number

Code accurately implements SWC Design (Document or Model)

Yes

Comments:

in all areas where code was changed and/or Simulink

model was color-coded as changed and/or mentioned

in SWC Design change log. (This item includes looking at all

layers of Simulink model for possible color coding not

reflected at a higher level, and includes looking at any

intermediate SWC Design versions between the version being

implemented and the version that was included as a

subproject in the previous implementation.)

Code comparison against previous version matches

N/A

Comments:

changes needed as described by the work CR(s), all

Initial version

parent CRs and parent anomalies, and the SWC

Design change log.

Verified no Compiler Errors or Warnings

KMC: Intended Use: To confirm no compiler errors or warnings exist for the code under review (warnings from contract header files may be ignored). Rationale: This is needed to ensure there will be no errors discovered at the time of integration. A Sandox project should be used.

Yes

Comments:

(and verified for all possible combinations

of any conditionally compiled code)

Component.h is included

N/A

Comments:

All other includes are actually needed. (System includes

N/A

Comments:

only allowed in Nexteer library components)

Software Design and Coding Standards followed:

Windows User: Intended Use: list version/revision of latest released Software Design and Coding Standards document. Version:2.1

Code comments are clear, correct, and adequate

Yes

Comments:

and have been updated for the change: [N40] and

all other rules in the same section as rule [N40],

plus [N75], [N12], [N23], [N33], [N37], [N38],

[N48], [N54], [N77], [N79], [N72]

Source file (.c and .h) comment blocks are per

Yes

Comments:

standards and contain correct information: [N41], [N42]

Function comment blocks are per standards and

Yes

Comments:

contain correct information: [N43]

Code formatting (indentation, placement of

Yes

Comments:

braces, etc.) is per standards: [N5], [N55], [N56],

[N57], [N58], [N59]

Embedded constants used per standards; no

Yes

Comments:

"magic numbers": [N12]

Memory mapping for non-RTE code

N/A

Comments:

is per standard

All access of motor control loop data uses macros

N/A

Comments:

generated by the motor control manager

All loops have termination conditions that ensure

N/A

Comments:

finite loop iterations: [N63]

All divides protect against divide by zero

N/A

Comments:

if needed: [N65]

All integer division and modulus operations

N/A

Comments:

handle negative numbers correctly: [N76]

All typecasting and fixed point arithmetic,

N/A

Comments:

including all use of fixed point macros and

timer functions, is correct and has no possibility

of unintended overflow or underflow: [N66]

All float-to-unsigned conversions ensure the.

N/A

Comments:

float value is non-negative: [N67]

All conversions between signed and unsigned

N/A

Comments:

types handle msb==1 as intended: [N78]

All pointer dereferencing protects against

N/A

Comments:

null pointer if needed: [N70]

Component outputs are limited to the legal range

N/A

Comments:

defined in the SWC Design DataDict.m file : [N53]

All code is mapped with SWC Design (all SWC

Yes

Comments:

Design subfunctions and/or model blocks identified

with code comments; all code corresponds to

some SWC Design subfunction and/or model block):

[N40]

Any other violations of design and coding

N/A

Comments:

standards noticed during the review are noted in the

comments section for rework.

Anomaly or Design Work CR created

N/A

Comments: List Anomaly or CR numbers

for any SWC Design corrections needed

General Notes / Comments:

Review Board:

Change Owner:

Thenmozhi M

Review Date :

04/30/18

Lead Peer Reviewer:

Krishna Anne

Approved by Reviewer(s):

Yes

SWC owner and/or
SWC Design author:

Comments:

Integrator and or
SW lead:

Comments:

Unit test co-ordinator:

Comments:

Other Reviewer(s):

Rationale/justification for items marked "No" approved by:

Sheet 4: MDD

Rev 2.00

29-Nov-17

Nexteer SWC Implementation Peer Review Meeting Log (MDD Review)

MDD Name:

FordMsg41EBusHiSpd_MDD

MDD Revision:

Source File Name:

FordMsg41EBusHiSpd.c

Source File Revision:

Source File Name:

FordMsg41EBusHiSpdNonRte.c

Source File Revision:

Source File Name:

Source File Revision:

Quality Check Items:

Rationale is required for all answers of No

Synergy version matches document

Yes

Comments:

Change log contains detailed description of changes

Yes

Comments:

Changes Highlighted (for Unit Tester)

N/A

Comments:

Initial version

Diagrams have been included per MDD Guideline

Yes

Comments:

and reviewed

All Design Exceptions and Limitations are listed

N/A

Comments:

Design rationale given for all global

N/A

Comments:

data not communicated through RTE ports, per

Design and Coding Standards rules [N9] and [N10].

All implementation details that differ from the SWC

N/A

Comments:

Design are noted and explained in Design Rationale

All Unit Test Considerations have been described

N/A

Comments:

General Notes / Comments:

Review Board:

Change Owner:

Thenmozhi M

Review Date :

04/30/18

Lead Peer Reviewer:

Krishna Anne

Approved by Reviewer(s):

Yes

Other Reviewer(s):

Rationale/justification for items marked "No" approved by:

Sheet 5: PolySpace

Rev 2.00

29-Nov-17

Nexteer SWC Implementation Peer Review Meeting Log (PolySpace Review)

Source File Name:

FordMsg41EBusHiSpd.c

Source File Revision:

Source File Name:

FordMsg41EBusHiSpdNonRte.c

Source File Revision:

Source File Name:

Source File Revision:

EA4 Static Analysis Compliance Guideline version:

01.03.00

Poly Space version:

Windows User: eg. 2013b

2013b

TL109A sub project version:

Quality Check Items:

Rationale is required for all answers of No

tools/local folders' header files are appropriate and

Yes

Comments:

function prototypes match the latest component version

100% Compliance to the EA4 Static Analysis

Yes

Comments:

Compliance Guideline

Are previously added justification and deviation

N/A

Comments:

comments still appropriate

Initial version

Do all MISRA deviation comments use approved

Yes

Comments:

deviation tags

For any component source files (.c, .h, generated Cfg.c and Cfg.h)

N/A

Comments:

with conditional compilation, has Polyspace been run with all

combinations of build constants that can be used together in a build?

(Note which conditional compilation results have been archived)

Cyclomatic complexity and Static path count OK

Yes

Comments:

for all functions in the component per Design

and Coding Standards rule [N47]

General Notes / Comments:

Review Board:

Change Owner:

Thenmozhi M

Review Date :

04/30/18

Lead Peer Reviewer:

Krishna Anne

Approved by Reviewer(s):

Yes

Other Reviewer(s):

Rationale/justification for items marked "No" approved by: