GateDrv0Ctrl_IntegrationManual
Integration Manual
For
Gate Drive 0 Control
VERSION: 3
DATE: 11-Sep-2017
Prepared By:
Shruthi Raghavan,
Nexteer Automotive,
Saginaw, MI, USA
Location: The official version of this document is stored in the Nexteer Configuration Management System.
Revision History
| Version | Description | Author | Date |
| 1 | Initial version | Rijvi Ahmed | 08-July-2016 |
| 2 | Updated for SPI MCAL update in FDD v2.2.0 | Shruthi Raghavan | 15-Mar-2017 |
| 3 | Details of new config parameter added. | Shruthi Raghavan | 11-Sep-2017 |
Table of Contents
3.2 Global Functions(Non RTE) to be provided to Integration Project 6
4 Configuration REQUIREMeNTS 7
4.2 Configuration Files to be provided by Integration Project 7
4.3 Da Vinci Parameter Configuration Changes 7
4.4 DaVinci Interrupt Configuration Changes 7
4.5 Manual Configuration Changes 7
5 Integration DATAFLOW REQUIREMENTS 8
5.1 Required Global Data Inputs 8
5.2 Required Global Data Outputs 8
5.3 Specific Include Path present 8
Abbrevations And Acronyms
| Abbreviation | Description |
| DFD | Design functional diagram |
| MDD | Module design Document |
References
This section lists the title & version of all the documents that are referred for development of this document
| Sr. No. | Title | Version |
| 1 | Software Naming Conventions | Process 04.04.02 |
| 2 | Software Coding Standards | Process 04.04.02 |
| 3 | FDD – ES311A GateDrv0Ctrl | See synergy sub project version |
Dependencies
SWCs
| Module | Required Feature |
| Spi_Renesas_Ar4.0.3_01.06.05_HF |
Note : Referencing the external components should be avoided in most cases. Only in unavoidable circumstance external components should be referred. Developer should track the references.
Global Functions(Non RTE) to be provided to Integration Project
None
Configuration REQUIREMeNTS
Build Time Config
| Modules | Notes | |
| None |
Configuration Files to be provided by Integration Project
None
Da Vinci Parameter Configuration Changes
| Parameter | Notes | SWC |
/Nexteer/GateDrv0Ctrl/GateDrv0CtrlGenCfg/ GateDrv0FetFltMtgtnEna | GATEDRV0FETFLTMTGTNENA_ULS_LOGL: Field effect transistor fault mitigation enable. If TRUE, the gate drive component will notify the system when a FET fault is detected. | GateDrv0Ctrl |
DaVinci Interrupt Configuration Changes
| ISR Name | VIM # | Priority Dependency | Notes |
| None |
Manual Configuration Changes
| Constant | Notes | SWC |
| None |
Integration DATAFLOW REQUIREMENTS
Required Global Data Inputs
See FDD DataDict.m.
Required Global Data Outputs
See FDD DataDict.m.
Specific Include Path present
No
Runnable Scheduling
This section specifies the required runnable scheduling.
| Init | Scheduling Requirements | Trigger |
| GateDrv0CtrlInit1 | None | RTE (Init) |
| Runnable | Scheduling Requirements | Trigger |
| GateDrv0CtrlPer1 | At the beginning of all 2ms Tasks as close as possible | RTE (2 ms) |
| GateDrv0CtrlPer2 | At the end of all 2ms Tasks as close as possible | RTE (2 ms) |
Memory Map REQUIREMENTS
Mapping
| Memory Section * | Contents | Notes |
| None |
* Each …START_SEC… constant is terminated by a …STOP_SEC… constant as specified in the AUTOSAR Memory Mapping requirements.
Usage
| Feature | RAM | ROM |
| None |
Non RTE NvM Blocks
| Block Name |
| None |
Note : Size of the NVM block if configured in configurator
RTE NvM Blocks
| Block Name |
| None |
Note : Size of the NVM block if configured in developer
Compiler Settings
Preprocessor MACRO
None
Optimization Settings
None