Component Implementation

• 1: requirements
• 2: SinVltgGenn_DesignReview
• 3: SinVltgGenn_IntegrationManual
• 4: SinVltgGenn_MDD

1 - requirements

2 - SinVltgGenn_DesignReview

Rev 1.2

8-Jun-15

Peer Review Summary Sheet

Synergy Project Name:

kzshz2: Intended Use: Identify which component is being reviewed. This should be the Module Short Name from Synergy Rationale: Required for traceability. It will help to ensure this form is not attaced to the the wrong change request. ES300A_SinVltgGenn_Impl

Revision / Baseline:

kzshz2: Intended Use: Identify which Synergy revision of this component is being reviewed Rationale: Required for traceability. It will help to ensure this form is not attaced to the the wrong change request. 1.5.0

Change Owner:

kzshz2: Intended Use: Identify the developer who made the change(s) Rationale: A change request may have more than one resolver, this will help identify who made what change. Change owner identification may be required by indusrty standards. Selva Sengottaiyan

Work CR ID:

EA4# 5735

kzshz2: Intended Use: Intended to identify at a high level to the reviewers which areas of the component have been changed. Rationale: This will be good information to know when ensuring appropriate reviews have been completed. Modified File Types:

kzshz2: Intended Use: Identify who where the reviewers, what they reviewed, and if the reviewed changes have been approved to release the code for testing. Comments here should be at a highlevel, the specific comments should be present on the specific review form sheet. Rationale: Since this Form will be attached to the Change Request it will confirm the approval and provides feedback in case of audits. ADD DR Level Move reviewer and approval to individual checklist form Review Checklist Summary:

Reviewed:

N/A

MDD

N/A

Source Code

N/A

PolySpace

N/A

Integration Manual

N/A

Davinci Files

Comments:

Implemented v1.5.0. No code changes. Just new design brought in to synergy project

General Guidelines: - The reviews shall be performed over the portions of the component that were modified as a result of the Change Request. - New components should include FDD Owner and Integrator as apart of the Group Review Board (Source Code, Integration Manual, and Davinci Files) - Enter any rework required into the comment field and select No. When the rework is complete, review again using this same review sheet and select Yes. Add date and additional comment stating that the rework is completed. - To review a component with multiple source code files use the "Add Source" button to create a Source code tab for each source file. - .h file should be reviewed with the source file as part of the source file.

3 - SinVltgGenn_IntegrationManual

Integration Manual

For

Sine Voltage Generation

VERSION: 1

DATE: 11-June-2015

Location: The official version of this document is stored in the Nexteer Configuration Management System.

Revision History

Table of Contents

1 Abbrevations And Acronyms 4

2 References 5

3 Dependencies 6

3.1 SWCs 6

3.2 Global Functions(Non RTE) to be provided to Integration Project 6

4 Configuration REQUIREMeNTS 7

4.1 Build Time Config 7

4.2 Configuration Files to be provided by Integration Project 7

4.3 Da Vinci Parameter Configuration Changes 7

4.4 DaVinci Interrupt Configuration Changes 7

4.5 Manual Configuration Changes 7

5 Integration DATAFLOW REQUIREMENTS 8

5.1 Required Global Data Inputs 8

5.2 Required Global Data Outputs 8

5.3 Specific Include Path present 8

6 Runnable Scheduling 9

7 Memory Map REQUIREMENTS 10

7.1 Mapping 10

7.2 Usage 10

7.3 Non RTE NvM Blocks 10

7.4 RTE NvM Blocks 10

8 Compiler Settings 11

8.1 Preprocessor MACRO 11

8.2 Optimization Settings 11

Abbrevations And Acronyms

References

This section lists the title & version of all the documents that are referred for development of this document

Dependencies

SWCs

Note : Referencing the external components should be avoided in most cases. Only in unavoidable circumstance external components should be referred. Developer should track the references.

Global Functions(Non RTE) to be provided to Integration Project

SinVltgGennPer1

SinVltgGennPer2

Configuration REQUIREMeNTS

Build Time Config

Configuration Files to be provided by Integration Project

None

Da Vinci Parameter Configuration Changes

DaVinci Interrupt Configuration Changes

Manual Configuration Changes

Integration DATAFLOW REQUIREMENTS

Required Global Data Inputs

See design model for details.

Required Global Data Outputs

See design model for details.

Specific Include Path present

Yes

Runnable Scheduling

This section specifies the required runnable scheduling.

Memory Map REQUIREMENTS

Mapping

* Each …START_SEC… constant is terminated by a …STOP_SEC… constant as specified in the AUTOSAR Memory Mapping requirements.

Usage

Non RTE NvM Blocks

Note : Size of the NVM block if configured in configurator

RTE NvM Blocks

Note : Size of the NVM block if configured in developer

Compiler Settings

Preprocessor MACRO

None

Optimization Settings

None

4 - SinVltgGenn_MDD

Module Design Document

For

Sine Voltage Generation

Mar 20, 2016

Prepared For:

Software Engineering

Nexteer Automotive,

Saginaw, MI, USA

Prepared By:

SEPG,

Nexteer Automotive,

Saginaw, MI, USA

Change History

Table of Contents

1 Introduction 5

1.1 Purpose 5

1.2 Scope 5

2 SinVltgGenn & High-Level Description 6

3 Design details of software module 7

3.1 Graphical representation of SinVltgGenn 7

3.2 Data Flow Diagram 7

3.2.1 Component level DFD 7

3.2.2 Function level DFD 7

4 Constant Data Dictionary 8

4.1 Program (fixed) Constants 8

4.1.1 Embedded Constants 8

5 Software Component Implementation 9

5.1 Sub-Module Functions 9

5.2 Initialization Functions 9

5.2.1 Init: SinVltgGennInit1 9

5.2.1.1 Design Rationale 9

5.2.1.2 Module Internal 9

5.3 PERIODIC FUNCTIONS 9

5.3.1 Per: SinVltgGennPer1 9

5.3.1.1 Design Rationale 9

5.3.1.2 Processing of Function 9

5.3.2 Per: SinVltgGennPer2 9

5.3.2.1 Design Rationale 9

5.3.2.2 Processing of Function 9

5.4 Server Runables 9

5.5 Interrupt Functions 10

5.6 Module Internal (Local) Functions 10

5.6.1 Local Function #1 10

5.6.1.1 Description 10

5.7 GLOBAL Function/Macro Definitions 10

6 Known Limitations with Design 11

7 UNIT TEST CONSIDERATION 12

Appendix A Abbreviations and Acronyms 13

Appendix B Glossary 14

Appendix C References 15

Introduction

Purpose

None

Scope

• None

SinVltgGenn & High-Level Description

The component contains two source files, both described in this MDD: CDD_ SinVltgGenn.c contains the RTE init runnable; CDD_SinVltgGenn_MotCtrl.c contains the motor control runnable.

Refer the Design for high level Description

Design details of software module

Graphical representation of SinVltgGenn

Data Flow Diagram

None

Component level DFD

Function level DFD

Constant Data Dictionary

Program (fixed) Constants

Embedded Constants

Local Constants

Software Component Implementation

Note: All the non RTE signals defined in m file are implemented as global varibles managed by motor control manager. RTE can not manage motor control runnables inputs and outputs.

Sub-Module Functions

None

Initialization Functions

Init: SinVltgGennInit1

Design Rationale

None

Module Internal

See design model for details.

PERIODIC FUNCTIONS

Per: SinVltgGennPer1

Design Rationale

Inputs and outputs are globals since its non RTE (MotorControl ISR) function.

Note: Instead of division operation, multiplication with ‘NXTRFIXDPT_P16TOFLOAT_ULS_F32’ used.

Processing of Function

See design model for details.

Per: SinVltgGennPer2

Design Rationale

Inputs and outputs are globals since its non RTE (MotorControl ISR) function.

Note: outputs are not limited in SW as max limit is set to U32 range in design.

Processing of Function

See design model for details.

Server Runables

None

Interrupt Functions

None

Module Internal (Local) Functions

Local Function #1

Description

Function corresponds to 'Subsystem1/Subsystem2/Subsystem3' block implementation. Subsystems 1 through 3 have common processing.

GLOBAL Function/Macro Definitions

None

Known Limitations with Design

None

UNIT TEST CONSIDERATION

None

Abbreviations and Acronyms

Glossary

Note: Terms and definitions from the source “Nexteer Automotive” take precedence over all other definitions of the same term. Terms and definitions from the source “Nexteer Automotive” are formulated from multiple sources, including the following:

• ISO 9000

• ISO/IEC 12207

• ISO/IEC 15504

• Automotive SPICE® Process Reference Model (PRM)

• Automotive SPICE® Process Assessment Model (PAM)

• ISO/IEC 15288

• ISO 26262

• IEEE Standards

• SWEBOK

• PMBOK

• Existing Nexteer Automotive documentation

References