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Component Implementation

1: requirements
2: SysStMod_IntegrationManual
3: SysStMod_MDD
4: SysStMod_PeerReviewChecklist

Component Implementation

Component Documentation

1 - requirements

FDD	ID	Source	Function	Line(s)	Status	Comment
		.SwFileName	.SwFuncName	.SwLines	.SwStatus	.SwComment
ES100A	88	SysStMod.c	SysStModPer1	222-230,313	I
ES100A	89	SysStMod.c	SysStModPer1	202-210,309	I
ES100A	65	SysStMod.c	SysStModPer1	248	I
ES100A	66	SysStMod.c	SysStModPer1	251	I
ES100A	67	SysStMod.c	SysStModPer1	250	I
ES100A	68	SysStMod.c	SysStModPer1	252	I
ES100A	69	SysStMod.c	SysStModPer1	249	I
ES100A	87	SysStMod.c	SysStModInit1	142-144	I
ES100A	85	SysStMod.c	SysStModPer1	212-220,305	I
ES100A	48	SysStMod.c	SysStModPer1	246	I
ES100A	187	SysStMod.c	SysStModPer1	313	I
ES100A	188	SysStMod.c	SysStModPer1	313	I
ES100A	78	SysStMod.c	SysStModPer1	191,294-331	P	Integration dependent - runnable placement should be noted in integration manual
ES100A	77	SysStMod.c	SysStModPer1	190,294-331	P	Integration dependent - periodic is scheduled at 2ms in Developer model
ES100A	98	SysStMod.c	SysStModPer1	295,297	I
ES100A	73	SysStMod.c	SysStModPer1	257-290	I
ES100A	70	SysStMod.c	SysStModPer1	247	I
ES100A	91	SysStMod.c	SysStModPer1	295,297	I
ES100A	90	SysStMod.c	SysStModPer1	301	I
ES100A	93	SysStMod.c	SysStModPer1	295,297	I
ES100A	92	SysStMod.c	SysStModPer1	295,297	I
ES100A	95	SysStMod.c	SysStModPer1	315-321	I
ES100A	94	SysStMod.c	SysStModPer1	301	I
ES100A	97	SysStMod.c	SysStModPer1	295,297	I
ES100A	96	SysStMod.c	SysStModPer1	295,297	I
ES100A	99	SysStMod.c	SysStModPer1	325	I
ES100A	76	SysStMod.c	SysStModPer1	257-290	I
ES100A	32	SysStMod.c	SysStModPer1	333	I
ES100A	51	SysStMod.c	SysStModPer1	333	I
ES100A	53	SysStMod.c	SysStModPer1	329	I

2 - SysStMod_IntegrationManual

Integration Manual

For

System States and Modes

VERSION: 1

DATE: 20-Mar-2015

Location: The official version of this document is stored in the Nexteer Configuration Management System.

Revision History

Version	Description	Author	Date
1	Initial version	Owen Tosh	20-Mar-2015

Table of Contents

1 Abbrevations And Acronyms 4

2 References 5

3 Dependencies 6

3.1 SWCs 6

3.2 Global Functions(Non RTE) to be provided to Integration Project 6

4 Configuration REQUIREMeNTS 7

4.1 Build Time Config 7

4.2 Configuration Files to be provided by Integration Project 7

4.3 Da Vinci Parameter Configuration Changes 7

4.4 DaVinci Interrupt Configuration Changes 7

4.5 Manual Configuration Changes 7

5 Integration DATAFLOW REQUIREMENTS 8

5.1 Required Global Data Inputs 8

5.2 Required Global Data Outputs 8

5.3 Specific Include Path present 8

6 Runnable Scheduling 9

7 Memory Map REQUIREMENTS 10

7.1 Mapping 10

7.2 Usage 10

7.3 Non RTE NvM Blocks 10

7.4 RTE NvM Blocks 10

8 Compiler Settings 11

8.1 Preprocessor MACRO 11

8.2 Optimization Settings 11

Abbrevations And Acronyms

Abbreviation	Description
DFD	Design functional diagram
MDD	Module design Document

References

This section lists the title & version of all the documents that are referred for development of this document

Sr. No.	Title	Version
1	Software Naming Conventions	Process 03.05.00
2	Software Coding Standards	Process 03.05.00

Dependencies

SWCs

Module	Required Feature
None

Note : Referencing the external components should be avoided in most cases. Only in unavoidable circumstance external components should be referred. Developer should track the references.

Global Functions(Non RTE) to be provided to Integration Project

None

Configuration REQUIREMeNTS

Build Time Config

Modules	Notes
None

Configuration Files to be provided by Integration Project

None

Da Vinci Parameter Configuration Changes

Parameter	Notes	SWC
None

DaVinci Interrupt Configuration Changes

ISR Name	VIM #	Priority Dependency	Notes
None

Manual Configuration Changes

Constant	Notes	SWC
None

Integration DATAFLOW REQUIREMENTS

Required Global Data Inputs

See design model for details.

Required Global Data Outputs

See design model for details.

Specific Include Path present

Runnable Scheduling

This section specifies the required runnable scheduling.

Init	Scheduling Requirements	Trigger
SysStModInit1	None	RTE (init)

Runnable	Scheduling Requirements	Trigger
SysStModPer1	After all modules that provide inputs to this module	RTE (2 ms)

Memory Map REQUIREMENTS

Mapping

Memory Section *	Contents	Notes
None

* Each …START_SEC… constant is terminated by a …STOP_SEC… constant as specified in the AUTOSAR Memory Mapping requirements.

Usage

Feature	RAM	ROM
None

Non RTE NvM Blocks

Block Name

None

Note : Size of the NVM block if configured in configurator

RTE NvM Blocks

Block Name

None

Note : Size of the NVM block if configured in developer

Compiler Settings

Preprocessor MACRO

None

Optimization Settings

None

3 - SysStMod_MDD

Module Design Document

For

System States and Modes

VERSION: 2

DATE: 05-Apr-2016

Location: The official version of this document is stored in the Nexteer Configuration Management System.

Revision History

Version	Description	Author	Date
1	Initial version	Owen Tosh	25-Mar-2015
2	Updated for FDD ver 1.3.0	Sankardu Varadapureddi	05-Apr-2016

Table of Contents

1 Abbrevations And Acronyms 4

2 References 5

3 SysStMod & High-Level Description 6

4 Design details of software module 7

4.1 Graphical representation of SysStMod 7

5 Variable Data Dictionary 8

5.1 User defined typedef definition/declaration 8

5.2 Variable definition for enumerated types 8

6 Constant Data Dictionary 9

6.1 Program(fixed) Constants 9

6.1.1 Embedded Constants 9

6.1.1.1 Local 9

6.1.1.2 Global 9

6.1.2 Module specific Lookup Tables Constants 10

7 Software Module Implementation 11

7.1 Sub-Module Functions 11

7.2 Initialization Functions 11

7.2.1 Init: SysStMd_Init1 11

7.2.1.1 Design Rationale 11

7.2.1.2 Module Internal 11

7.3 PERIODIC FUNCTIONS 11

7.3.1 Per: SysStMd_Per1 11

7.3.1.1 Design Rationale 11

7.3.1.2 Processing of Function 11

7.4 Interrupt Functions 11

7.5 Serial Communication Functions 11

7.6 Local Function/Macro Definitions 11

7.7 GLObAL Function/Macro Definitions 11

8 Known Limitations With Design 12

9 UNIT TEST CONSIDERATION 13

Abbrevations And Acronyms

Abbreviation	Description
DFD	Design functional diagram
MDD	Module design Document

References

This section lists the title & version of all the documents that are referred for development of this document

Sr. No.	Title	Version
1	MDD Guidelines	Process 03.05.00
2	Software Naming Conventions	Process 03.05.00
3	Software Coding Standards	Process 03.05.00

SysStMod & High-Level Description

This module manages the overall system state based on ignition, startup test completion, and fault status. It arbitrates between the various demands on the system state and manages the transition decisions with a lookup table, dependent on the current state.

Design details of software module

Graphical representation of SysStMod

Variable Data Dictionary

User defined typedef definition/declaration

Typedef Name

Element Name

User Defined Type

Legal Range

(min)

Legal Range

(max)

None

Variable definition for enumerated types

Enum Name	Element Name	Value
None

Constant Data Dictionary

Program(fixed) Constants

Embedded Constants

Local

Constant Name	Resolution	Units	Value
SYSSTREQENBIT_CNT_U16	1	Count	0x04
PWRSPLYENREQBIT_CNT_U16	1	Count	0x10
SYSSTFLTOUTPREQDIBIT_CNT_U16	1	Count	0x08
SYSSTREQDIBIT_CNT_U16	1	Count	0x02
SYSSTWRMININCMPLBIT_CNT_U16	1	Count	0x01

Global

Constant Name

None

Module specific Lookup Tables Constants

Constant Name	Resolution	Value	Software Segment
See design M file for details

Software Module Implementation

Sub-Module Functions

None

Initialization Functions

Init: SysStModInit1

Design Rationale

None

Module Internal

See design model for details.

PERIODIC FUNCTIONS

Per: SysStMdPer1

Design Rationale

The logic around building the transition vector does not match the design model exactly for efficiency and coding standard reasons. They are identical functionally, however.

Processing of Function

See design model for details.

Interrupt Functions

None

Serial Communication Functions

None

Local Function/Macro Definitions

None

GLObAL Function/Macro Definitions

None

Known Limitations With Design

None

UNIT TEST CONSIDERATION

None

4 - SysStMod_PeerReviewChecklist

Overview

Summary Sheet
Synergy Project
Davinci Files
Source Code
MDD
PolySpace

Sheet 1: Summary Sheet

Rev 1.2

8-Jun-15

Peer Review Summary Sheet

Synergy Project Name:

kzshz2: Intended Use: Identify which component is being reviewed. This should be the Module Short Name from Synergy Rationale: Required for traceability. It will help to ensure this form is not attaced to the the wrong change request. ES100A_SysStMod_Impl

Revision / Baseline:

kzshz2: Intended Use: Identify which Synergy revision of this component is being reviewed Rationale: Required for traceability. It will help to ensure this form is not attaced to the the wrong change request. 1.1.0

Change Owner:

kzshz2: Intended Use: Identify the developer who made the change(s) Rationale: A change request may have more than one resolver, this will help identify who made what change. Change owner identification may be required by indusrty standards. Sankardu Varadapureddi

Work CR ID:

EA4#5086

kzshz2: Intended Use: Intended to identify at a high level to the reviewers which areas of the component have been changed. Rationale: This will be good information to know when ensuring appropriate reviews have been completed. Modified File Types:

kzshz2: Intended Use: Identify who where the reviewers, what they reviewed, and if the reviewed changes have been approved to release the code for testing. Comments here should be at a highlevel, the specific comments should be present on the specific review form sheet. Rationale: Since this Form will be attached to the Change Request it will confirm the approval and provides feedback in case of audits. ADD DR Level Move reviewer and approval to individual checklist form Review Checklist Summary:

Reviewed:

N/A

MDD

Yes

Source Code

Yes

PolySpace

N/A

Integration Manual

Yes

Davinci Files

Comments:

In .m file "SysStReqEn" is renamed as "SysStReqEna" and "PwrSplyEnReq" is renamed as "PwrSplyEnaReq". So

only corresponding changes are reviewed.

General Guidelines:
- The reviews shall be performed over the portions of the component that were modified as a result of the Change Request.
- New components should include FDD Owner and Integrator as apart of the Group Review Board (Source Code, Integration Manual, and Davinci Files)
- Enter any rework required into the comment field and select No. When the rework is complete, review again using this same review sheet and select Yes. Add date and additional comment stating that the rework is completed.
- To review a component with multiple source code files use the "Add Source" button to create a Source code tab for each source file.
- .h file should be reviewed with the source file as part of the source file.

Sheet 2: Synergy Project

Peer Review Meeting Log (Component Synergy Project Review)

Quality Check Items:

Rationale is required for all answers of No

New baseline version name from Summary Sheet follows

Yes

Comments:

naming convention

Project contains necessary subprojects

Yes

Comments:

Project contains the correct version of subprojects

Yes

Comments:

Design subproject is correct version

Yes

Comments:

General Notes / Comments:

LN: Intended Use: Identify who were the reviewers and if the reviewed changes have been approved. Rationale: Since this Form will be attached to the Change Request it will confirm the approval and provides feedback in case of audits. KMC: Group Review Level removed in Rev 4.0 since the design review is not checked in until approved, so it would always be DR4. Review Board:

Change Owner:

Sankardu Varadapureddi

Review Date :

04/05/16

Lead Peer Reviewer:

Nick Saxton

Approved by Reviewer(s):

Yes

Other Reviewer(s):

Sheet 3: Davinci Files

Rev 1.2

8-Jun-15

Peer Review Meeting Log (Davinci Review)

Quality Check Items:

Rationale is required for all answers of No

Only StdDef Port types are used

Yes

Comments:

For components not using application data types, do all

Yes

Comments:

port interface names end in PortIf and a sequence number

Non-program-specific components saved

Yes

Comments:

in Autosar 4.0.3 format

*Cfg.arxml.TT: Verfied Davinci Configurator imported the

N/A

Comments:

change correctly

*Cfg.h.TT: Verfied Davinci Configurator generates

N/A

Comments:

the configuration header(s) file correctly

kzshz2: Either a generic sandbox or a baselined integration project can be used to verify

All changed files have been compared against previous

Yes

Comments:

versions (If available)

kzshz2: Intended Use: Identify if previous version was compared and only the expected change(s) was present. This is for text files only, not binary or GUIs Rationale: This is helpful in identifying unapproved (intended or mistaken) changes.

Automated validation check is performed

Yes

Comments:

Naming conventions followed. All names should

Yes

Comments:

match DataDict.m

Sender/Receiver port properties match DataDict.m

Yes

Comments:

file (use .m file helper tool)

Calibration port properties match DataDict.m

N/A

Comments:

file (use .m file helper tool)

Components using application data types:

Sender/Receiver port initialization values match

N/A

Comments:

DataDict.m file

Calibration port initialization values match

N/A

Comments:

DataDict.m file

Components not using application data types:

Sender/Receiver port initialization values match

Yes

Comments:

DataDict.m file and have been converted to counts

for fixed point types

Calibration port initialization values match

N/A

Comments:

DataDict.m file and have been converted to counts

for fixed point types

Mapping set and all unused items have been

N/A

Comments:

removed

All sender/receiver port read/writes using direct

Yes

Comments:

read/writes(List justification if not)

Runnable calling frequencies match FDD

N/A

Comments:

DataDict.m display variables: created as

N/A

Comments:

PerInstanceMemory. Matches the FDD

Component is correct component type

N/A

Comments:

General Notes / Comments:

Change Owner:

Sankardu Varadapureddi

Review Date :

04/05/16

Component Type :

Application

Lead Peer Reviewer:

Nick Saxton

Approved by Reviewer(s):

Yes

Other Reviewer(s):

Sheet 4: Source Code

Rev 1.2

8-Jun-15

Peer Review Meeting Log (Source Code Review)

Source File Name:

SysStMod.c

Source File Revision:

Header File Name:

N/A

Header File Revision:

kzshz2: Intended Use: Identify which version of the source file is being review. Rationale: Required for traceability between source code and review. Auditors will likely require this. N/A

MDD Name:

SysStMod_MDD.docx

Revision:

FDD/SCIR/DSR/FDR/CM Name:

ES100A_SysStMod_Design

Revision:

1.3.0

Quality Check Items:

Rationale is required for all answers of No

Working EA4 Software Naming Convention followed:

Yes

for variable names

Yes

Comments:

for constant names

N/A

Comments:

for function names

N/A

Comments:

for other names (component, memory

N/A

Comments:

mapping handles, typedefs, etc.)

All paths assign a value to outputs, ensuring

Yes

Comments:

all outputs are initialized prior to being written

Requirements Tracability tags in code match the requirements tracability in the FDD

Yes

Comments:

requirements tracability in the FDD

All variables are declared at the function level.

Yes

Comments:

Synergy version matches change history

kzshz2: Intended Use: Indicate that the the versioning was confirmed by the peer reviewer(s). Rationale: There have been many occassions where versions were not updated in files and as a result Unit Test were referencing wrong versions. This often time leads to the need to re-run of batch tests.

Yes

Comments:

and Version Control version in file comment block

Change log contains detailed description of changes

Yes

Comments:

and Work CR number

Code accurately implements FDD (Document or Model)

Yes

Comments:

Verified no Compiler Errors or Warnings

KMC: Intended Use: To confirm no compiler errors or warnings exist for the code under review (warnings from contract header files may be ignored). Rationale: This is needed to ensure there will be no errors discovered at the time of integration. A Sandox project should be used; QAC can find compiler errors but not warnings.

Yes

Comments:

Component.h is included

N/A

Comments:

All other includes are actually needed. (System includes

N/A

Comments:

only allowed in Nexteer library components)

Software Design and Coding Standards followed:

Version: 2.1

Code comments are clear, correct, and adequate

Yes

Comments:

and have been updated for the change: [N40] and

all other rules in the same section as rule [N40],

plus [N75], [N12], [N23], [N33], [N37], [N38],

[N48], [N54], [N77], [N79], [N72]

Source file (.c and .h) comment blocks are per

Yes

Comments:

standards and contain correct information: [N41], [N42]

Function comment blocks are per standards and

Yes

Comments:

contain correct information: [N43]

Code formatting (indentation, placement of

Yes

Comments:

braces, etc.) is per standards: [N5], [N55], [N56],

[N57], [N58], [N59]

Embedded constants used per standards; no

Yes

Comments:

"magic numbers": [N12]

Memory mapping for non-RTE code

N/A

Comments:

is per standard

All execution-order-dependent code can be

N/A

Comments:

recognized by the compiler: [N80]

All loops have termination conditions that ensure

N/A

Comments:

finite loop iterations: [N63]

All divides protect against divide by zero

N/A

Comments:

if needed: [N65]

All integer division and modulus operations

N/A

Comments:

handle negative numbers correctly: [N76]

All typecasting and fixed point arithmetic,

N/A

Comments:

including all use of fixed point macros and

timer functions, is correct and has no possibility

of unintended overflow or underflow: [N66]

All float-to-unsiged conversions ensure the.

N/A

Comments:

float value is non-negative: [N67]

All conversions between signed and unsigned

N/A

Comments:

types handle msb==1 as intended: [N78]

All pointer dereferencing protects against

N/A

Comments:

null pointer if needed: [N70]

Component outputs are limited to the legal range

N/A

Comments:

defined in the FDD DataDict.m file : [N53]

All code is mapped with FDD (all FDD

Yes

Comments:

subfunctions and/or model blocks identified

with code comments; all code corresponds to

some FDD subfunction and/or model block): [N40]

Review did not identify violations of other

Yes

Comments:

coding standard rules

Anomaly or Design Work CR created

N/A

Comments: List Anomaly or CR numbers

for any FDD corrections needed

General Notes / Comments:

Change Owner:

Sankardu Varadapureddi

Review Date :

04/05/16

Lead Peer Reviewer:

Nick Saxton

Approved by Reviewer(s):

Yes

Other Reviewer(s):

Sheet 5: MDD

Rev 1.2

8-Jun-15

Peer Review Meeting Log (MDD Review)

MDD Name:

SysStMod_MDD.docx

MDD Revision:

Source File Name:

SysStMod.c

Source File Revision:

Source File Name:

Source File Revision:

Source File Name:

Source File Revision:

Quality Check Items:

Rationale is required for all answers of No

Synergy version matches document

Yes

Comments:

Change log contains detailed description of changes

Yes

Comments:

Changes Highlighted (for Unit Tester)

Yes

Comments:

Diagrams have been included per MDD Guideline

Yes

Comments:

and reviewed

All Design Exceptions and Limitations are listed

N/A

Comments:

Design rationale given for all global

N/A

Comments:

data not communicated through RTE ports, per

Design and Coding Standards rules [N9] and [N10].

All implementation details that differ from the FDD are

N/A

Comments:

noted and explained in Design Rationale

All Unit Test Considerations have been described

N/A

Comments:

General Notes / Comments:

Change Owner:

Sankardu Varadapureddi

Review Date :

04/05/16

Lead Peer Reviewer:

Nick Saxton

Approved by Reviewer(s):

Yes

Other Reviewer(s):

Sheet 6: PolySpace

Rev 1.2

8-Jun-15

Peer Review Meeting Log (QAC/PolySpace Review)

Source File Name:

SysStMod.c

Source File Revision:

Source File Name:

Source File Revision:

Source File Name:

Source File Revision:

EA4 Static Analysis Compliance Guideline version:

Poly Space version:

Windows User: eg. 2013b 2013b

Polyspace sub project version:

Windows User: eg. TL108a_PolyspaceSuprt_1.0.0 N/A

QAC version:

Windows User: eg 8.1.1-R 8.1.1-R

QAC sub project version:

Windows User: eg. TL_100A_1.1.0 1.1.0

Quality Check Items:

Rationale is required for all answers of No

Contract Folder's header files are appropriate and

kzshz2: Intended Use: Identify that the contract folder contains only the information required for this component. All other variables, constants, function prototypes, etc. should be removed. Rationale: This will help avoid unit testers having to considers object not used. It will also avoid having other files required for QAC.

Yes

Comments:

function prototypes match the latest component version

100% Compliance to the EA4 Static Analysis

N/A

Comments:

Compliance Guideline

Ref comments

Are previously added justification and deviation

N/A

Comments:

comments still appropriate

Ref comments

Do all MISRA deviation comments use approved

N/A

Comments:

deviation tags

Ref comments

Cyclomatic complexity and Static path count OK

Creager, Kathleen: use Browse Function Metrics, STCYC and STPTH

N/A

Comments:

for all functions in the component per Design

Ref comments

and Coding Standards rule [N47]

General Notes / Comments:

Only names of input ports are renamed. So QAC and Polysapce are reran and new result reports are stored.

Change Owner:

Sankardu Varadapureddi

Review Date :

04/05/16

Lead Peer Reviewer:

Nick Saxton

Approved by Reviewer(s):

Yes

Other Reviewer(s):