1 - DataAndAdrPar Integration Manual

Integration Manual

For

DataAndAdrPar

VERSION: 1

DATE: 03/15/16

Prepared By:

Software Group,

Nexteer Automotive,

Saginaw, MI, USA

Location: The official version of this document is stored in the Nexteer Configuration Management System.

Revision History

Sl. No.DescriptionAuthorVersionDate
1Initial versionAvinash James103/15/16

Table of Contents

1 Abbrevations And Acronyms 4

2 References 5

3 Dependencies 6

3.1 SWCs 6

3.2 Global Functions(Non RTE) to be provided to Integration Project 6

4 Configuration REQUIREMeNTS 7

4.1 Build Time Config 7

4.2 Configuration Files to be provided by Integration Project 7

4.3 Da Vinci Parameter Configuration Changes 7

4.4 DaVinci Interrupt Configuration Changes 7

4.5 Manual Configuration Changes 7

5 Integration DATAFLOW REQUIREMENTS 8

5.1 Required Global Data Inputs 8

5.2 Required Global Data Outputs 8

5.3 Specific Include Path present 8

6 Runnable Scheduling 9

7 Memory Map REQUIREMENTS 10

7.1 Mapping 10

7.2 Usage 10

7.3 Non RTE NvM Blocks 10

7.4 RTE NvM Blocks 10

8 Compiler Settings 11

8.1 Preprocessor MACRO 11

8.2 Optimization Settings 11

9 Appendix 12

Abbrevations And Acronyms

AbbreviationDescription
DFDDesign functional diagram
MDDModule design Document
FDDFunctional Design Document

References

This section lists the title & version of all the documents that are referred for development of this document

Sr. No.TitleVersion
1FDD – CM108A FlsMemSee Synergy subproject version
2Software Naming ConventionsProcess 04.02.01
3Software Coding StandardsProcess 04.02.01

Dependencies

SWCs

ModuleRequired Feature
AR202A MicroCtrlrSuprtNxtrMcuSuprtLib functions and register definitions

Note : Referencing the external components should be avoided in most cases. Only in unavoidable circumstance external components should be referred. Developer should track the references.

Global Functions(Non RTE) to be provided to Integration Project

DataAndAdrParInit1 – To execute the start up test to check the Data Parity for Data Transfer Paths

Configuration REQUIREMeNTS

Build Time Config

ModulesNotes
None

Configuration Files to be provided by Integration Project

Da Vinci Parameter Configuration Changes

ParameterNotesSWC

DaVinci Interrupt Configuration Changes

ISR NameVIM #Priority DependencyNotes

Manual Configuration Changes

ConstantNotesSWC
None

Integration DATAFLOW REQUIREMENTS

Required Global Data Inputs

None

Required Global Data Outputs

None

Specific Include Path present

Yes

Runnable Scheduling

This section specifies the required runnable scheduling.

InitScheduling RequirementsTrigger
DataAndAdrParInit1Refer CM100ANon-RTE Call
DataAndAdrParInit2Refer CM100ARTE Init
RunnableScheduling RequirementsTrigger

Memory Map REQUIREMENTS

Mapping

Memory SectionContentsNotes
CDD_DataAndAdrPar_START_SEC_CODE

* Each …START_SEC… constant is terminated by a …STOP_SEC… constant as specified in the AUTOSAR Memory Mapping requirements.

Usage

FeatureRAMROM

Table 1: ARM Cortex R4 Memory Usage

NvM Blocks

*See DataDict.m

Compiler Settings

Preprocessor MACRO

None

Optimization Settings

None

Appendix

<This section is for appendix>

2 - DataAndAdrPar Module Design Document

Module Design Document

For

DataAndAdrPar

Mar 15, 2016

Prepared For:

Software Engineering

Nexteer Automotive,

Saginaw, MI, USA

Prepared By:

Software Group,

Nexteer Automotive,

Saginaw, MI, USA
Change History

DescriptionAuthorVersionDate
Initial VersionAvinash James103/15/16


Table of Contents

1 Introduction 5

1.1 Purpose 5

1.2 Scope 5

2 DataAndAdrPar & High-Level Description 6

3 Design details of software module 7

3.1 Graphical representation of DataAndAdrPar 7

3.2 Data Flow Diagram 7

3.2.1 Component level DFD 7

3.2.2 Function level DFD 7

4 Constant Data Dictionary 8

4.1 Program (fixed) Constants 8

4.1.1 Embedded Constants 8

5 Software Component Implementation 9

5.1 Sub-Module Functions 9

5.1.1 Init:DataAndAdrParInit1 9

5.1.1.1 Design Rationale 9

5.1.1.2 Module Outputs 9

5.1.2 Init:DataAndAdrParInit2 9

5.1.2.1 Design Rationale 9

5.1.2.2 Module Outputs 9

5.2 Server Runables 9

5.3 Interrupt Functions 9

5.4 Module Internal (Local) Functions 9

5.4.1 ChkForECMBit28 9

5.4.1.1 Design Rationale 9

5.4.1.2 Processing 9

5.4.2 WrTestModeCtrReg 9

5.4.2.1 Design Rationale 10

5.4.2.2 Processing 10

5.5 GLOBAL Function/Macro Definitions 10

5.5.1 GLOBAL Function #1 10

5.5.1.1 Design Rationale 10

5.5.1.2 Processing 10

6 Known Limitations with Design 11

7 UNIT TEST CONSIDERATION 12

Appendix A Abbreviations and Acronyms 13

Appendix B Glossary 14

Appendix C References 15

Introduction

Purpose

Scope

The following definitions are used throughout this document:

  • Shall: indicates a mandatory requirement without exception in compliance.

  • Should: indicates a mandatory requirement; exceptions allowed only with documented justification.

  • May: indicates an optional action.

DataAndAdrPar & High-Level Description

See FDD

Design details of software module

Graphical representation of DataAndAdrPar

Data Flow Diagram

Component level DFD

N/A

Function level DFD

N/A

Constant Data Dictionary

Program (fixed) Constants

Embedded Constants

Local Constants

Constant NameResolutionUnitsValue
VCIFERRSETBFRTEST_CNT_U321Counts((uint32)1U<<0U)
ECMERRSETBFRTEST_CNT_U321Counts((uint32)1U<<1U)
READOPERECMERR_CNT_U321Counts((uint32)1U<<2U)
WROPERECMERR_CNT_U321Counts((uint32)1U<<3U)
WROPERADRPARERR_CNT_U321Counts((uint32)1U<<4U)
CLRERRSTSFLGFAIL_CNT_U321Counts((uint32)1U<<5U)
TESTMODCTRLREGWRFAIL_CNT_U321Counts((uint32)1U<<6U)
TOUT_MICROSEC_U321MicroSec2U

Software Component Implementation

Sub-Module Functions

Init:DataAndAdrParInit1

Design Rationale

Non-RTE Init function to verify the Data Parity Data Transfer Path micro diagnostic. Refer FDD for more details

Module Outputs

None

Init:DataAndAdrParInit2

Design Rationale

RTE empty Init function

Module Outputs

None

Server Runables

None

Interrupt Functions

None

Module Internal (Local) Functions

ChkForEcmBit28

Function NameChkForEcmBit28TypeMinMax
Arguments PassedNone
Return ValueRetVal_Cnt_T_loglBoolean01

Design Rationale

Static function to check whether ECM bit was set or not within a time out interval of max 2uSec

Processing

To be called from DataAndAdrParInit1 function

WrTestModeCtrReg

Function NameWrTestModCtrlRegTypeMinMax
Arguments PassedValUint3200xFFFFFFFF
ErrFlg_Cnt_T_u32Uint3200xFFFFFFFF
Return ValueNone

Design Rationale

Static function to write to the Test Mode Control register and verify the write was successful

Processing

To be called from DataAndAdrParInit1 function

GLOBAL Function/Macro Definitions

GLOBAL Function #1

Function Name(Exact name used)TypeMinMax
Arguments PassedNone<Refer MDD guidelines[1]><Refer MDD guidelines[1]><Refer MDD guidelines[1]>
Return Value

Design Rationale

Processing

Known Limitations with Design

None

UNIT TEST CONSIDERATION

None

Abbreviations and Acronyms

Abbreviation or AcronymDescription

Glossary

Note: Terms and definitions from the source “Nexteer Automotive” take precedence over all other definitions of the same term. Terms and definitions from the source “Nexteer Automotive” are formulated from multiple sources, including the following:

  • ISO 9000

  • ISO/IEC 12207

  • ISO/IEC 15504

  • Automotive SPICE® Process Reference Model (PRM)

  • Automotive SPICE® Process Assessment Model (PAM)

  • ISO/IEC 15288

  • ISO 26262

  • IEEE Standards

  • SWEBOK

  • PMBOK

  • Existing Nexteer Automotive documentation

TermDefinitionSource
MDDModule Design Document
DFDData Flow Diagram

References

Ref. #TitleVersion
1AUTOSAR Specification of Memory Mapping (Link:AUTOSAR_SWS_MemoryMapping.pdf)v1.3.0 R4.0 Rev 2
2MDD GuidelineEA4 01.00.00
3Software Naming Conventions.doc1.0
4Software Design and Coding Standards.doc2.0

3 - DataAndAdrPar Peer Review Checklists


Overview

Summary Sheet
Synergy Project
CDD_DataAndAdrParNonRte.c
PolySpace


Sheet 1: Summary Sheet
























Rev 1.28-Jun-15

Peer Review Summary Sheet


























Synergy Project Name:


kzshz2: Intended Use: Identify which component is being reviewed. This should be the Module Short Name from Synergy Rationale: Required for traceability. It will help to ensure this form is not attaced to the the wrong change request. CM108A_DataAndAdrPar_Impl
Revision / Baseline:


kzshz2: Intended Use: Identify which Synergy revision of this component is being reviewed Rationale: Required for traceability. It will help to ensure this form is not attaced to the the wrong change request. CM108A_DataAndAdrPar_Impl_1.1.0

























Change Owner:


kzshz2: Intended Use: Identify the developer who made the change(s) Rationale: A change request may have more than one resolver, this will help identify who made what change. Change owner identification may be required by indusrty standards. Selva Sengottaiyan
Work CR ID:


EA4#5096





























kzshz2: Intended Use: Intended to identify at a high level to the reviewers which areas of the component have been changed. Rationale: This will be good information to know when ensuring appropriate reviews have been completed. Modified File Types:















































































































































































kzshz2: Intended Use: Identify who where the reviewers, what they reviewed, and if the reviewed changes have been approved to release the code for testing. Comments here should be at a highlevel, the specific comments should be present on the specific review form sheet. Rationale: Since this Form will be attached to the Change Request it will confirm the approval and provides feedback in case of audits. ADD DR Level Move reviewer and approval to individual checklist form Review Checklist Summary:






















































Reviewed:































N/AMDD


YesSource Code


YesPolySpace









































N/AIntegration Manual


N/ADavinci Files








































































Comments:






























































































General Guidelines:
- The reviews shall be performed over the portions of the component that were modified as a result of the Change Request.
- New components should include FDD Owner and Integrator as apart of the Group Review Board (Source Code, Integration Manual, and Davinci Files)
- Enter any rework required into the comment field and select No. When the rework is complete, review again using this same review sheet and select Yes. Add date and additional comment stating that the rework is completed.
- To review a component with multiple source code files use the "Add Source" button to create a Source code tab for each source file.
- .h file should be reviewed with the source file as part of the source file.





















Sheet 2: Synergy Project

Peer Review Meeting Log (Component Synergy Project Review)



















































Quality Check Items:




































Rationale is required for all answers of No










New baseline version name from Summary Sheet follows








Yes
Comments:



naming convention





































Project contains necessary subprojects








Yes
Comments:










































Project contains the correct version of subprojects








Yes
Comments:










































Design subproject is correct version








Yes
Comments:











































General Notes / Comments:



























































LN: Intended Use: Identify who were the reviewers and if the reviewed changes have been approved. Rationale: Since this Form will be attached to the Change Request it will confirm the approval and provides feedback in case of audits. KMC: Group Review Level removed in Rev 4.0 since the design review is not checked in until approved, so it would always be DR4. Review Board:


























Change Owner:

Selva Sengottaiyan


Review Date :

04/05/16
































Lead Peer Reviewer:


Avinash James


Approved by Reviewer(s):



Yes































Other Reviewer(s):










































































Sheet 3: CDD_DataAndAdrParNonRte.c






















Rev 1.28-Jun-15
Peer Review Meeting Log (Source Code Review)

























Source File Name:


CDD_DataAndAdrParNonRte.c

Source File Revision:


2
Header File Name:


CDD_DataAndAdrPar.h

Header File Revision:


kzshz2: Intended Use: Identify which version of the source file is being review. Rationale: Required for traceability between source code and review. Auditors will likely require this. 1

























MDD Name:

DataAndAdrPar Module Design Document.docx








Revision:
1

























FDD/SCIR/DSR/FDR/CM Name:




CM108A_DataAndAdrPar_Design

Revision:
1.1.0


























Quality Check Items:



































Rationale is required for all answers of No









Working EA4 Software Naming Convention followed:















































for variable names







N/A
Comments:

















































for constant names







N/A
Comments:

















































for function names







N/A
Comments:

















































for other names (component, memory







N/A
Comments:










mapping handles, typedefs, etc.)




































All paths assign a value to outputs, ensuring








N/A
Comments:









all outputs are initialized prior to being written





































Requirements Tracability tags in code match the requirements tracability in the FDD








N/A
Comments:









requirements tracability in the FDD





































All variables are declared at the function level.








N/A
Comments:
























Synergy version matches change history





kzshz2: Intended Use: Indicate that the the versioning was confirmed by the peer reviewer(s). Rationale: There have been many occassions where versions were not updated in files and as a result Unit Test were referencing wrong versions. This often time leads to the need to re-run of batch tests.


Yes
Comments:



and Version Control version in file comment block





































Change log contains detailed description of changes








Yes
Comments:



and Work CR number





































Code accurately implements FDD (Document or Model)








Yes
Comments:










































Verified no Compiler Errors or Warnings


KMC: Intended Use: To confirm no compiler errors or warnings exist for the code under review (warnings from contract header files may be ignored). Rationale: This is needed to ensure there will be no errors discovered at the time of integration. A Sandox project should be used; QAC can find compiler errors but not warnings.





Yes
Comments:
















































Component.h is included








Yes
Comments:
























All other includes are actually needed. (System includes








Yes
Comments:









only allowed in Nexteer library components)





































Software Design and Coding Standards followed:











Version: 2.1

























Code comments are clear, correct, and adequate







Yes
Comments:










and have been updated for the change: [N40] and













all other rules in the same section as rule [N40],






















plus [N75], [N12], [N23], [N33], [N37], [N38],






















[N48], [N54], [N77], [N79], [N72]














































Source file (.c and .h) comment blocks are per







Yes
Comments:










standards and contain correct information: [N41], [N42]





































Function comment blocks are per standards and







Yes
Comments:










contain correct information: [N43]





































Code formatting (indentation, placement of







Yes
Comments:










braces, etc.) is per standards: [N5], [N55], [N56],













[N57], [N58], [N59]














































Embedded constants used per standards; no







N/A
Comments:










"magic numbers": [N12]





































Memory mapping for non-RTE code







N/A
Comments:










is per standard





































All execution-order-dependent code can be







N/A
Comments:










recognized by the compiler: [N80]





































All loops have termination conditions that ensure







N/A
Comments:










finite loop iterations: [N63]





































All divides protect against divide by zero







N/A
Comments:










if needed: [N65]





































All integer division and modulus operations







N/A
Comments:










handle negative numbers correctly: [N76]





































All typecasting and fixed point arithmetic,







N/A
Comments:










including all use of fixed point macros and













timer functions, is correct and has no possibility






















of unintended overflow or underflow: [N66]














































All float-to-unsiged conversions ensure the.







N/A
Comments:










float value is non-negative: [N67]





































All conversions between signed and unsigned







N/A
Comments:










types handle msb==1 as intended: [N78]





































All pointer dereferencing protects against







N/A
Comments:










null pointer if needed: [N70]





































Component outputs are limited to the legal range







N/A
Comments:










defined in the FDD DataDict.m file : [N53]





































All code is mapped with FDD (all FDD







Yes
Comments:










subfunctions and/or model blocks identified










as much as possible -- function names match function

with code comments; all code corresponds to










names sin FDD; FDD does not have a model










some FDD subfunction and/or model block): [N40]













































Review did not identify violations of other








Yes
Comments:









coding standard rules





































Anomaly or Design Work CR created








N/A
Comments: List Anomaly or CR numbers









for any FDD corrections needed































































General Notes / Comments:























Reviewed changes only
























































LN: Intended Use: Identify who were the reviewers and if the reviewed changes have been approved. Rationale: Since this Form will be attached to the Change Request it will confirm the approval and provides feedback in case of audits. KMC: Group Review Level removed in Rev 4.0 since the design review is not checked in until approved, so it would always be DR4. Review Board:


























Change Owner:

Selva Sengottaiyan


Review Date :

04/05/16
































Lead Peer Reviewer:


Avinash James


Approved by Reviewer(s):



Yes































Other Reviewer(s):










































































Sheet 4: PolySpace






















Rev 1.28-Jun-15
Peer Review Meeting Log (QAC/PolySpace Review)


























Source File Name:


CDD_DataAndAdrPar.cSource File Revision:


1

Source File Name:


CDD_DataAndAdrParNonRte.cSource File Revision:


2

Source File Name:



Source File Revision:






























EA4 Static Analysis Compliance Guideline version:







01.01.00







Poly Space version:


Windows User: eg. 2013b 2013b
Polyspace sub project version:




Windows User: eg. TL108a_PolyspaceSuprt_1.0.0 N/A

QAC version:


Windows User: eg 8.1.1-R 8.1.1-R
QAC sub project version:




Windows User: eg. TL_100A_1.1.0 1.2.0


























Quality Check Items:




































Rationale is required for all answers of No



































Contract Folder's header files are appropriate and





kzshz2: Intended Use: Identify that the contract folder contains only the information required for this component. All other variables, constants, function prototypes, etc. should be removed. Rationale: This will help avoid unit testers having to considers object not used. It will also avoid having other files required for QAC.


Yes
Comments:




function prototypes match the latest component version
































































100% Compliance to the EA4 Static AnalysisYes
Comments:





Compliance Guideline





























Are previously added justification and deviation








N/A
Comments:





comments still appropriate






































Do all MISRA deviation comments use approved








Yes
Comments:





deviation tags






































Cyclomatic complexity and Static path count OK






Creager, Kathleen: use Browse Function Metrics, STCYC and STPTH

Yes
Comments:





for all functions in the component per Design














and Coding Standards rule [N47]

































































































General Notes / Comments:



























































LN: Intended Use: Identify who were the reviewers and if the reviewed changes have been approved. Rationale: Since this Form will be attached to the Change Request it will confirm the approval and provides feedback in case of audits. KMC: Group Review Level removed in Rev 4.0 since the design review is not checked in until approved, so it would always be DR4. Review Board:


























Change Owner:

Selva Sengottaiyan


Review Date :

04/05/16
































Lead Peer Reviewer:


Avinash James


Approved by Reviewer(s):



Yes































Other Reviewer(s):