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Component Implementation
1 - DataAndAdrPar Integration Manual
Integration Manual
For
DataAndAdrPar
VERSION: 1
DATE: 03/15/16
Prepared By:
Software Group,
Nexteer Automotive,
Saginaw, MI, USA
Location: The official version of this document is stored in the Nexteer Configuration Management System.
Revision History
Sl. No. | Description | Author | Version | Date |
1 | Initial version | Avinash James | 1 | 03/15/16 |
Table of Contents
3.2 Global Functions(Non RTE) to be provided to Integration Project 6
4 Configuration REQUIREMeNTS 7
4.2 Configuration Files to be provided by Integration Project 7
4.3 Da Vinci Parameter Configuration Changes 7
4.4 DaVinci Interrupt Configuration Changes 7
4.5 Manual Configuration Changes 7
5 Integration DATAFLOW REQUIREMENTS 8
5.1 Required Global Data Inputs 8
5.2 Required Global Data Outputs 8
5.3 Specific Include Path present 8
Abbrevations And Acronyms
Abbreviation | Description |
DFD | Design functional diagram |
MDD | Module design Document |
FDD | Functional Design Document |
References
This section lists the title & version of all the documents that are referred for development of this document
Sr. No. | Title | Version |
1 | FDD – CM108A FlsMem | See Synergy subproject version |
2 | Software Naming Conventions | Process 04.02.01 |
3 | Software Coding Standards | Process 04.02.01 |
Dependencies
SWCs
Module | Required Feature |
AR202A MicroCtrlrSuprt | NxtrMcuSuprtLib functions and register definitions |
Note : Referencing the external components should be avoided in most cases. Only in unavoidable circumstance external components should be referred. Developer should track the references.
Global Functions(Non RTE) to be provided to Integration Project
DataAndAdrParInit1 – To execute the start up test to check the Data Parity for Data Transfer Paths
Configuration REQUIREMeNTS
Build Time Config
Modules | Notes | |
None |
Configuration Files to be provided by Integration Project
Da Vinci Parameter Configuration Changes
Parameter | Notes | SWC |
DaVinci Interrupt Configuration Changes
ISR Name | VIM # | Priority Dependency | Notes |
Manual Configuration Changes
Constant | Notes | SWC |
None |
Integration DATAFLOW REQUIREMENTS
Required Global Data Inputs
None
Required Global Data Outputs
None
Specific Include Path present
Yes
Runnable Scheduling
This section specifies the required runnable scheduling.
Init | Scheduling Requirements | Trigger |
DataAndAdrParInit1 | Refer CM100A | Non-RTE Call |
DataAndAdrParInit2 | Refer CM100A | RTE Init |
Runnable | Scheduling Requirements | Trigger |
Memory Map REQUIREMENTS
Mapping
Memory Section | Contents | Notes |
CDD_DataAndAdrPar_START_SEC_CODE | ||
* Each …START_SEC… constant is terminated by a …STOP_SEC… constant as specified in the AUTOSAR Memory Mapping requirements.
Usage
Feature | RAM | ROM |
Table 1: ARM Cortex R4 Memory Usage
NvM Blocks
*See DataDict.m
Compiler Settings
Preprocessor MACRO
None
Optimization Settings
None
Appendix
<This section is for appendix>
2 - DataAndAdrPar Module Design Document
Module Design Document
For
DataAndAdrPar
Mar 15, 2016
Prepared For:
Software Engineering
Nexteer Automotive,
Saginaw, MI, USA
Prepared By:
Software Group,
Nexteer Automotive,
Saginaw, MI, USA
Change History
Description | Author | Version | Date |
Initial Version | Avinash James | 1 | 03/15/16 |
Table of Contents
2 DataAndAdrPar & High-Level Description 6
3 Design details of software module 7
3.1 Graphical representation of DataAndAdrPar 7
4.1 Program (fixed) Constants 8
5 Software Component Implementation 9
5.1.1 Init:DataAndAdrParInit1 9
5.1.2 Init:DataAndAdrParInit2 9
5.4 Module Internal (Local) Functions 9
5.5 GLOBAL Function/Macro Definitions 10
6 Known Limitations with Design 11
Appendix A Abbreviations and Acronyms 13
Introduction
Purpose
Scope
The following definitions are used throughout this document:
Shall: indicates a mandatory requirement without exception in compliance.
Should: indicates a mandatory requirement; exceptions allowed only with documented justification.
May: indicates an optional action.
DataAndAdrPar & High-Level Description
See FDD
Design details of software module
Graphical representation of DataAndAdrPar
Data Flow Diagram
Component level DFD
N/A
Function level DFD
N/A
Constant Data Dictionary
Program (fixed) Constants
Embedded Constants
Local Constants
Constant Name | Resolution | Units | Value |
---|---|---|---|
VCIFERRSETBFRTEST_CNT_U32 | 1 | Counts | ((uint32)1U<<0U) |
ECMERRSETBFRTEST_CNT_U32 | 1 | Counts | ((uint32)1U<<1U) |
READOPERECMERR_CNT_U32 | 1 | Counts | ((uint32)1U<<2U) |
WROPERECMERR_CNT_U32 | 1 | Counts | ((uint32)1U<<3U) |
WROPERADRPARERR_CNT_U32 | 1 | Counts | ((uint32)1U<<4U) |
CLRERRSTSFLGFAIL_CNT_U32 | 1 | Counts | ((uint32)1U<<5U) |
TESTMODCTRLREGWRFAIL_CNT_U32 | 1 | Counts | ((uint32)1U<<6U) |
TOUT_MICROSEC_U32 | 1 | MicroSec | 2U |
Software Component Implementation
Sub-Module Functions
Init:DataAndAdrParInit1
Design Rationale
Non-RTE Init function to verify the Data Parity Data Transfer Path micro diagnostic. Refer FDD for more details
Module Outputs
None
Init:DataAndAdrParInit2
Design Rationale
RTE empty Init function
Module Outputs
None
Server Runables
None
Interrupt Functions
None
Module Internal (Local) Functions
ChkForEcmBit28
Function Name | ChkForEcmBit28 | Type | Min | Max |
Arguments Passed | None | |||
Return Value | RetVal_Cnt_T_logl | Boolean | 0 | 1 |
Design Rationale
Static function to check whether ECM bit was set or not within a time out interval of max 2uSec
Processing
To be called from DataAndAdrParInit1 function
WrTestModeCtrReg
Function Name | WrTestModCtrlReg | Type | Min | Max |
Arguments Passed | Val | Uint32 | 0 | 0xFFFFFFFF |
ErrFlg_Cnt_T_u32 | Uint32 | 0 | 0xFFFFFFFF | |
Return Value | None |
Design Rationale
Static function to write to the Test Mode Control register and verify the write was successful
Processing
To be called from DataAndAdrParInit1 function
GLOBAL Function/Macro Definitions
GLOBAL Function #1
Function Name | (Exact name used) | Type | Min | Max |
Arguments Passed | None | <Refer MDD guidelines[1]> | <Refer MDD guidelines[1]> | <Refer MDD guidelines[1]> |
Return Value |
Design Rationale
Processing
Known Limitations with Design
None
UNIT TEST CONSIDERATION
None
Abbreviations and Acronyms
Abbreviation or Acronym | Description |
---|---|
Glossary
Note: Terms and definitions from the source “Nexteer Automotive” take precedence over all other definitions of the same term. Terms and definitions from the source “Nexteer Automotive” are formulated from multiple sources, including the following:
ISO 9000
ISO/IEC 12207
ISO/IEC 15504
Automotive SPICE® Process Reference Model (PRM)
Automotive SPICE® Process Assessment Model (PAM)
ISO/IEC 15288
ISO 26262
IEEE Standards
SWEBOK
PMBOK
Existing Nexteer Automotive documentation
Term | Definition | Source |
---|---|---|
MDD | Module Design Document | |
DFD | Data Flow Diagram |
References
Ref. # | Title | Version |
---|---|---|
1 | AUTOSAR Specification of Memory Mapping (Link:AUTOSAR_SWS_MemoryMapping.pdf) | v1.3.0 R4.0 Rev 2 |
2 | MDD Guideline | EA4 01.00.00 |
3 | Software Naming Conventions.doc | 1.0 |
4 | Software Design and Coding Standards.doc | 2.0 |
3 - DataAndAdrPar Peer Review Checklists
Overview
Summary SheetSynergy Project
CDD_DataAndAdrParNonRte.c
PolySpace
Sheet 1: Summary Sheet

Sheet 2: Synergy Project
Sheet 3: CDD_DataAndAdrParNonRte.c
Rev 1.2 | 8-Jun-15 | |||||||||||||||||||||||
Peer Review Meeting Log (Source Code Review) | ||||||||||||||||||||||||
Source File Name: | CDD_DataAndAdrParNonRte.c | Source File Revision: | 2 | |||||||||||||||||||||
Header File Name: | CDD_DataAndAdrPar.h | Header File Revision: | ||||||||||||||||||||||
MDD Name: | DataAndAdrPar Module Design Document.docx | Revision: | 1 | |||||||||||||||||||||
FDD/SCIR/DSR/FDR/CM Name: | CM108A_DataAndAdrPar_Design | Revision: | 1.1.0 | |||||||||||||||||||||
Quality Check Items: | ||||||||||||||||||||||||
Rationale is required for all answers of No | ||||||||||||||||||||||||
Working EA4 Software Naming Convention followed: | ||||||||||||||||||||||||
for variable names | N/A | Comments: | ||||||||||||||||||||||
for constant names | N/A | Comments: | ||||||||||||||||||||||
for function names | N/A | Comments: | ||||||||||||||||||||||
for other names (component, memory | N/A | Comments: | ||||||||||||||||||||||
mapping handles, typedefs, etc.) | ||||||||||||||||||||||||
All paths assign a value to outputs, ensuring | N/A | Comments: | ||||||||||||||||||||||
all outputs are initialized prior to being written | ||||||||||||||||||||||||
Requirements Tracability tags in code match the requirements tracability in the FDD | N/A | Comments: | ||||||||||||||||||||||
requirements tracability in the FDD | ||||||||||||||||||||||||
All variables are declared at the function level. | N/A | Comments: | ||||||||||||||||||||||
Synergy version matches change history | Yes | Comments: | ||||||||||||||||||||||
and Version Control version in file comment block | ||||||||||||||||||||||||
Change log contains detailed description of changes | Yes | Comments: | ||||||||||||||||||||||
and Work CR number | ||||||||||||||||||||||||
Code accurately implements FDD (Document or Model) | Yes | Comments: | ||||||||||||||||||||||
Verified no Compiler Errors or Warnings | Yes | Comments: | ||||||||||||||||||||||
Component.h is included | Yes | Comments: | ||||||||||||||||||||||
All other includes are actually needed. (System includes | Yes | Comments: | ||||||||||||||||||||||
only allowed in Nexteer library components) | ||||||||||||||||||||||||
Software Design and Coding Standards followed: | Version: 2.1 | |||||||||||||||||||||||
Code comments are clear, correct, and adequate | Yes | Comments: | ||||||||||||||||||||||
and have been updated for the change: [N40] and | ||||||||||||||||||||||||
all other rules in the same section as rule [N40], | ||||||||||||||||||||||||
plus [N75], [N12], [N23], [N33], [N37], [N38], | ||||||||||||||||||||||||
[N48], [N54], [N77], [N79], [N72] | ||||||||||||||||||||||||
Source file (.c and .h) comment blocks are per | Yes | Comments: | ||||||||||||||||||||||
standards and contain correct information: [N41], [N42] | ||||||||||||||||||||||||
Function comment blocks are per standards and | Yes | Comments: | ||||||||||||||||||||||
contain correct information: [N43] | ||||||||||||||||||||||||
Code formatting (indentation, placement of | Yes | Comments: | ||||||||||||||||||||||
braces, etc.) is per standards: [N5], [N55], [N56], | ||||||||||||||||||||||||
[N57], [N58], [N59] | ||||||||||||||||||||||||
Embedded constants used per standards; no | N/A | Comments: | ||||||||||||||||||||||
"magic numbers": [N12] | ||||||||||||||||||||||||
Memory mapping for non-RTE code | N/A | Comments: | ||||||||||||||||||||||
is per standard | ||||||||||||||||||||||||
All execution-order-dependent code can be | N/A | Comments: | ||||||||||||||||||||||
recognized by the compiler: [N80] | ||||||||||||||||||||||||
All loops have termination conditions that ensure | N/A | Comments: | ||||||||||||||||||||||
finite loop iterations: [N63] | ||||||||||||||||||||||||
All divides protect against divide by zero | N/A | Comments: | ||||||||||||||||||||||
if needed: [N65] | ||||||||||||||||||||||||
All integer division and modulus operations | N/A | Comments: | ||||||||||||||||||||||
handle negative numbers correctly: [N76] | ||||||||||||||||||||||||
All typecasting and fixed point arithmetic, | N/A | Comments: | ||||||||||||||||||||||
including all use of fixed point macros and | ||||||||||||||||||||||||
timer functions, is correct and has no possibility | ||||||||||||||||||||||||
of unintended overflow or underflow: [N66] | ||||||||||||||||||||||||
All float-to-unsiged conversions ensure the. | N/A | Comments: | ||||||||||||||||||||||
float value is non-negative: [N67] | ||||||||||||||||||||||||
All conversions between signed and unsigned | N/A | Comments: | ||||||||||||||||||||||
types handle msb==1 as intended: [N78] | ||||||||||||||||||||||||
All pointer dereferencing protects against | N/A | Comments: | ||||||||||||||||||||||
null pointer if needed: [N70] | ||||||||||||||||||||||||
Component outputs are limited to the legal range | N/A | Comments: | ||||||||||||||||||||||
defined in the FDD DataDict.m file : [N53] | ||||||||||||||||||||||||
All code is mapped with FDD (all FDD | Yes | Comments: | ||||||||||||||||||||||
subfunctions and/or model blocks identified | as much as possible -- function names match function | |||||||||||||||||||||||
with code comments; all code corresponds to | names sin FDD; FDD does not have a model | |||||||||||||||||||||||
some FDD subfunction and/or model block): [N40] | ||||||||||||||||||||||||
Review did not identify violations of other | Yes | Comments: | ||||||||||||||||||||||
coding standard rules | ||||||||||||||||||||||||
Anomaly or Design Work CR created | N/A | Comments: List Anomaly or CR numbers | ||||||||||||||||||||||
for any FDD corrections needed | ||||||||||||||||||||||||
General Notes / Comments: | ||||||||||||||||||||||||
Reviewed changes only | ||||||||||||||||||||||||
Change Owner: | Selva Sengottaiyan | Review Date : | 04/05/16 | |||||||||||||||||||||
Lead Peer Reviewer: | Avinash James | Approved by Reviewer(s): | Yes | |||||||||||||||||||||
Other Reviewer(s): | ||||||||||||||||||||||||