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Component Implementation

1: DmaCfgAndUse_Design_Review
2: DmaCfgAndUse_Integration_Manual
3: DmaCfgAndUse_MDD

Component Implementation

Component Documentation

1 - DmaCfgAndUse_Design_Review

Overview

Summary Sheet
Synergy Project
Source Code
MDD
Integration Manual
PolySpace

Sheet 1: Summary Sheet

Rev 1.2

8-Jun-15

Peer Review Summary Sheet

Synergy Project Name:

kzshz2: Intended Use: Identify which component is being reviewed. This should be the Module Short Name from Synergy Rationale: Required for traceability. It will help to ensure this form is not attaced to the the wrong change request. CM200C_DmaCfgAndUse_Impl

Revision / Baseline:

kzshz2: Intended Use: Identify which Synergy revision of this component is being reviewed Rationale: Required for traceability. It will help to ensure this form is not attaced to the the wrong change request. 1.1.0

Change Owner:

kzshz2: Intended Use: Identify the developer who made the change(s) Rationale: A change request may have more than one resolver, this will help identify who made what change. Change owner identification may be required by indusrty standards. Avinash James

Work CR ID:

EA4#8400

kzshz2: Intended Use: Intended to identify at a high level to the reviewers which areas of the component have been changed. Rationale: This will be good information to know when ensuring appropriate reviews have been completed. Modified File Types:

kzshz2: Intended Use: Identify who where the reviewers, what they reviewed, and if the reviewed changes have been approved to release the code for testing. Comments here should be at a highlevel, the specific comments should be present on the specific review form sheet. Rationale: Since this Form will be attached to the Change Request it will confirm the approval and provides feedback in case of audits. ADD DR Level Move reviewer and approval to individual checklist form Review Checklist Summary:

Reviewed:

Yes

MDD

Yes

Source Code

Yes

PolySpace

Yes

Integration Manual

N/A

Davinci Files

Comments:

General Guidelines:
- The reviews shall be performed over the portions of the component that were modified as a result of the Change Request.
- New components should include FDD Owner and Integrator as apart of the Group Review Board (Source Code, Integration Manual, and Davinci Files)
- Enter any rework required into the comment field and select No. When the rework is complete, review again using this same review sheet and select Yes. Add date and additional comment stating that the rework is completed.
- To review a component with multiple source code files use the "Add Source" button to create a Source code tab for each source file.
- .h file should be reviewed with the source file as part of the source file.

Sheet 2: Synergy Project

Peer Review Meeting Log (Component Synergy Project Review)

Quality Check Items:

Rationale is required for all answers of No

New baseline version name from Summary Sheet follows

Yes

Comments:

naming convention

Project contains necessary subprojects

Yes

Comments:

Project contains the correct version of subprojects

Yes

Comments:

Design subproject is correct version

Yes

Comments:

General Notes / Comments:

LN: Intended Use: Identify who were the reviewers and if the reviewed changes have been approved. Rationale: Since this Form will be attached to the Change Request it will confirm the approval and provides feedback in case of audits. KMC: Group Review Level removed in Rev 4.0 since the design review is not checked in until approved, so it would always be DR4. Review Board:

Change Owner:

Avinash James

Review Date :

12/13/16

Lead Peer Reviewer:

Selva Sengottaiyan

Approved by Reviewer(s):

Yes

Other Reviewer(s):

Sheet 3: Source Code

Rev 1.2

8-Jun-15

Peer Review Meeting Log (Source Code Review)

Source File Name:

CDD_DmaCfgAndUse.c

Source File Revision:

Header File Name:

CDD_DmaCfgAndUse.h

Header File Revision:

kzshz2: Intended Use: Identify which version of the source file is being review. Rationale: Required for traceability between source code and review. Auditors will likely require this. 1

Module Design Document Name:

kzshz2: Intended Use: Identify which version of the MDD this source file was written against. Rationale: Needed for traceability between source code and MDD DmaCfgAndUse_MDD

MDD Revision:

kzshz2: Intended Use: Identify which version of the MDD this source file was written against. Rationale: Needed for traceability between source code and MDD 2

FDD/SCIR/DSR/FDR/CMS Revision:

nz63rn: Intended Use: Identify which version of which FDD/CMS/SER this source file was written against. Rationale: Needed for traceability between source code and FDD/CMS/SER CM200C_DmaCfgAndUse_Design_1.1.0

Quality Check Items:

Rationale is required for all answers of No

Working EA4 Software Naming Convention followed:

for variable names

Yes

Comments:

for constant names

Yes

Comments:

for function names

Yes

Comments:

for other names (component, memory

Yes

Comments:

mapping handles, typedefs, etc.)

All paths assign a value to outputs, ensuring

N/A

Comments:

No Outputs

all outputs are initialized prior to being written

Requirements Tracability tags in code match the requirements tracability in the FDD

N/A

Comments:

No Taggs needed for EA4

requirements tracability in the FDD

All variables are declared at the function level.

Yes

Comments:

Synergy version matches change history

kzshz2: Intended Use: Indicate that the the versioning was confirmed by the peer reviewer(s). Rationale: There have been many occassions where versions were not updated in files and as a result Unit Test were referencing wrong versions. This often time leads to the need to re-run of batch tests.

Yes

Comments:

and Version Control version in file comment block

Change log contains detailed description of changes

Yes

Comments:

and Work CR number

Code accurately implements FDD (Document or Model)

Yes

Comments:

Verified no Compiler Errors or Warnings

KMC: Intended Use: To confirm no compiler errors or warnings exist for the code under review (warnings from contract header files may be ignored). Rationale: This is needed to ensure there will be no errors discovered at the time of integration. A Sandox project should be used; QAC can find compiler errors but not warnings.

Yes

Comments:

Component.h is included

Yes

Comments:

All other includes are actually needed. (System includes

Yes

Comments:

only allowed in Nexteer library components)

Software Design and Coding Standards followed:

Version:2.1

Code comments are clear, correct, and adequate

Yes

Comments:

and have been updated for the change: [N40] and

all other rules in the same section as rule [N40],

plus [N75], [N12], [N23], [N33], [N37], [N38],

[N48], [N54], [N77], [N79], [N72]

Source file (.c and .h) comment blocks are per

Yes

Comments:

standards and contain correct information: [N41], [N42]

Function comment blocks are per standards and

Yes

Comments:

contain correct information: [N43]

Code formatting (indentation, placement of

Yes

Comments:

braces, etc.) is per standards: [N5], [N55], [N56],

[N57], [N58], [N59]

Embedded constants used per standards; no

Comments:

For Registers

"magic numbers": [N12]

Memory mapping for non-RTE code

N/A

Comments:

is per standard

All execution-order-dependent code can be

Yes

Comments:

recognized by the compiler: [N80]

All loops have termination conditions that ensure

Yes

Comments:

finite loop iterations: [N63]

All divides protect against divide by zero

N/A

Comments:

if needed: [N65]

All integer division and modulus operations

N/A

Comments:

handle negative numbers correctly: [N76]

All typecasting and fixed point arithmetic,

N/A

Comments:

including all use of fixed point macros and

timer functions, is correct and has no possibility

of unintended overflow or underflow: [N66]

All float-to-unsiged conversions ensure the.

N/A

Comments:

float value is non-negative: [N67]

All conversions between signed and unsigned

N/A

Comments:

types handle msb==1 as intended: [N78]

All pointer dereferencing protects against

Yes

Comments:

null pointer if needed: [N70]

Component outputs are limited to the legal range

N/A

Comments:

No outputs to limit

defined in the FDD DataDict.m file : [N53]

All code is mapped with FDD (all FDD

Yes

Comments:

subfunctions and/or model blocks identified

with code comments; all code corresponds to

some FDD subfunction and/or model block): [N40]

Review did not identify violations of other

Yes

Comments:

coding standard rules

Anomaly or Design Work CR created

N/A

Comments:

for any FDD corrections needed

General Notes / Comments:

Change Owner:

Avinash James

Review Date :

12/13/16

Lead Peer Reviewer:

Selva Sengottaiyan

Approved by Reviewer(s):

Yes

Other Reviewer(s):

Sheet 4: MDD

Rev 1.2

8-Jun-15

Peer Review Meeting Log (MDD Review)

MDD Name:

DmaCfgAndUse_MDD

MDD Revision:

Source File Name:

CDD_DmaCfgAndUse.c

Source File Revision:

Source File Name:

Source File Revision:

Source File Name:

Source File Revision:

Quality Check Items:

Rationale is required for all answers of No

Synergy version matches document

Yes

Comments:

Change log contains detailed description of changes

Yes

Comments:

Changes Highlighted (for Unit Tester)

Yes

Comments:

Diagrams have been included per MDD Guideline

Yes

Comments:

and reviewed

All Design Exceptions and Limitations are listed

N/A

Comments:

Design rationale given for all global

N/A

Comments:

data not communicated through RTE ports, per

Design and Coding Standards rules [N9] and [N10].

All implementation details that differ from the FDD are

N/A

Comments:

noted and explained in Design Rationale

All Unit Test Considerations have been described

N/A

Comments:

No unit test considerations

General Notes / Comments:

Change Owner:

Avinash James

Review Date :

12/13/16

Lead Peer Reviewer:

Selva Sengottaiyan

Approved by Reviewer(s):

Yes

Other Reviewer(s):

Sheet 5: Integration Manual

Rev 1.2

8-Jun-15

Peer Review Meeting Log (Integration Manual Review)

Integration Manual Name:

kzshz2: Intended Use: Identify which file is being reviewed Rationale: Required for traceability. It will help to ensure this sheet is not attached to the wrong design review form. DmaCfgAndUse_Integration_Manual.doc

Integration Manual Revision:

kzshz2: Intended Use: Identify which version of the integration manual has been reviewed. Rationale: Required for traceability between the MDD and review. Auditors will likely require this. 2

Quality Check Items:

Rationale is required for all answers of No

Synergy version matches header

Yes

Comments:

Latest template used

Yes

Comments:

Change log contains detailed description of changes

Yes

Comments:

Changes Highlighted (for Integrator)

Yes

Comments:

General Notes / Comments:

Change Owner:

Avinash James

Review Date :

12/13/16

Lead Peer Reviewer:

Selva Sengottaiyan

Approved by Reviewer(s):

Yes

Other Reviewer(s):

Sheet 6: PolySpace

Rev 1.2

8-Jun-15

Peer Review Meeting Log (QAC/PolySpace Review)

Source File Name:

CDD_DmaCfgAndUse.c

Source File Revision:

Source File Name:

Source File Revision:

Source File Name:

Source File Revision:

EA4 Static Analysis Compliance Guideline version:

EA4 Static Analysis Compliance Guideline version. 1.1.0

Poly Space version:

Windows User: eg. 2013b 2013b

Polyspace sub project version:

Windows User: eg. TL108a_PolyspaceSuprt_1.0.0 Not Released

QAC version:

Windows User: eg 8.1.1-R 8.1.1-R

QAC sub project version:

Windows User: eg. TL_100A_1.1.0 TL100A_QACSuprt_1.2.0

Quality Check Items:

Rationale is required for all answers of No

Contract Folder's header files are appropriate and

kzshz2: Intended Use: Identify that the contract folder contains only the information required for this component. All other variables, constants, function prototypes, etc. should be removed. Rationale: This will help avoid unit testers having to considers object not used. It will also avoid having other files required for QAC.

Yes

Comments:

function prototypes match the latest component version

100% Compliance to the EA4 Static Analysis

Yes

Comments:

Compliance Guideline

Are previously added justification and deviation

Yes

Comments:

comments still appropriate

Do all MISRA deviation comments use approved

Yes

Comments:

deviation tags

Cyclomatic complexity and Static path count OK

Creager, Kathleen: use Browse Function Metrics, STCYC and STPTH

Yes

Comments:

for all functions in the component per Design

and Coding Standards rule [N47]

General Notes / Comments:

Change Owner:

Avinash James

Review Date :

12/13/16

Lead Peer Reviewer:

Selva Sengottaiyan

Approved by Reviewer(s):

Yes

Other Reviewer(s):

2 - DmaCfgAndUse_Integration_Manual

Integration Manual

For

DmaCfgAndUse

VERSION: 2.0

DATE: 10-Dec-2016

Prepared By:

Avinash James

Location: The official version of this document is stored in the Nexteer Configuration Management System.

Revision History

Description	Author	Version	Date
Initial version	Avinash James	1.0	08-Nov-2016
Corrected the micro diag error injection defines	Avinash James	2.0	10-Dec-2016

Table of Contents

1 Abbrevations And Acronyms 4

2 References 5

3 Dependencies 6

3.1 SWCs 6

3.2 Global Functions(Non RTE) to be provided to Integration Project 6

4 Configuration REQUIREMeNTS 7

4.1 Build Time Config 7

4.2 Configuration Files to be provided by Integration Project 7

4.3 Da Vinci Parameter Configuration Changes 7

4.4 DaVinci Interrupt Configuration Changes 7

4.5 Manual Configuration Changes 7

5 Integration DATAFLOW REQUIREMENTS 8

5.1 Required Global Data Inputs 8

5.2 Required Global Data Outputs 8

5.3 Specific Include Path present 8

6 Runnable Scheduling 9

7 Memory Map REQUIREMENTS 10

7.1 Mapping 10

7.2 Usage 10

7.3 NvM Blocks 10

8 Compiler Settings 11

8.1 Preprocessor MACRO 11

8.2 Optimization Settings 11

9 Appendix 12

Abbrevations And Acronyms

Abbreviation	Description
DFD	Design functional diagram
MDD	Module design Document
	<ADD more to the table if applicable>

References

This section lists the title & version of all the documents that are referred for development of this document

Sr. No.	Title	Version
<1>	<MDD Guidelines>	Software Engineering Process 04.00.00
<2>	<Software Naming Conventions>	Software Engineering Process 04.00.00 and working EA4 naming conventions
<3>	<Coding standards>	Software Engineering Process 04.00.00
<4>	<FDD >	See Synergy subproject version
	<Add if more available>

Dependencies

SWCs

Module	Required Feature
MotCtrlMgr	Generated struct type declarations for the Motor Control loop / RTE interface data; macros for access of Motor Control loop data
GuardCfgAndDiagc	PEG and PBG settings to allow DMA transfers; CM200C_DmaCfgAndUse_Impl_1.0.0 or newer requires CM107A_GuardCfgAndDiagc_Impl_1.0.0 or newer.

Note : Referencing the external components should be avoided in most cases. Only in unavoidable circumstance external components should be referred. Developer should track the references.

Global Functions(Non RTE) to be provided to Integration Project

void DmaRegInin (void) - needs to be a trusted function

void InjDmaErr(void) - Inject DAM errors needed for error injection build

void InjMotCtrlTo2MilliSecTrfErr (void) - Inject NTC 2B Errors needed for error injection build

Configuration REQUIREMeNTS

Build Time Config

Modules

Notes

MCUDIAGCERRINJ

STD_OFF for other builds

STD_ON for uDiag test builds

Configuration Files to be provided by Integration Project

None

Da Vinci Parameter Configuration Changes

Parameter	Notes	SWC
<Configurator Changes for parameters>

DaVinci Interrupt Configuration Changes

ISR Name	VIM #	Priority Dependency	Notes
<Configurator Changes for Interrupts>

Manual Configuration Changes

Constant	Notes	SWC
<Additional configuration changes>

Integration DATAFLOW REQUIREMENTS

Required Global Data Inputs

See DataDict.m file

Required Global Data Outputs

See DataDict.m file

Specific Include Path present

Yes

Runnable Scheduling

This section specifies the required runnable scheduling.

Init	Scheduling Requirements	Trigger
DmaCfgAndUseInit1	None	RTE Init

Runnable	Scheduling Requirements	Trigger
DmaCfgAndUsePer1	Per FDD:” - Execution order of "DmaCfgAndUsePer1" shall schedule start of forward path (as soon as possible start of 2ms)”	RTE 2 ms
DmaWaitForMotCtrlTo2MilliSecTrf_Oper	N/A	On invocation of DmaWaitForMotCtrlTo2MilliSecTrf.Oper
DmaEna2MilliSecToMotCtrlTrf_Oper	N/A	On invocation of DmaEna2MilliSecToMotCtrlTrf.Oper
InjDmaErr	N/A	On invocation of InjDmaErr only when MCUDIAGCERRINJ is STD_ON
InjMcuDiagcErr	N/A	On invocation of InjMcuDiagcErr only when MCUDIAGCERRINJ is STD_ON

Memory Map REQUIREMENTS

Mapping

Memory Section	Contents	Notes
CDD_DmaCfgAndUse_START_SEC_CODE

* Each …START_SEC… constant is terminated by a …STOP_SEC… constant as specified in the AUTOSAR Memory Mapping requirements.

Usage

Feature	RAM	ROM
<Memmap usuage info>

Table 1: ARM Cortex R4 Memory Usage

NvM Blocks

None

Compiler Settings

Preprocessor MACRO

<Define all the preprocessor Macros needed and conditions when needed>.

Optimization Settings

<Define Optimization levels that are needed and conditions when needed>.

Appendix

<This section is for appendix>

3 - DmaCfgAndUse_MDD

Module Design Document

For

DmaCfgAndUse

VERSION: 2.0

DATE: 10-Dec-2016

Prepared By:

Avinash James

Location: The official version of this document is stored in the Nexteer Configuration Management System.

Revision History

Description	Author	Version	Date
Initial Version	Avinash James	1.0	08-Nov-2016
Corrected server runnable name	Avinash James	2.0	10-Dec-2016

Table of Contents

1 Abbrevations And Acronyms 5

2 References 6

3 DmaCfgAndUse High-Level Description 7

4 Design details of software module 8

4.1 Graphical representation of DmaCfgAndUse 8

4.2 Data Flow Diagram 8

4.2.1 Module level DFD 8

4.2.2 Sub-Module level DFD 8

4.3 COMPONENT FLOW DIAGRAM 8

5 Variable Data Dictionary 9

5.1 User defined typedef definition/declaration 9

5.2 Variable definition for enumerated types 9

6 Constant Data Dictionary 10

6.1 Program(fixed) Constants 10

6.1.1 Embedded Constants 10

6.1.1.1 Local 10

6.1.1.2 Global 10

6.1.2 Module specific Lookup Tables Constants 10

7 Software Module Implementation 11

7.1 Sub-Module Functions 11

7.2 Initialization Functions 11

7.2.1 Init: DmaCfgAndUseInit1 11

7.2.1.1 Design Rationale 11

7.2.1.2 Module Outputs 11

7.3 PERIODIC FUNCTIONS 11

7.3.1 Per: DmaCfgAndUsePer1 11

7.3.1.1 Design Rationale 11

7.3.1.2 Store Module Inputs to Local copies 11

7.3.1.3 (Processing of function)……… 11

7.3.1.4 Store Local copy of outputs into Module Outputs 11

7.4 Non PERIODIC FUNCTIONS 11

7.4.1 NONPer: DmaEna2MilliSecToMotCtrlTrf_Oper 12

7.4.1.1 Design Rationale 12

7.4.1.2 Store Module Inputs to Local copies 12

7.4.1.3 (Processing of function)……… 12

7.4.1.4 Store Local copy of outputs into Module Outputs 12

7.4.2 NONPer: DmaWaitForMotCtrlTo2MilliSecTrf_Oper 12

7.4.2.1 Design Rationale 12

7.4.2.2 Store Module Inputs to Local copies 12

7.4.2.3 (Processing of function)……… 12

7.4.2.4 Store Local copy of outputs into Module Outputs 12

7.4.3 NONPer: InjDmaErr_Oper 12

7.4.3.1 Design Rationale 12

7.4.3.2 Store Module Inputs to Local copies 12

7.4.3.3 (Processing of function)……… 12

7.4.3.4 Store Local copy of outputs into Module Outputs 12

7.4.4 NONPer: InjMotCtrlTo2MilliSecTrfErr_Oper 12

7.4.4.1 Design Rationale 12

7.4.4.2 Store Module Inputs to Local copies 13

7.4.4.3 (Processing of function)……… 13

7.4.4.4 Store Local copy of outputs into Module Outputs 13

7.5 Interrupt Functions 13

7.6 Serial Communication Functions 14

7.7 Local Function/Macro Definitions 14

7.8 GLObAL Function/Macro Definitions 14

7.8.1 GLObAL Function #1 14

7.8.1.1 Description 14

7.9 TRANSIENT FUNCTIONS 14

8 Unit Test Considerations 15

9 Known Limitations With Design 16

10 Appendix 17

Abbrevations And Acronyms

Abbreviation	Description
DFD	Design functional diagram
MDD	Module design Document
	<ADD more to the table if applicable>

References

This section lists the title & version of all the documents that are referred for development of this document

Sr. No.	Title	Version
<1>	<MDD Guidelines>	Software Engineering Process 04.00.00
<2>	<Software Naming Conventions>	Software Engineering Process 04.00.00 and working EA4 naming conventions
<3>	<Coding standards>	Software Engineering Process 04.00.00
<4>	<FDD >	See Synergy subproject version
	<Add if more available>

DmaCfgAndUse High-Level Description

DMA Configuration and Usage (DmaCfgAndUse) sets up the initial DMA configuration and defines the periodic and server runnable functionality needed for DMA transfers of ADC and Motor Control loop/RTE interface data.

Design details of software module

See FDD.

Graphical representation of DmaCfgAndUse

Data Flow Diagram

See FDD.

Module level DFD

See FDD.

Sub-Module level DFD

See FDD.

COMPONENT FLOW DIAGRAM

Variable Data Dictionary

User defined typedef definition/declaration

<This section documents any user types uniquely used for the module.>

Typedef Name	Element Name	User Defined Type	Legal Range (min)	Legal Range (max)
MotCtrlFromTwoMilliSecRec1	Generated in MotCtrlMgr component	N/A	N/A	N/A
TwoMilliSecToMotCtrlRec1	Generated in MotCtrlMgr component	N/A	N/A	N/A
MotCtrlToTwoMilliSecRec1	Generated in MotCtrlMgr component	N/A	N/A	N/A
TwoMilliSecFromMotCtrlRec1	Generated in MotCtrlMgr component	N/A	N/A	N/A

Variable definition for enumerated types

Enum Name

Element Name

Value

<(Name given for the user defined typdef of type struct/union)

(Variable name qualified in refer[2])>

<(Variable name qualified Refer[2])>

Constant Data Dictionary

Program(fixed) Constants

Embedded Constants

< All program specific constants will be defined in detail >

Local

Constant Name	Resolution	Units	Value
CPU1PEID_CNT_U32	1	Counts	1
PRPHLTOLCLRAMSPID_CNT_U32	1	Counts	3
LCLRAMTOPRPHLSPID_CNT_U32	1	Counts	2
LCLRAMTOLCLRAMSPID_CNT_U32	1	Counts	0
USRMODENA_CNT_U32	1	Counts	1
USRMODDI_CNT_U32	1	Counts	0
MAXWAIT_MICROSEC_U32	1	MicroSec	400
INIZERO_CNT_U32	1	Counts	0
ERRID2BBIT0CASE1_CNT_U32	1	Counts	0x002B0101U
ERRID36BIT0CASE1_CNT_U32	1	Counts	0x00360101U
ERRID36BIT1CASE1_CNT_U32	1	Counts	0x00360201U
Also see FDD DataDict.m file

Global

<This section lists the global constants used by the module. For details on global constants, refer to the Data Dictionary for the application>

Constant Name

See FDD DataDict.m file

Module specific Lookup Tables Constants

<(This is for lookup tables (arrays) with fixed values, same name as other tables)>

Constant Name	Resolution	Value	Software Segment
<Refer Constant name qualified in [2]>	<Refer MDD guidelines [1]>	<Refer MDD guidelines [1]>	<Refer MDD guidelines [1]>

Software Module Implementation

Sub-Module Functions

<(Note: For multiple functions, insert new headers at the “Header 2” level – subset of “ Sub Module Function section above” and follow the same sub-section design shown below . If none required, place the text “None”))>

Initialization Functions

<(Note: For multiple init functions, insert new headers at the “Header 2” level – subset of “ Initialization Function section above” and follow the same sub-section design shown below . If none required, place the text “None”))>

Init: DmaCfgAndUseInit1

Design Rationale

The DMACnnCM channel master registers can be written only in supervisor mode. After the Channel master register for a given channel has been written, the selected Processor Element can write to that channel’s registers in user mode. However, for simplicity, all DMA register initialization is being done in one trusted function. Therefore, only the Per Instance Memory initialization is done directly in the DmaCfgAndUseInit1 function; all DMA register initialization is done in the DmaRegInin function called by DmaCfgAndUseInit1.

Module Outputs

See FDD.

PERIODIC FUNCTIONS

(Note: For multiple periodic functions, insert new headers at the “Header 2” level – subset of “7.3 Periodic Functions” and follow the same sub-section design shown below). If none required, place the text “None”)>

Per: DmaCfgAndUsePer1

Design Rationale

None

Store Module Inputs to Local copies

None

(Processing of function)………

See FDD.

Store Local copy of outputs into Module Outputs

None

Server RUNNABLE FUNCTIONS

DmaEna2MilliSecToMotCtrlTrf_Oper

Design Rationale

None

Store Module Inputs to Local copies

None

(Processing of function)………

See FDD

Store Local copy of outputs into Module Outputs

None

DmaWaitForMotCtrlTo2MilliSecTrf_Oper

Design Rationale

None

Store Module Inputs to Local copies

None

(Processing of function)………

See FDD

Store Local copy of outputs into Module Outputs

None

InjDmaErr

Design Rationale

None

Store Module Inputs to Local copies

None

(Processing of function)………

See FDD

Store Local copy of outputs into Module Outputs

None

InjMcuDiagcErr

Design Rationale

None

Store Module Inputs to Local copies

None

(Processing of function)………

See FDD

Store Local copy of outputs into Module Outputs

None

Interrupt Functions

None

Serial Communication Functions

None

Local Function/Macro Definitions

None

GLObAL Function/Macro Definitions

GLObAL Function #1

Function Name	DmaRegInin	Type	Min	Max
Arguments Passed	None
Return Value	N/A

Description

Trusted function that performs all register initialization from the CM200C_DmaCfgAndUse_PeripheralCfg.xlsx spreadsheet in the FDD. The DMACnnCM channel master registers can be written only in supervisor mode. After the Channel master register for a given channel has been written, the selected Processor Element can write to that channel’s registers in user mode. However, for simplicity, all DMA register initialization is being done in one trusted function. For timing optimization, register level initialization is used (rather than bit field modifications of the register fields).

TRANSIENT FUNCTIONS

None

Unit Test Considerations

None

Known Limitations With Design

There is a deviation from the coding standards for use of display variables which are used only for storing values needed for test purpose. However we have used display variable to compare with a measured parameter and assign value to the diplay variable based on the comparison. This deviation is okay as creating an additional per instance memory for this purpose is redundant and hence have deviated from the coding standards

Appendix

<This section is for appendix>