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Component Implementation
1 - RamMem Peer Review Checklists
Overview
Summary SheetSynergy Project
Davinci Files
Src-RamMem
MDD
Src-RamMemNonRte
PolySpace
Sheet 1: Summary Sheet

Sheet 2: Synergy Project
Sheet 3: Davinci Files
Sheet 4: Src-RamMem
Rev 1.2 | 8-Jun-15 | |||||||||||||||||||||||
Peer Review Meeting Log (Source Code Review) | ||||||||||||||||||||||||
Source File Name: | CDD_RamMem.c | Source File Revision: | 6 | |||||||||||||||||||||
Header File Name: | CDD_RamMem.h | Header File Revision: | ||||||||||||||||||||||
MDD Name: | RamMem_Module Design Document | Revision: | 2 | |||||||||||||||||||||
FDD/SCIR/DSR/FDR/CM Name: | CM103A_RamMem_Design | Revision: | 3.0.1 | |||||||||||||||||||||
Quality Check Items: | ||||||||||||||||||||||||
Rationale is required for all answers of No | ||||||||||||||||||||||||
Working EA4 Software Naming Convention followed: | ||||||||||||||||||||||||
for variable names | Yes | Comments: | ||||||||||||||||||||||
for constant names | Yes | Comments: | ||||||||||||||||||||||
for function names | Yes | Comments: | ||||||||||||||||||||||
for other names (component, memory | Yes | Comments: | ||||||||||||||||||||||
mapping handles, typedefs, etc.) | ||||||||||||||||||||||||
All paths assign a value to outputs, ensuring | N/A | Comments: | ||||||||||||||||||||||
all outputs are initialized prior to being written | ||||||||||||||||||||||||
Requirements Tracability tags in code match the requirements tracability in the FDD | N/A | Comments: | ||||||||||||||||||||||
requirements tracability in the FDD | ||||||||||||||||||||||||
All variables are declared at the function level. | Yes | Comments: | ||||||||||||||||||||||
Synergy version matches change history | Yes | Comments: | ||||||||||||||||||||||
and Version Control version in file comment block | ||||||||||||||||||||||||
Change log contains detailed description of changes | Yes | Comments: | ||||||||||||||||||||||
and Work CR number | ||||||||||||||||||||||||
Code accurately implements FDD (Document or Model) | Yes | Comments: | ||||||||||||||||||||||
Verified no Compiler Errors or Warnings | Yes | Comments: | ||||||||||||||||||||||
Component.h is included | Yes | Comments: | ||||||||||||||||||||||
All other includes are actually needed. (System includes | N/A | Comments: | ||||||||||||||||||||||
only allowed in Nexteer library components) | N/A for this Change | |||||||||||||||||||||||
Software Design and Coding Standards followed: | Version:2.1 | |||||||||||||||||||||||
Code comments are clear, correct, and adequate | Yes | Comments: | ||||||||||||||||||||||
and have been updated for the change: [N40] and | ||||||||||||||||||||||||
all other rules in the same section as rule [N40], | ||||||||||||||||||||||||
plus [N75], [N12], [N23], [N33], [N37], [N38], | ||||||||||||||||||||||||
[N48], [N54], [N77], [N79], [N72] | ||||||||||||||||||||||||
Source file (.c and .h) comment blocks are per | Yes | Comments: | ||||||||||||||||||||||
standards and contain correct information: [N41], [N42] | ||||||||||||||||||||||||
Function comment blocks are per standards and | Yes | Comments: | ||||||||||||||||||||||
contain correct information: [N43] | ||||||||||||||||||||||||
Code formatting (indentation, placement of | Yes | Comments: | ||||||||||||||||||||||
braces, etc.) is per standards: [N5], [N55], [N56], | ||||||||||||||||||||||||
[N57], [N58], [N59] | ||||||||||||||||||||||||
Embedded constants used per standards; no | Yes | Comments: | ||||||||||||||||||||||
"magic numbers": [N12] | ||||||||||||||||||||||||
Memory mapping for non-RTE code | N/A | Comments: | ||||||||||||||||||||||
is per standard | ||||||||||||||||||||||||
All execution-order-dependent code can be | Yes | Comments: | ||||||||||||||||||||||
recognized by the compiler: [N80] | ||||||||||||||||||||||||
All loops have termination conditions that ensure | N/A | Comments: | ||||||||||||||||||||||
finite loop iterations: [N63] | ||||||||||||||||||||||||
All divides protect against divide by zero | N/A | Comments: | ||||||||||||||||||||||
if needed: [N65] | ||||||||||||||||||||||||
All integer division and modulus operations | N/A | Comments: | ||||||||||||||||||||||
handle negative numbers correctly: [N76] | ||||||||||||||||||||||||
All typecasting and fixed point arithmetic, | N/A | Comments: | ||||||||||||||||||||||
including all use of fixed point macros and | ||||||||||||||||||||||||
timer functions, is correct and has no possibility | ||||||||||||||||||||||||
of unintended overflow or underflow: [N66] | ||||||||||||||||||||||||
All float-to-unsiged conversions ensure the. | N/A | Comments: | ||||||||||||||||||||||
float value is non-negative: [N67] | ||||||||||||||||||||||||
All conversions between signed and unsigned | N/A | Comments: | ||||||||||||||||||||||
types handle msb==1 as intended: [N78] | ||||||||||||||||||||||||
All pointer dereferencing protects against | N/A | Comments: | ||||||||||||||||||||||
null pointer if needed: [N70] | ||||||||||||||||||||||||
Component outputs are limited to the legal range | N/A | Comments: | ||||||||||||||||||||||
defined in the FDD DataDict.m file : [N53] | ||||||||||||||||||||||||
All code is mapped with FDD (all FDD | Yes | Comments: | ||||||||||||||||||||||
subfunctions and/or model blocks identified | ||||||||||||||||||||||||
with code comments; all code corresponds to | ||||||||||||||||||||||||
some FDD subfunction and/or model block): [N40] | ||||||||||||||||||||||||
Review did not identify violations of other | Yes | Comments: | ||||||||||||||||||||||
coding standard rules | ||||||||||||||||||||||||
Anomaly or Design Work CR created | N/A | Comments: List Anomaly or CR numbers | ||||||||||||||||||||||
for any FDD corrections needed | ||||||||||||||||||||||||
General Notes / Comments: | ||||||||||||||||||||||||
Reviewed only for the changes | ||||||||||||||||||||||||
Change Owner: | Avinash James | Review Date : | 08/25/16 | |||||||||||||||||||||
Lead Peer Reviewer: | Selva Sengottaian | Approved by Reviewer(s): | Yes | |||||||||||||||||||||
Other Reviewer(s): | ||||||||||||||||||||||||
Sheet 5: MDD
Sheet 6: Src-RamMemNonRte
Rev 1.2 | 8-Jun-15 | |||||||||||||||||||||||
Peer Review Meeting Log (Source Code Review) | ||||||||||||||||||||||||
Source File Name: | CDD_RamMemNonRte.c | Source File Revision: | 5 | |||||||||||||||||||||
Header File Name: | CDD_RamMem.h | Header File Revision: | ||||||||||||||||||||||
MDD Name: | RamMem_Module Design Document | Revision: | NA | |||||||||||||||||||||
FDD/SCIR/DSR/FDR/CM Name: | CM103A_RamMem_Design | Revision: | 3.0.1 | |||||||||||||||||||||
Quality Check Items: | ||||||||||||||||||||||||
Rationale is required for all answers of No | ||||||||||||||||||||||||
Working EA4 Software Naming Convention followed: | ||||||||||||||||||||||||
for variable names | N/A | Comments: | ||||||||||||||||||||||
for constant names | N/A | Comments: | ||||||||||||||||||||||
for function names | N/A | Comments: | ||||||||||||||||||||||
for other names (component, memory | N/A | Comments: | ||||||||||||||||||||||
mapping handles, typedefs, etc.) | ||||||||||||||||||||||||
All paths assign a value to outputs, ensuring | N/A | Comments: | ||||||||||||||||||||||
all outputs are initialized prior to being written | ||||||||||||||||||||||||
Requirements Tracability tags in code match the requirements tracability in the FDD | N/A | Comments: | ||||||||||||||||||||||
requirements tracability in the FDD | ||||||||||||||||||||||||
All variables are declared at the function level. | N/A | Comments: | ||||||||||||||||||||||
Synergy version matches change history | Yes | Comments: | ||||||||||||||||||||||
and Version Control version in file comment block | ||||||||||||||||||||||||
Change log contains detailed description of changes | Yes | Comments: | ||||||||||||||||||||||
and Work CR number | ||||||||||||||||||||||||
Code accurately implements FDD (Document or Model) | Yes | Comments: | ||||||||||||||||||||||
Verified no Compiler Errors or Warnings | Yes | Comments: | ||||||||||||||||||||||
Component.h is included | Yes | Comments: | ||||||||||||||||||||||
All other includes are actually needed. (System includes | Yes | Comments: | ||||||||||||||||||||||
only allowed in Nexteer library components) | ||||||||||||||||||||||||
Software Design and Coding Standards followed: | Version:2.1 | |||||||||||||||||||||||
Code comments are clear, correct, and adequate | Yes | Comments: | ||||||||||||||||||||||
and have been updated for the change: [N40] and | ||||||||||||||||||||||||
all other rules in the same section as rule [N40], | ||||||||||||||||||||||||
plus [N75], [N12], [N23], [N33], [N37], [N38], | ||||||||||||||||||||||||
[N48], [N54], [N77], [N79], [N72] | ||||||||||||||||||||||||
Source file (.c and .h) comment blocks are per | Yes | Comments: | ||||||||||||||||||||||
standards and contain correct information: [N41], [N42] | ||||||||||||||||||||||||
Function comment blocks are per standards and | Yes | Comments: | ||||||||||||||||||||||
contain correct information: [N43] | ||||||||||||||||||||||||
Code formatting (indentation, placement of | Yes | Comments: | ||||||||||||||||||||||
braces, etc.) is per standards: [N5], [N55], [N56], | ||||||||||||||||||||||||
[N57], [N58], [N59] | ||||||||||||||||||||||||
Embedded constants used per standards; no | Yes | Comments: | ||||||||||||||||||||||
"magic numbers": [N12] | ||||||||||||||||||||||||
Memory mapping for non-RTE code | Yes | Comments: | ||||||||||||||||||||||
is per standard | ||||||||||||||||||||||||
All execution-order-dependent code can be | N/A | Comments: | ||||||||||||||||||||||
recognized by the compiler: [N80] | ||||||||||||||||||||||||
All loops have termination conditions that ensure | Yes | Comments: | ||||||||||||||||||||||
finite loop iterations: [N63] | ||||||||||||||||||||||||
All divides protect against divide by zero | N/A | Comments: | ||||||||||||||||||||||
if needed: [N65] | ||||||||||||||||||||||||
All integer division and modulus operations | N/A | Comments: | ||||||||||||||||||||||
handle negative numbers correctly: [N76] | ||||||||||||||||||||||||
All typecasting and fixed point arithmetic, | Yes | Comments: | ||||||||||||||||||||||
including all use of fixed point macros and | ||||||||||||||||||||||||
timer functions, is correct and has no possibility | ||||||||||||||||||||||||
of unintended overflow or underflow: [N66] | ||||||||||||||||||||||||
All float-to-unsiged conversions ensure the. | N/A | Comments: | ||||||||||||||||||||||
float value is non-negative: [N67] | ||||||||||||||||||||||||
All conversions between signed and unsigned | N/A | Comments: | ||||||||||||||||||||||
types handle msb==1 as intended: [N78] | ||||||||||||||||||||||||
All pointer dereferencing protects against | N/A | Comments: | ||||||||||||||||||||||
null pointer if needed: [N70] | ||||||||||||||||||||||||
Component outputs are limited to the legal range | N/A | Comments: | ||||||||||||||||||||||
defined in the FDD DataDict.m file : [N53] | ||||||||||||||||||||||||
All code is mapped with FDD (all FDD | Yes | Comments: | ||||||||||||||||||||||
subfunctions and/or model blocks identified | ||||||||||||||||||||||||
with code comments; all code corresponds to | ||||||||||||||||||||||||
some FDD subfunction and/or model block): [N40] | ||||||||||||||||||||||||
Review did not identify violations of other | Yes | Comments: | ||||||||||||||||||||||
coding standard rules | ||||||||||||||||||||||||
Anomaly or Design Work CR created | N/A | Comments: List Anomaly or CR numbers | ||||||||||||||||||||||
for any FDD corrections needed | ||||||||||||||||||||||||
General Notes / Comments: | ||||||||||||||||||||||||
Reviewed only for the changes | ||||||||||||||||||||||||
Change Owner: | Avinash James | Review Date : | 08/25/16 | |||||||||||||||||||||
Lead Peer Reviewer: | Selva Sengottaiyan | Approved by Reviewer(s): | Yes | |||||||||||||||||||||
Other Reviewer(s): | Krishna Anne | |||||||||||||||||||||||
Sheet 7: PolySpace
2 - RamMem_Integration Manual
Integration Manual
For
RamMem
VERSION: 2
DATE: 08/20/16
Prepared By:
Software Group,
Nexteer Automotive,
Saginaw, MI, USA
Location: The official version of this document is stored in the Nexteer Configuration Management System.
Revision History
Sl. No. | Description | Author | Version | Date |
1 | Initial version | Selva Sengottaiyan | 1.0 | 04/11/16 |
2 | Uodated to design version 3.0.1 | Avinash James | 2.0 | 08/23/16 |
Table of Contents
3.2 Global Functions(Non RTE) to be provided to Integration Project 6
4 Configuration REQUIREMeNTS 8
4.2 Configuration Files to be provided by Integration Project 8
4.3 Da Vinci Parameter Configuration Changes 8
4.4 DaVinci Interrupt Configuration Changes 8
4.5 Manual Configuration Changes 8
5 Integration DATAFLOW REQUIREMENTS 9
5.1 Required Global Data Inputs 9
5.2 Required Global Data Outputs 9
5.3 Specific Include Path present 9
Abbrevations And Acronyms
Abbreviation | Description |
References
This section lists the title & version of all the documents that are referred for development of this document
Sr. No. | Title | Version |
Dependencies
SWCs
Module | Required Feature |
Note : Referencing the external components should be avoided in most cases. Only in unavoidable circumstance external components should be referred. Developer should track the references.
Global Functions(Non RTE) to be provided to Integration Project
RamMemLclRamSngBitEcc – – Callout function for Non-Rte Server Interface , Call back functions for MCU ECM Error Source RAM Memory single bit ECC.
Configuration REQUIREMeNTS
Build Time Config
Modules | Notes | |
Configuration Files to be provided by Integration Project
N/A
Da Vinci Parameter Configuration Changes
Parameter | Notes | SWC |
/Renesas/EcucDefs_Mcu/Mcu/McuModuleConfiguration /McuEcmErrorSourcesCfg/McuEcmErrorSource34 | Call back function name is “RamMemLclRamSngBitEcc”. Refer the CM104A Integration manual for the configuration of the error source. (Type of the error, classification of the error eg FENMI or EI information) . | |
DaVinci Interrupt Configuration Changes
ISR Name | Notes |
Manual Configuration Changes
Constant | Notes | SWC |
Integration DATAFLOW REQUIREMENTS
Required Global Data Inputs
Required Global Data Outputs
Specific Include Path present
Yes
Runnable Scheduling
API usage and scheduling of BSW components expected to be captured at a project architectural level and is beyond the scope of this document. Third party documentation can be referenced as needed.
Init | Scheduling Requirements | Trigger |
RamMemInit1 | RTE initializaton | RTE initialization |
Scheduling Requirements | Trigger | |
RamMemPer1 | 2ms |
.
Memory Map REQUIREMENTS
Mapping
Memory Section | Contents | Notes |
* Each …START_SEC… constant is terminated by a …STOP_SEC… constant as specified in the AUTOSAR Memory Mapping requirements.
Usage
Feature | RAM | ROM |
NvM Blocks
Compiler Settings
Preprocessor MACRO
Optimization Settings
Appendix
None
3 - RamMem_Module Design Document
Module Design Document
For
RamMem
Aug 23, 2016
Prepared For:
Software Engineering
Nexteer Automotive,
Saginaw, MI, USA
Prepared By:
Software Group,
Nexteer Automotive,
Saginaw, MI, USA
Change History
Description | Author | Version | Date |
Initial Version | Selva Sengottaiyan | 1 | 04/06/16 |
Created local functions for reducing cyclometric complexity | Selva Sengottaiyan | 2 | 06/26/2016 |
Changed SPI ECC handling from interrupt to polling | Avinash James | 3 | 08/23/2016 |
Table of Contents
2 RamMem & High-Level Description 6
3 Design details of software module 7
3.1 Graphical representation of RamMem 7
4.1 Program (fixed) Constants 8
5 Software Component Implementation 9
5.4 Module Internal (Local) Functions 10
5.5 GLOBAL Function/Macro Definitions 11
6 Known Limitations with Design 13
Appendix A Abbreviations and Acronyms 15
Introduction
Purpose
Scope
The following definitions are used throughout this document:
Shall: indicates a mandatory requirement without exception in compliance.
Should: indicates a mandatory requirement; exceptions allowed only with documented justification.
May: indicates an optional action.
RamMem & High-Level Description
See FDD
Design details of software module
Graphical representation of RamMem
Data Flow Diagram
Component level DFD
N/A
Function level DFD
N/A
Constant Data Dictionary
Program (fixed) Constants
Embedded Constants
Local Constants
Constant Name | Resolution | Units | Value |
---|---|---|---|
LCLRAMBASADR_CNT_U32 | 1 | Cnt | 0xFEB80000U |
VLDADRTESTBITMASK_CNT_U32 | 1 | Cnt | 0xFFFE0000U |
VLDADRTESTRES_CNT_U32 | 1 | Cnt | 0x00060000U |
WORDLINEADRMASK_CNT_U32 | 1 | Cnt | 0xFFFFFF1FU |
BNK0ERRCLRMASK_CNT_U32 | 1 | Cnt | 0x00000001U |
BNK1ERRCLRMASK_CNT_U32 | 1 | Cnt | 0x00000002U |
BNK2ERRCLRMASK_CNT_U32 | 1 | Cnt | 0x00000004U |
BNK3ERRCLRMASK_CNT_U32 | 1 | Cnt | 0x00000008U |
BNK0SNGBITERRMASK_CNT_U32 | 1 | Cnt | 0x00000001U |
BNK1SNGBITERRMASK_CNT_U32 | 1 | Cnt | 0x00000100U |
BNK2SNGBITERRMASK_CNT_U32 | 1 | Cnt | 0x00010000U |
BNK3SNGBITERRMASK_CNT_U32 | 1 | Cnt | 0x01000000U |
Software Component Implementation
Sub-Module Functions
Init: RamMemInit1
Design Rationale
Module Outputs
Refer to FDD
Per: RamMemPer1
Design Rationale
Module Outputs
Refer to FDD
Server Runables
RamMemLclRamSngBitEcc
Design Rationale
Refer the FDD
Processing
Refer the FDD
Interrupt Functions
Module Internal (Local) Functions
Local Function #1
Function Name | RamFailrModClassnChk | Type | Min | Max |
Arguments Passed | None | |||
Return Value |
Design Rationale
Refer the FDD
Processing
Refer the FDD
Local Function #2
Function Name | RamMemLclRamFailrChk | Type | Min | Max |
Arguments Passed | LclRamFailrAdr_Cnt_T_u32 | uint32 | 0 | 4294967295 |
Return Value |
Design Rationale
Refer the FDD
Processing
Refer the FDD
Local Function #3
Function Name | SpiEccErr | Type | Min | Max |
Arguments Passed | None | |||
Return Value |
Design Rationale
Refer the FDD
Processing
Refer the FDD
Local Function #4
Function Name | FrEccErr | Type | Min | Max |
Arguments Passed | None | |||
Return Value |
Design Rationale
Refer the FDD
Processing
Refer the FDD
Local Function #5
Function Name | CanEccErr | Type | Min | Max |
Arguments Passed | None | |||
Return Value |
Design Rationale
Refer the FDD
Processing
Refer the FDD
GLOBAL Function/Macro Definitions
GLOBAL Function #1
Function Name | (Exact name used) | Type | Min | Max |
Arguments Passed | None | <Refer MDD guidelines[1]> | <Refer MDD guidelines[1]> | <Refer MDD guidelines[1]> |
Return Value |
Design Rationale
Processing
Known Limitations with Design
Local RAM Single bit PIM for address store will be overwritten for each banks which can be avoided by defining Pims for each memory block. Will be reviewed POST IVER build
UNIT TEST CONSIDERATION
None
Abbreviations and Acronyms
Abbreviation or Acronym | Description |
---|---|
Glossary
Note: Terms and definitions from the source “Nexteer Automotive” take precedence over all other definitions of the same term. Terms and definitions from the source “Nexteer Automotive” are formulated from multiple sources, including the following:
ISO 9000
ISO/IEC 12207
ISO/IEC 15504
Automotive SPICE® Process Reference Model (PRM)
Automotive SPICE® Process Assessment Model (PAM)
ISO/IEC 15288
ISO 26262
IEEE Standards
SWEBOK
PMBOK
Existing Nexteer Automotive documentation
Term | Definition | Source |
---|---|---|
MDD | Module Design Document | |
DFD | Data Flow Diagram |
References
Ref. # | Title | Version |
---|---|---|
1 | AUTOSAR Specification of Memory Mapping (Link:AUTOSAR_SWS_MemoryMapping.pdf) | v1.3.0 R4.0 Rev 2 |
2 | MDD Guideline | EA4 01.00.01 |
3 | Software Naming Conventions.doc | 1.0 |
4 | Software Design and Coding Standards.doc | 2.1 |