Component Design
Component Documentation
- EA4 NTC 0x0A7 Handwheel Angle Over Travel.html
- EA4 NTC 0x0E1 Rack End of Travel Storage Fault.html
- SF011A_EotLrng_Design_PeerReviewChkList.html
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NTC Overview
NTC 0x0A7.0
Description:
This diagnostic is in place to set fault when Handwheel Angle exceeds specific calibratable value (named EotLrngHwAgOverTrvlEntr) and gets back to another calibratable value (named EotLrngHwAgOverTrvlExit) for calibratable number of times (EotLrngHwAgOverTrvlCnt).
Diagnostic Overview:
The diagnostic compares the Handwheel Angle with the Clockwise and Counterclockwise calibratable values. When exceeding Enter value is detected and switch boolean variable is set to FALSE, the counter is incremented by 1. The counter can be incremented again only when the value of Handwheel Angle becomes lesser than the calibratable value. When counter exceeds calibratable count value, the fault is set.
Typical Fault Response:
- Response for this diagnostic is F3
Probable Sources
(Most to Least Probable):
Wrong C-factor cal set
Connection to probe housing assembly (no connection)
Sensor fault
Probe housing assembly interface circuit failure
Software Rack Limiter failure
Initialization | |
Periodic | X |
Event |
Date | Revision | Initials |
13Jun2016 | Initial Release | SS |
Description of Unusual Event setting NTC | Root Cause / Explanation |
Date | FDD & Rev | Modifications to Diagnostic Function |
13Jun2016 | SF011A 2.1.0 | Initial version |
21Nov2016 | SF011A 3.0.0 | New logic of triggering added |
Algorithm Changes / Lessons Learned / Revision Log
NTC Overview
NTC 0x0E1.0
Description:
When Software Rack Limiter (SRL) is enabled, SF011A receives Handwheel Angle End of
travel Clockwise and Counter Clockwise signals (Signal 0 and Signal 1) and its availability
status from CM650 and CM660.
The NTC will be set in SF011A when Cw and Ccw Eot signals are not available or if signals do
not correlate or if signals are out of range.
Diagnostic Overview:
The NTC 0x0E1 will be set when any one of the following conditions occur:
1..When Eot Cw and Ccw signals (Signal 0 an Signal 1) are not available for 500 msec, Signal Available Fault ( Bit 0 of NTC 0X0E1) is set and NTC is set to “FAILED”.
2..When Eot Cw and Ccw signals are available but either of Cw or Ccw signals do not correlate each other then Correlation Fault ( Bit 1 of NTC 0X0E1) is set and NTC is set to “FAILED” instantaneously.
3..When Eot Cw and Ccw signals are available but either of Cw or Ccw Eot signal is out of range then Out of Range Fault ( Bit 2 of NTC 0x0E1) is set and NTC is set to “FAILED” instantaneously.
4..NTC 0x0E1 is set to PASS when Cw and Ccw Eot are both available, within range and correlate each other.
Typical Fault Response:
- Response for this diagnostic is F3
Probable Sources
(Most to Least Probable):
Wrong C-factor cal set
Connection to control module (no connection)
Sensor fault
Control module interface circuit failure
Initialization | |
Periodic | X |
Event |
Date | Revision | Initials |
18may2016 | Initial Release | Sudeep Shankar |
Description of Unusual Event setting NTC | Root Cause / Explanation |
Date | FDD & Rev | Modifications to Diagnostic Function |
18May2016 | SF011A 2.0.0 | Initial version |
Algorithm Changes / Lessons Learned / Revision Log
This is the master list of questions. | ![]() | ADVANCED FILTER CRITERIA | ||||||
A macro is used to filter and populate separate spreadsheets for each engineering discipline. | Artifact | Domain1 | Domain2 | |||||
Number | Artifact | Checklist Item | Domain1 | Domain2 | ||||
1 | dict | Is Filename of Data Dictionary in correct format? | Process | none | ||||
2 | dict | Is the FDD.Version property correctly updated? | Process | none | ||||
3 | dict | Are the following values correct for Runnables: .Context | Process | Software | Should be Architect | |||
4 | dict | Are the following values correct for Runnables: .TimeStep | Process | Apps | Should be Architect | |||
5 | dict | Are the following values correct for SrvRunnables: .Return | Process | Software | Should be Architect | |||
6 | dict | Are the following values correct for SrvRunnables: .Arguments | Process | Software | Should be Architect | |||
7 | dict | Are the following values correct for all Ip/Op/IrvSignals: .EngDT | Process | none | Should be Architect | |||
8 | dict | Are the following values correct for all Ip/Op/IrvSignals: .DocUnit | Process | none | Should be Architect | |||
9 | dict | Are the following values correct for all Ip/Op/IrvSignals: .EngInit | Process | none | Should be Architect | |||
10 | dict | Are the following values correct for all Ip/Op/IrvSignals: .EngMin | Process | none | Should be Architect | |||
11 | dict | Are the following values correct for all Ip/Op/IrvSignals: .EngMax | Process | none | Should be Architect | |||
12 | dict | Are the following values correct for all Ip/Op/IrvSignals: .ReadIn/WrittenIn | Process | none | ||||
13 | dict | Are the following values correct for all Ip/Op/IrvSignals: .ReadType/WriteType | Process | none | ||||
14 | dict | Are the following values correct for all Calibrations: .EngDT | SME | none | ||||
15 | dict | Are the following values correct for all Calibrations: .DocUnit | Apps | Process | ||||
16 | dict | Are the following values correct for all Calibrations: .EngMax | Apps | none | ||||
17 | dict | Are the following values correct for all Calibrations: .Cardinality | Apps | none | ||||
18 | dict | Are the following values correct for all Calibrations: .CustomerVisible | Apps | none | ||||
19 | dict | Are the following values correct for all Calibrations: .Impact | Apps | Safety | ||||
20 | dict | Are the following values correct for all Calibrations: .GraphLink | Apps | none | ||||
21 | dict | Are the following values correct for all Calibrations: .Monotony | Apps | none | ||||
22 | dict | Are the following values correct for all Calibrations: .PortName | Software | Process | ||||
23 | dict | Are the following values correct for all NVM: .EngDT | SME | none | ||||
24 | dict | Are the following values correct for all NVM: .DocUnit | Process | Apps | ||||
25 | dict | Are the following values correct for all NVM: .EngInit | Software | none | ||||
26 | dict | Are the following values correct for all NVM: .Alias | Software | none | ||||
27 | dict | Are the following values correct for all NVM: .InitRowCol | Software | none | ||||
28 | dict | Are the following values correct for all Display Variables: .EngDT | SME | none | ||||
29 | dict | Are the following values correct for all Display Variables: .DocUnit | Apps | none | ||||
30 | dict | Are the following values correct for all Display Variables: .EngMin | Software | none | ||||
31 | dict | Are the following values correct for all Display Variables: .EngMax | Software | none | ||||
32 | dict | Are the following values correct for all Display Variables: .InitRowCol | Software | none | ||||
33 | dict | Are the following values correct for all PIM: .EngDT | SME | none | ||||
34 | dict | Are the following values correct for all PIM: .DocUnit | Process | none | ||||
35 | dict | Are the following values correct for all PIM: .EngMin | Software | none | ||||
36 | dict | Are the following values correct for all PIM: .EngMax | Software | none | ||||
37 | dict | Are the following values correct for all PIM: .InitRowCol | Software | none | ||||
38 | dict | Are the following values correct for all Constants: .EngDT | SME | none | ||||
39 | dict | Are the following values correct for all Constants: .DocUnit | Process | none | ||||
40 | dict | Are the following values correct for all Calibrations: .EngVal | Apps | none | ||||
41 | dict | Are the following values correct for all Calibrations: .EngMin | Apps | none | ||||
43 | dict | Are the following values correct for all Calibrations: .TuningOwner | Safety | Apps | ||||
47 | dict | Are the following values correct for all Calibrations: .Online | Safety | Apps | ||||
44 | dict | Does the FDD .DesignASIL property match requirements? | Safety | none | ||||
45 | dict | Does FDD Long Name, Short Name, and Description match requirements? | Apps | Process | ||||
46 | dict | Do output signal ranges match requirements? | Apps | Process | ||||
42 | dict | Are lookup tables using compatible table dimensions? | Safety | Software | ||||
48 | dict | Do signal and parameter names accurately describe their purpose? | Apps | none | ||||
49 | dict | Do all .Description properties provide useful information? | Apps | none | ||||
50 | dict | Has Static Register evaluation has been completed and updated for any register data that is written to? | SME | none | ||||
51 | dict | Are all clients from model defined in dictionary? | Process | Software | ||||
52 | dict | Do client definitions match their corresponding server runnable? | Process | Software | ||||
53 | dict | Is NVM defined in the appropriate number of blocks (separate for EOL vs saved at power-off)? | Process | Software | ||||
54 | dict | Is NVM with multiple values defined as a structure? | Process | Software | ||||
55 | dict | Are NVM structure members arranged largest-to-smallest datatype? | Process | Software | ||||
56 | dict | Are local Constants unique from global constants available in xx999A dictionaries? | Process | Software | ||||
57 | dict | Are calibration tables named correctly (e.g. AssiX and AssiY)? | Process | Apps | ||||
58 | dict | Are Constant names abbreviated properly (ALLCAPS are not checkable by tools)? | Process | none | ||||
59 | dict | Is the Data Dictionary Verification report error free? | Process | none | ||||
60 | dict | Are all data types represented by released Data_Management classes? | Process | none | ||||
61 | model | Are all the Memory Store blocks for PIM and Display Variables located on the 2nd level of model? | Process | Software | ||||
62 | model | Is each diagnostic (NTC) capable of being set to "PASS"? | Process | Software | ||||
63 | model | Does non-zero intialization of PIM occur in the function's Init runnable? | Process | Software | ||||
64 | model | Does design properly include Set Ram Block Status when NVM RAM values change? | Process | Software | ||||
65 | model | Are NTCs set only outside an IRQ (not related to the typical periodic OS)? | Process | Software | ||||
66 | model | Are NTCs set and read only at periodic steps no less than 2 ms? | Process | Software | ||||
67 | model | Does model execute without errors/warnings after loading NxtrMBDConfig configuration set? | Process | Apps | ||||
68 | model | Is filename of model in correct format? | Process | none | ||||
69 | model | Is Top level of model annotated with Requirements Baseline? | Process | none | ||||
70 | model | Is the Top level of the model annotated with Tool Dependencies? | Process | none | ||||
71 | model | Is Top level of model annotated with Change Log or History? | Process | none | ||||
72 | model | Is the 2nd level of model free from subsystems that are not Function-Call Subsystems? | Process | none | ||||
73 | model | Is the 2nd level of model free from arithmetic and logic operations? | Process | none | ||||
74 | model | Are the Runnable trigger signals named as "call_<Runnable>"? | Process | none | ||||
75 | model | Does 2nd level of model have a properly updated annotation with name, description, and intended baseline number? | Process | none | ||||
76 | model | Are all data flow layers free of Function-Call Subsystems and Memory Store blocks? | Process | none | ||||
77 | model | Does the Model have the confidentiality and copyright information inside all its Subsystems? | Process | none | ||||
78 | model | Are all requirements links of the format <FDDNumber>_<ObjectID>? | Process | none | ||||
79 | model | Does requirements HTML report reference only the DOORS module of this component for all links in the design? | Process | none | ||||
80 | model | Was Model Advisor run with the correct configuration settings? | Process | none | ||||
81 | model | Is the Model Advisor rerport free from "Fails". | Process | none | ||||
82 | model | Does the model execute? | Process | none | ||||
83 | model | Are Model Advisor report ISO26262 warnings acceptable? | Safety | none | ||||
84 | model | Is model free from dynamic array size allocation? | Safety | Software | ||||
85 | model | Does model include adequate annotation throughout? | Apps | none | ||||
86 | model | Is model free from data type conversion blocks that do not explicitly state desired data type? | Safety | Software | ||||
87 | model | Does model refrain from using Display Variable values in downstream operations? | Safety | Software | ||||
88 | model | Are all GOTO/FROM blocks restricted in scope to their own subystem level? | Safety | Software | ||||
89 | model | If model has ADC input, is failure boolean input and appropriate fault response been included? | Safety | Process | ||||
90 | model | Does design calculate PIM values only within their defined range? | Software | none | ||||
91 | model | Does design include output limiting blocks? | Software | Safety | ||||
92 | model | Do cal ranges & logic ensure freedom from divide-by-zero? | Software | Safety | ||||
93 | model | Do cal ranges & logic ensure no incompatible values for their datatype? | Software | Process | ||||
94 | model | Are Model Advisor report MISRA warnings acceptable? | Software | none | ||||
95 | model | Is design free of unreachable logic? | Software | none | ||||
96 | model | Do state machines provide exits of all non-latch states? | Software | none | ||||
97 | model | Is design free from recursive logic that could cause indefinate waits? | Software | none | ||||
98 | model | Does design maintain data size consistency? | Software | none | ||||
99 | model | Are "magic numbers" acceptable? | Process | Software | ||||
100 | model | Are the following values correct for all NTC: .NtcTyp | Apps | Safety | ||||
101 | model | Are display variables appropriately placed? | Apps | none | ||||
102 | model | Does design provide appropriate tuning flexibility? | Apps | none | ||||
103 | model | Are blocks linked to the correct requirements? (watch for problems due to copy/pasted blocks) | Apps | none | ||||
104 | model | Is the list of unlinked blocks acceptable? | Apps | none | ||||
105 | model | Does design account for all requirements? | Apps | none | ||||
106 | model | Is design of a managable size and easy to understand? | Apps | Software | ||||
107 | model | Is design easily disabled via calibration? | Apps | none | ||||
108 | model | Does model include appropriate logic for dealing with missing or corrupted NVM data? | SME | Safety | ||||
109 | model | Does design either work with global signal units or contain necessary unit-conversion logic? | SME | Apps | ||||
110 | model | Does the design prevent Integrator drifting? | SME | none | ||||
111 | model | Does design make proper use of limiters to prevent integrator windup and runaway values? | SME | none | ||||
112 | model | Are all IIR filters free of potential instability over their defined calibration ranges? | SME | none | ||||
113 | model | Is Stateflow used only for state machines not easily represented in Simulink? | Software | none | ||||
114 | model | Do IF..ELSEIF blocks also contain an ELSE condition? | Process | none | ||||
115 | model | Do SWITCH CASE blocks also contain a DEFAULT condtion? | Process | none | ||||
116 | model | Are ELSE and DEFAULT branching conditions reachable when dependent on internal variables? | Process | none | ||||
117 | model | Is model free from over-nested IF logic or redundant IF..ELSEIF..ELSEIF.. Conditions? | Software | none | ||||
118 | model | Is model free from arithmetic operations on Boolean values? | Software | none | ||||
119 | model | Is model optimized to minimize redundant calculations? | Process | none | ||||
120 | package | Does NTC Summary sheet adequately describe NTC usage? | Apps | none | ||||
121 | package | Does review meet 'inspection' criteria? | Safety | Process | ||||
122 | package | Does Design folder contain only the model, data dictionary, and (optionally) a simulation setup script? | Process | none | ||||
123 | package | Does Doc folder contain a zipped HTML webview model? | Process | none | ||||
124 | package | Was webview model created without requirements highlighted? | Process | none | ||||
125 | package | Does Doc folder contain appropriate number of NTC Summary sheets? | Process | none | ||||
126 | package | Does Reports folder contain only the data dictionary verification report, Model Advisor report, and zipped requirements traceability report? | Process | none | ||||
127 | package | Has author performed basic simulations to screen for problems? | SME | none |
Rev | Change | Author |
01.00.05 | Added lesson learned #3.5 | MDK |
01.00.06 | Added lesson learned #3.6, 3.7 - Structure and writing of NVM in mfiles and models. | MDK |
02.00.00 | Combined ESG and Systems into one, compatible with Data_Management 2.13.0 of CreateDD and VerifyDD. | K. Derry |
02.01.00 | Added: Does FDD.DesignASIL match requirements? Added: Was webview model created without requirements highlighted? Removed: Redundant row in Data Dictionary section. Formatting: Column C now consistently center-justified. | K. Derry |
02.02.00 | Added: Are all data types represented by released Data_Management classes? Removed: Are all runnables defined? Rationale: Automated tools checking. Removed: Does the Component shortname match data dictionary FDD metadata? Removed: "Data store name must resolve to Simulink signal object" Edited: Model Advisor report should now be left unzipped. | K. Derry |
3.0.0 | New concept of discipline-specific checklists. New sheets for Project Info, Safety, Software, Apps, SME, and Master. New VBA code to distribute master list onto appropriate discipline sheets. Major reformatting, many line item checks added/deleted/modified. | K. Derry |
Model Advisor Report - SF011A_EotLrng.slx | |
Simulink version: 8.2 | Model version: 006 |
System: SF011A_EotLrng | Current run: 01-Dec-2016 15:31:55 |
Model Advisor configuration: ...NxtrModelAdvisorConfig.mat |
Pass | Fail | Warning | Not Run | Total |
| | | | 359 |
You should turn on the following optimization(s):
none . | |
Identify Inport blocks in the top-level of the model with missing or inherited sample times, data types, or port dimensions
Warning
The following Inport blocks have undefined or inherited sample times, data types or port dimensions
Inport | Link | Conditions |
1 | SF011A_EotLrng/HwAg | Missing port dimension Missing signal data type Missing port sample time |
2 | SF011A_EotLrng/HwAgDiDiagSts | Missing port dimension Missing signal data type Missing port sample time |
3 | SF011A_EotLrng/HwAgAuthy | Missing port dimension Missing signal data type Missing port sample time |
4 | SF011A_EotLrng/HwTq | Missing port dimension Missing signal data type Missing port sample time |
5 | SF011A_EotLrng/MotVelCrf | Missing port dimension Missing signal data type Missing port sample time |
6 | SF011A_EotLrng/HwAgEotSig0Avl | Missing port dimension Missing signal data type Missing port sample time |
7 | SF011A_EotLrng/HwAgEotSig1Avl | Missing port dimension Missing signal data type Missing port sample time |
8 | SF011A_EotLrng/HwAgEotSig0Cw | Missing port dimension Missing signal data type Missing port sample time |
9 | SF011A_EotLrng/HwAgEotSig0Ccw | Missing port dimension Missing signal data type Missing port sample time |
10 | SF011A_EotLrng/HwAgEotSig1Cw | Missing port dimension Missing signal data type Missing port sample time |
11 | SF011A_EotLrng/HwAgEotSig1Ccw | Missing port dimension Missing signal data type Missing port sample time |
12 | SF011A_EotLrng/HwAgOverTrvlCnt_ArgIn | Missing port dimension Missing signal data type Missing port sample time |
Identify blocks not supported by code generation or not recommended for C/C++ production code deployment.
Warning
The following blocks are not supported or not recommended for C/C++ production code deployment:
Block | Block Type | Code generation support | Recommendation for C/C++ production code deployment |
SF011A_EotLrng/Clock | Clock | Yes | No |
SF011A_EotLrng/Step | Step | Yes | No |
SF011A_EotLrng/Step1 | Step | Yes | No |
Compares the state machine type of all Stateflow charts to the desired type.
Check for Classic state machines
Identify Stateflow charts using the Classic state machine type.
Warning
The following charts using Classic state machines were found in the model:
Check for Mealy state machines
Identify Stateflow charts using the Mealy state machine type.
Passed
No charts using Mealy state machines were found in the model.
_________________________________________________________________________________________
Check for Moore state machines
Identify Stateflow charts using the Moore state machine type.
Passed
No charts using Moore state machines were found in the model.
Name | Value |
State Machine Type | Common |
Check Simulink blocks and Stateflow objects that do not link to a requirements document
Warning
The following blocks do not link to a requirement document:
Identify subsystem names that use characters that are not correct in C code.
See Also
Error | Subsystem block |
Name contains incorrect characters. | ..../EotLrng/EotLrngInit1/Get Error Status |
Name contains incorrect characters. | ..../EotLrng/EotLrngInit1/Get Error Status1 |
Name contains incorrect characters. | ..../ChkEotSigForNtc/EotSigAvl/Update NVM |
Identify signal labels that are not correct for C variable names.
See Also
Error type | Signal |
Name contains incorrect characters. | SF011A_EotLrng/EotLrng/EotLrngPer1/SRLNotEna/LrnEotLim/LrgnEotCmplSts/EotCcwElpdTmr |
Name contains incorrect characters. | SF011A_EotLrng/EotLrng/EotLrngPer1/SRLNotEna/LrnEotLim/LrgnEotCmplSts/EotCwElpdTmr |
Name contains incorrect characters. | SF011A_EotLrng/EotLrng/EotLrngPer1/SRLNotEna/LrnEotLim/LrgnEotCmplSts/EotCwElpdTmr |
Identify block names that use characters that are not correct in C code.
See Also
Error type | Block |
Name contains incorrect characters. | ..../Function-Call Generator |
Name contains incorrect characters. | ..../call_EotLrngPer1/Function-Call Generator |
Identify levels in the model that include basic blocks and subsystems. Each level of a model must be designed with blocks of the same level (for example, only subsystems or only basic blocks).
See Also
Identify nonstandard display attributes in Simulink diagrams.
See Also
Check format settings
Identify incorrect model-level format options.
Warning
The following format display options are incorrect.
Display Attribute | Recommended Value | Actual Value |
Display > Signals & Ports > Wide Nonscalar Lines | on | off |
View > Model Browser Options > Model Browser | off | on |
Display > Library Links > All | none | disabled |
Check block colors
Identify blocks using nonstandard colors.
Warning
The following blocks use nonstandard colors:
Check canvas colors
Identify canvases that are not white.
Passed
All diagrams use a white canvas.
_________________________________________________________________________________________
Check diagram zoom
Identify diagrams that do not have zoom factor set to 100 %.
Warning
The following diagrams do not have zoom factor set to 100 percent:
Identify whether to display block names.
See Also
Check for blocks with hidden names and obvious function
Identify block names that are displayed but can be hidden due to obvious behavior.
Passed
All blocks with obvious behavior have hidden names.
_________________________________________________________________________________________
Check for non-descriptive displayed block names
Identify block names that are displayed but should be hidden due to a lack of a descriptive name.
Warning
The following blocks have a name displayed, however, the name is not descriptive:
Check for missing block names
Identify block names that are hidden but should be displayed to show a descriptive name.
Warning
The following blocks have descriptive names, however, the names are hidden:
Identify Trigger and Enable blocks that are not centered in the upper third of the model diagram.
See Also
Identify blocks that use and fail to display nondefault values.
See Also
Block | Parameter | Expected Value | Actual Value |
..../OverTrvlDiagc/RstHwAgOverTrvlSwtVari/ | LockScale | off | on |
..../LrnEotLim/LrgnEotCmplSts/Calibration | VectorParams1D | on | off |
Identify blocks that require labeled signals. A subset of source and destination blocks require labeled signals.
See Also
Check source block labels
The following source blocks require labeled signals; Inport, From, Data Store Read, Constant, Bus Selector, Demux, Selector. If the signal name is visible on the block, this rule is considered met.
Warning
The following signals have no label:
Check destination block labels
The following destination blocks require labeled signals; Outport, Goto, Data Store Write, Bus Creator, Mux, Subsystem, Chart. If the signal name is visible on the source block, this rule is considered met.
Warning
The following signals have no label:
Identify blocks that are not allowed in discrete controllers. Prohibited blocks include all continuous blocks and some source and sink blocks.
See Also
Identify blocks not supported by code generation or not recommended for C/C++ production code deployment.
Warning
The following blocks are not supported or not recommended for C/C++ production code deployment:
Block | Block Type | Code generation support | Recommendation for C/C++ production code deployment |
SF011A_EotLrng/Clock | Clock | Yes | No |
SF011A_EotLrng/Step | Step | Yes | No |
SF011A_EotLrng/Step1 | Step | Yes | No |
Identify transitions in Stateflow flowcharts that are drawn incorrectly.
See Also
Check for conditions drawn vertically
Condition expressions should be drawn on the horizontal segments of flowcharts.
Warning
The following transitions have condition expressions that are not horizontal:
Check for action transitions drawn vertically
Transition actions should be drawn on the vertical segments of flowcharts.
Warning
The following transitions have action expressions that are not vertical:
Check for junctions for default transitions
All Junctions in a flow chart should have a default exit transition.
Warning
The following Junctions do not have a default exit transition:
Check for transitions that combine condition and action
Flowcharts should not combine condition evaluations and action expressions in a single transition.
Warning
The following transition have a mixture of condition and assignment actions:
This model contains the following C-MEX S-functions:
ID | S-Function | Block |
1 | C:\Users\nz2988\Documents\MATLAB\Nexteer Library\Nexteer_Utilities v4.10.0\Libraries\EA4_Library\Math\Abslt_f32_f32.mexw64 | SF011A_EotLrng/EotLrng/EotLrngPer1/HwAgCwAndCcwMax/HwAgCwAndCcw/OverTrvlDiagc/Abslt_f32_f32 |
SF011A_EotLrng/EotLrng/EotLrngPer1/SRLEna/ChkEotSigForNtc/EotSigAvl/Abslt_f32_f1 | ||
... | ||
2 | C:\Users\nz2988\Documents\MATLAB\Nexteer Library\Nexteer_Utilities v4.10.0\Libraries\EA4_Library\Math\Max_f32.mexw64 | SF011A_EotLrng/EotLrng/EotLrngPer1/SRLNotEna/LrnEotLim/LrngEotLim/CmpLim/Max_f1 |
SF011A_EotLrng/EotLrng/EotLrngPer1/SRLNotEna/LrnEotLim/LrngEotLim/CmpLim/Max_f2 | ||
... | ||
3 | C:\Users\nz2988\Documents\MATLAB\Nexteer Library\Nexteer_Utilities v4.10.0\Libraries\EA4_Library\Math\Min_f32.mexw64 | SF011A_EotLrng/EotLrng/EotLrngPer1/SRLNotEna/LrnEotLim/LrngEotLim/CmpLim/Min_f1 |
SF011A_EotLrng/EotLrng/EotLrngPer1/SRLNotEna/LrnEotLim/LrngEotLim/CmpLim/Min_f2 | ||
... |
Consider setting Solver data inconsistency [?] to either error
or warning
(currently set to none
) to validate whether S-functions adhere to the ODE solver consistency rules that Simulink applies to its built-in blocks.
Consider setting ArrayBounds exceeded [?]to either error
or warning
(currently set to none
) to check if S-functions are writing outside array boundaries.
Note: These runtime diagnostics may slow down simulation considerably. You should set them back to none
once you have verified that they do not cause any warnings or errors during simulation.
SF011A_EotLrng/Data Store Memory
SF011A_EotLrng/Data Store Memory1
SF011A_EotLrng/Data Store Memory12
SF011A_EotLrng/Data Store Memory14
SF011A_EotLrng/Data Store Memory17
SF011A_EotLrng/Data Store Memory18
SF011A_EotLrng/Data Store Memory19
SF011A_EotLrng/Data Store Memory2
SF011A_EotLrng/Data Store Memory20
SF011A_EotLrng/Data Store Memory4
SF011A_EotLrng/EotLrng/Data Store Memory
SF011A_EotLrng/EotLrng/Data Store Memory1
SF011A_EotLrng/EotLrng/Data Store Memory2
SF011A_EotLrng/EotLrng/Data Store Memory3
SF011A_EotLrng/EotLrng/Data Store Memory4
SF011A_EotLrng/EotLrng/Data Store Memory5
SF011A_EotLrng/Data Store Memory
SF011A_EotLrng/Data Store Memory1
SF011A_EotLrng/Data Store Memory12
SF011A_EotLrng/Data Store Memory14
SF011A_EotLrng/Data Store Memory17
SF011A_EotLrng/Data Store Memory18
SF011A_EotLrng/Data Store Memory19
SF011A_EotLrng/Data Store Memory2
SF011A_EotLrng/Data Store Memory20
SF011A_EotLrng/Data Store Memory4
SF011A_EotLrng/EotLrng/Data Store Memory
SF011A_EotLrng/EotLrng/Data Store Memory1
SF011A_EotLrng/EotLrng/Data Store Memory2
SF011A_EotLrng/EotLrng/Data Store Memory3
SF011A_EotLrng/EotLrng/Data Store Memory4
SF011A_EotLrng/EotLrng/Data Store Memory5
SF011A_EotLrng/Data Store Memory
SF011A_EotLrng/Data Store Memory1
SF011A_EotLrng/Data Store Memory12
SF011A_EotLrng/Data Store Memory14
SF011A_EotLrng/Data Store Memory17
SF011A_EotLrng/Data Store Memory18
SF011A_EotLrng/Data Store Memory19
SF011A_EotLrng/Data Store Memory2
SF011A_EotLrng/Data Store Memory20
SF011A_EotLrng/Data Store Memory4
SF011A_EotLrng/EotLrng/Data Store Memory
SF011A_EotLrng/EotLrng/Data Store Memory1
SF011A_EotLrng/EotLrng/Data Store Memory2
SF011A_EotLrng/EotLrng/Data Store Memory3
SF011A_EotLrng/EotLrng/Data Store Memory4
SF011A_EotLrng/EotLrng/Data Store Memory5
Note: These runtime diagnostics may slow down simulation considerably. You should set them back to Disable all
once you have verified that they do not cause any warnings or errors during simulation.