1 - EA4 NTC 0x0A7 Handwheel Angle Over Travel

Slide 1

NTC Overview
NTC 0x0A7.0

Description:

    This diagnostic is in place to set fault when Handwheel Angle exceeds specific calibratable value (named EotLrngHwAgOverTrvlEntr) and gets back to another calibratable value (named EotLrngHwAgOverTrvlExit) for calibratable number of times (EotLrngHwAgOverTrvlCnt).

Diagnostic Overview:

 The diagnostic compares the Handwheel Angle with the Clockwise and Counterclockwise  calibratable values. When exceeding Enter value is detected and switch boolean variable is set to FALSE, the counter is incremented by 1. The counter can be incremented again only when the value of Handwheel Angle becomes lesser than the calibratable value. When counter exceeds calibratable count value, the fault is set.

Typical Fault Response:  

 -   Response for this diagnostic is F3

Probable Sources
(Most to Least Probable):

      • Wrong C-factor cal set 

      • Connection to probe housing assembly (no connection) 

      • Sensor fault 

      • Probe housing assembly  interface circuit failure 

      • Software Rack Limiter failure 

 

Initialization

 

Periodic

X

Event

 

Date

Revision

Initials

13Jun2016

Initial Release

SS

   
   
   
   
   
   
   
   
   

Description of Unusual Event setting NTC

Root Cause / Explanation

  
  
  

Date

FDD & Rev

Modifications to Diagnostic Function

13Jun2016

SF011A 2.1.0

Initial version

21Nov2016

SF011A 3.0.0

New logic of triggering added

   
   

Algorithm Changes / Lessons Learned / Revision Log

2 - EA4 NTC 0x0E1 Rack End of Travel Storage Fault

Slide 1

NTC Overview
NTC 0x0E1.0

Description:

When Software Rack Limiter (SRL) is enabled, SF011A receives Handwheel Angle End of

travel Clockwise and Counter Clockwise signals (Signal 0 and Signal 1) and its availability

status from CM650 and CM660.

The NTC will be set in SF011A when Cw and Ccw Eot signals are not available or if signals do

not correlate or if signals are out of range.

Diagnostic Overview:

 The NTC 0x0E1 will be set when any one of the following conditions occur:

  1. 1..When Eot Cw and Ccw signals (Signal 0 an Signal 1) are not available for 500 msec, Signal Available Fault ( Bit 0 of NTC 0X0E1) is set and NTC is set to “FAILED”.   

  1. 2..When Eot Cw and Ccw signals are available but either of Cw or Ccw signals do not correlate each other then Correlation Fault ( Bit 1 of NTC 0X0E1) is set and NTC is set to “FAILED” instantaneously. 

  1. 3..When Eot Cw and Ccw signals are available but either of Cw or Ccw Eot signal is out of range then Out of Range Fault ( Bit 2 of NTC 0x0E1) is  set and NTC is set to “FAILED” instantaneously. 

  1. 4..NTC 0x0E1 is set to PASS when Cw and Ccw Eot are both available, within range and correlate each other. 

Typical Fault Response:  

 -   Response for this diagnostic is F3

Probable Sources
(Most to Least Probable):

      • Wrong C-factor cal set 

      • Connection to control module (no connection) 

      • Sensor fault 

      • Control module interface circuit failure 

 

Initialization

 

Periodic

X

Event

 

Date

Revision

Initials

18may2016

Initial Release

Sudeep Shankar

   
   
   
   
   
   
   
   
   

Description of Unusual Event setting NTC

Root Cause / Explanation

  
  
  

Date

FDD & Rev

Modifications to Diagnostic Function

18May2016

SF011A 2.0.0

Initial version

   
   
   

Algorithm Changes / Lessons Learned / Revision Log

3 - SF011A_EotLrng_Design_PeerReviewChkList

Nexteer_Template_V1.0

Overview

Project Info
Process
Safety
Software
Apps
SME
Master
Template Change Log


Sheet 1: Project Info

Peer Review Checklist - Component DesignTemplate Version: 3.0.0
Product NameElectric Power SteeringReview Scope
Component IDSF011A_EotLrngNames of two server arguments has been changed because of wrong abbreviation. Not other functional change.
Component Long NameEOT Learning
Component OwnerKevin Derry
Version that you started from. NOT the version you hope to release. If this will be v1.0.0, enter NA. Starting Baseline3.0.0
The number that will be used when package is baselined in Synergy. For example, the first one will be 1.0.0. Intended Baseline3.1.0
Electrical ArchitectureEA4
CR Number8701
Autor: The person who edited the design. Usually the Resolver of a CR. AuthorPatryk Kołacki
Review TypeInspection



Author's Quality Statement:Author must provide an explanation of any deviation from an ideal Instpection process. This field may be used for analysis of anomalies. The names of two server arguments has been changed, both in model and Data Dictionary. Corrected version has been reviewed by the team.




Meeting DateAttendeesExamples: Initial Mtg, Follow-up. Reason for Meeting
12/01/2016Fei Yuan, Patryk Kolacki, Ravi Shetty










Sheet 2: Process

Peer Review Checklist - Component Design
Template Version:3.0.0






















YesClosedFR











NoRejectedFDD

Process Reviewer:







NAOpenModel

(optional) Reviewer #2:









FMEA












*.m File















Cal Process
































Item No.Cross Ref.Description of CheckAutor: This column is for Self review. Author shall fill Yes/No/NA against each point in checklist. AuthorAutor: This column is for reviewer. Reviewer shall fill Yes/No/NA against each point in checklist. ReviewerAutor: Detailed Description of the finding shall be provided by the reviewer. Description of finding by reviewerCorrective Action: What action is taken to fix the issue? Corrective ActionAutor: Data in this column shall be filled by reviewer after checking whether the rework is completed. Status







1
Section 1: Data Dictionary














Are the following values correct for Runnables: .Context














Are the following values correct for Runnables: .TimeStep














Are the following values correct for SrvRunnables: .Return














Are the following values correct for SrvRunnables: .Arguments














Are the following values correct for all Ip/Op/IrvSignals: .EngDT














Are the following values correct for all Ip/Op/IrvSignals: .DocUnit














Are the following values correct for all Ip/Op/IrvSignals: .EngInit














Are the following values correct for all Ip/Op/IrvSignals: .EngMin














Are the following values correct for all Ip/Op/IrvSignals: .EngMax














Are the following values correct for all Ip/Op/IrvSignals: .ReadIn/WrittenIn














Are the following values correct for all Ip/Op/IrvSignals: .ReadType/WriteType














Are the following values correct for all Calibrations: .DocUnit














Are the following values correct for all Calibrations: .PortName














Are the following values correct for all NVM: .DocUnit














Are the following values correct for all PIM: .DocUnit














Are the following values correct for all Constants: .DocUnit














Does FDD Long Name, Short Name, and Description match requirements?














Do output signal ranges match requirements?














Are all clients from model defined in dictionary?














Do client definitions match their corresponding server runnable?














Is NVM defined in the appropriate number of blocks (separate for EOL vs saved at power-off)?














Is NVM with multiple values defined as a structure?














Are NVM structure members arranged largest-to-smallest datatype?














Are local Constants unique from global constants available in xx999A dictionaries?














Are calibration tables named correctly (e.g. AssiX and AssiY)?














Are Constant names abbreviated properly (ALLCAPS are not checkable by tools)?














Is the Data Dictionary Verification report error free?














Are all data types represented by released Data_Management classes?




























































































































































































2
Section 2: ModelAutor: This column is for Self review. Author shall fill Yes/No/NA against each point in checklist. AuthorAutor: This column is for reviewer. Reviewer shall fill Yes/No/NA against each point in checklist. ReviewerAutor: Detailed Description of the finding shall be provided by the reviewer. Description of finding by reviewerCorrective Action: What action is taken to fix the issue? Corrective ActionAutor: Data in this column shall be filled by reviewer after checking whether the rework is completed. Status









Are all the Memory Store blocks for PIM and Display Variables located on the 2nd level of model?














Is each diagnostic (NTC) capable of being set to "PASS"?














Does non-zero intialization of PIM occur in the function's Init runnable?














Does design properly include Set Ram Block Status when NVM RAM values change?














Are NTCs set only outside an IRQ (not related to the typical periodic OS)?














Are NTCs set and read only at periodic steps no less than 2 ms?














Does model execute without errors/warnings after loading NxtrMBDConfig configuration set?














Is filename of model in correct format?














Is Top level of model annotated with Requirements Baseline?














Is the Top level of the model annotated with Tool Dependencies?














Is Top level of model annotated with Change Log or History?














Is the 2nd level of model free from subsystems that are not Function-Call Subsystems?














Is the 2nd level of model free from arithmetic and logic operations?














Are the Runnable trigger signals named as "call_<Runnable>"?














Does 2nd level of model have a properly updated annotation with name, description, and intended baseline number?














Are all data flow layers free of Function-Call Subsystems and Memory Store blocks?














Does the Model have the confidentiality and copyright information inside all its Subsystems?














Are all requirements links of the format <FDDNumber>_<ObjectID>?














Does requirements HTML report reference only the DOORS module of this component for all links in the design?














Was Model Advisor run with the correct configuration settings?














Is the Model Advisor rerport free from "Fails".














Does the model execute?














If model has ADC input, is failure boolean input and appropriate fault response been included?














Do cal ranges & logic ensure no incompatible values for their datatype?














Are "magic numbers" acceptable?














Do IF..ELSEIF blocks also contain an ELSE condition?














Do SWITCH CASE blocks also contain a DEFAULT condtion?












3
Are ELSE and DEFAULT branching conditions reachable when dependent on internal variables?Autor: This column is for Self review. Author shall fill Yes/No/NA against each point in checklist. AuthorAutor: This column is for reviewer. Reviewer shall fill Yes/No/NA against each point in checklist. ReviewerAutor: Detailed Description of the finding shall be provided by the reviewer. Description of finding by reviewerCorrective Action: What action is taken to fix the issue? Corrective ActionAutor: Data in this column shall be filled by reviewer after checking whether the rework is completed. Status









Does review meet 'inspection' criteria?














Does Design folder contain only the model, data dictionary, and (optionally) a simulation setup script?














Does Doc folder contain a zipped HTML webview model?














Was webview model created without requirements highlighted?














Does Doc folder contain appropriate number of NTC Summary sheets?














Does Reports folder contain only the data dictionary verification report, Model Advisor report, and zipped requirements traceability report?




























































4
Section 4: Other Issus/Actions IdentifiedDocumentReferenceSummary of resolutionCorrective Action: What action is taken to fix the issue? Corrective ActionAutor: Data in this column shall be filled by reviewer after checking whether the rework is completed. Status







4.1














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Sheet 3: Safety

Peer Review Checklist - Component Design
Template Version:3.0.0






















YesClosedFR











NoRejectedFDD

Safety Reviewer:







NAOpenModel

(optional) Reviewer #2:









FMEA












*.m File















Cal Process
































Item No.Cross Ref.Description of CheckAutor: This column is for Self review. Author shall fill Yes/No/NA against each point in checklist. AuthorAutor: This column is for reviewer. Reviewer shall fill Yes/No/NA against each point in checklist. ReviewerAutor: Detailed Description of the finding shall be provided by the reviewer. Description of finding by reviewerCorrective Action: What action is taken to fix the issue? Corrective ActionAutor: Data in this column shall be filled by reviewer after checking whether the rework is completed. Status







1
Section 1: Data Dictionary














Are the following values correct for all Calibrations: .Impact














Are the following values correct for all Calibrations: .TuningOwner














Are the following values correct for all Calibrations: .Online














Does the FDD .DesignASIL property match requirements?














Are lookup tables using compatible table dimensions?












































































































































































































































































































































































































































































































































































2
Section 2: ModelAutor: This column is for Self review. Author shall fill Yes/No/NA against each point in checklist. AuthorAutor: This column is for reviewer. Reviewer shall fill Yes/No/NA against each point in checklist. ReviewerAutor: Detailed Description of the finding shall be provided by the reviewer. Description of finding by reviewerCorrective Action: What action is taken to fix the issue? Corrective ActionAutor: Data in this column shall be filled by reviewer after checking whether the rework is completed. Status









Are Model Advisor report ISO26262 warnings acceptable?














Is model free from dynamic array size allocation?














Is model free from data type conversion blocks that do not explicitly state desired data type?














Does model refrain from using Display Variable values in downstream operations?














Are all GOTO/FROM blocks restricted in scope to their own subystem level?














If model has ADC input, is failure boolean input and appropriate fault response been included?














Does design include output limiting blocks?














Do cal ranges & logic ensure freedom from divide-by-zero?














Are the following values correct for all NTC: .NtcTyp














Does model include appropriate logic for dealing with missing or corrupted NVM data?




























































































































































































































































































3
Section 3: Delivery PackageAutor: This column is for Self review. Author shall fill Yes/No/NA against each point in checklist. AuthorAutor: This column is for reviewer. Reviewer shall fill Yes/No/NA against each point in checklist. ReviewerAutor: Detailed Description of the finding shall be provided by the reviewer. Description of finding by reviewerCorrective Action: What action is taken to fix the issue? Corrective ActionAutor: Data in this column shall be filled by reviewer after checking whether the rework is completed. Status









Does review meet 'inspection' criteria?












































































































































4
Section 4: Other Issus/Actions IdentifiedDocumentReferenceSummary of resolutionCorrective Action: What action is taken to fix the issue? Corrective ActionAutor: Data in this column shall be filled by reviewer after checking whether the rework is completed. Status







4.1














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Sheet 4: Software

Peer Review Checklist - Component Design
Template Version:3.0.0






















YesClosedFR











NoRejectedFDD

Software Reviewer:







NAOpenModel

(optional) Reviewer #2:









FMEA












*.m File















Cal Process
































Item No.Cross Ref.Description of CheckAutor: This column is for Self review. Author shall fill Yes/No/NA against each point in checklist. AuthorAutor: This column is for reviewer. Reviewer shall fill Yes/No/NA against each point in checklist. ReviewerAutor: Detailed Description of the finding shall be provided by the reviewer. Description of finding by reviewerCorrective Action: What action is taken to fix the issue? Corrective ActionAutor: Data in this column shall be filled by reviewer after checking whether the rework is completed. Status







1
Section 1: Data Dictionary














Are the following values correct for Runnables: .Context














Are the following values correct for SrvRunnables: .Return














Are the following values correct for SrvRunnables: .Arguments














Are the following values correct for all Calibrations: .PortName














Are the following values correct for all NVM: .EngInit














Are the following values correct for all NVM: .Alias














Are the following values correct for all NVM: .InitRowCol














Are the following values correct for all Display Variables: .EngMin














Are the following values correct for all Display Variables: .EngMax














Are the following values correct for all Display Variables: .InitRowCol














Are the following values correct for all PIM: .EngMin














Are the following values correct for all PIM: .EngMax














Are the following values correct for all PIM: .InitRowCol














Are lookup tables using compatible table dimensions?














Are all clients from model defined in dictionary?














Do client definitions match their corresponding server runnable?














Is NVM defined in the appropriate number of blocks (separate for EOL vs saved at power-off)?














Is NVM with multiple values defined as a structure?














Are NVM structure members arranged largest-to-smallest datatype?














Are local Constants unique from global constants available in xx999A dictionaries?






























































































































































































































































































































Section 2: ModelAutor: This column is for Self review. Author shall fill Yes/No/NA against each point in checklist.
Autor: This column is for reviewer. Reviewer shall fill Yes/No/NA against each point in checklist.
Autor: Detailed Description of the finding shall be provided by the reviewer.
Corrective Action: What action is taken to fix the issue?
Autor: Data in this column shall be filled by reviewer after checking whether the rework is completed.










Are all the Memory Store blocks for PIM and Display Variables located on the 2nd level of model?














Is each diagnostic (NTC) capable of being set to "PASS"?














Does non-zero intialization of PIM occur in the function's Init runnable?














Does design properly include Set Ram Block Status when NVM RAM values change?














Are NTCs set only outside an IRQ (not related to the typical periodic OS)?














Are NTCs set and read only at periodic steps no less than 2 ms?














Is model free from dynamic array size allocation?














Is model free from data type conversion blocks that do not explicitly state desired data type?














Does model refrain from using Display Variable values in downstream operations?














Are all GOTO/FROM blocks restricted in scope to their own subystem level?














Does design calculate PIM values only within their defined range?














Does design include output limiting blocks?














Do cal ranges & logic ensure freedom from divide-by-zero?














Do cal ranges & logic ensure no incompatible values for their datatype?














Are Model Advisor report MISRA warnings acceptable?














Is design free of unreachable logic?














Do state machines provide exits of all non-latch states?














Is design free from recursive logic that could cause indefinate waits?














Does design maintain data size consistency?














Are "magic numbers" acceptable?














Is design of a managable size and easy to understand?














Is Stateflow used only for state machines not easily represented in Simulink?














Is model free from over-nested IF logic or redundant IF..ELSEIF..ELSEIF.. Conditions?














Is model free from arithmetic operations on Boolean values?




























































































































































































































3
Section 3: Delivery PackageAutor: This column is for Self review. Author shall fill Yes/No/NA against each point in checklist. AuthorAutor: This column is for reviewer. Reviewer shall fill Yes/No/NA against each point in checklist. ReviewerAutor: Detailed Description of the finding shall be provided by the reviewer. Description of finding by reviewerCorrective Action: What action is taken to fix the issue? Corrective ActionAutor: Data in this column shall be filled by reviewer after checking whether the rework is completed. Status























































































































































4

DocumentReferenceSummary of resolutionCorrective Action: What action is taken to fix the issue? Corrective ActionAutor: Data in this column shall be filled by reviewer after checking whether the rework is completed. Status







4.1














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Sheet 5: Apps

Peer Review Checklist - Component Design
Template Version:3.0.0






















YesClosedFR











NoRejectedFDD

Applications Reviewer:







NAOpenModel

(optional) Reviewer #2:









FMEA












*.m File















Cal Process
































Item No.Cross Ref.Description of CheckAutor: This column is for Self review. Author shall fill Yes/No/NA against each point in checklist. AuthorAutor: This column is for reviewer. Reviewer shall fill Yes/No/NA against each point in checklist. ReviewerAutor: Detailed Description of the finding shall be provided by the reviewer. Description of finding by reviewerCorrective Action: What action is taken to fix the issue? Corrective ActionAutor: Data in this column shall be filled by reviewer after checking whether the rework is completed. Status







1
Section 1: Data Dictionary














Are the following values correct for Runnables: .TimeStep














Are the following values correct for all Calibrations: .DocUnit














Are the following values correct for all Calibrations: .EngMax














Are the following values correct for all Calibrations: .Cardinality














Are the following values correct for all Calibrations: .CustomerVisible














Are the following values correct for all Calibrations: .Impact














Are the following values correct for all Calibrations: .GraphLink














Are the following values correct for all Calibrations: .Monotony














Are the following values correct for all NVM: .DocUnit














Are the following values correct for all Display Variables: .DocUnit














Are the following values correct for all Calibrations: .EngVal














Are the following values correct for all Calibrations: .EngMin














Are the following values correct for all Calibrations: .TuningOwner














Are the following values correct for all Calibrations: .Online














Does FDD Long Name, Short Name, and Description match requirements?














Do output signal ranges match requirements?














Do signal and parameter names accurately describe their purpose?














Do all .Description properties provide useful information?














Are calibration tables named correctly (e.g. AssiX and AssiY)?












































































































































































































































































































































2
Section 2: ModelAutor: This column is for Self review. Author shall fill Yes/No/NA against each point in checklist. AuthorAutor: This column is for reviewer. Reviewer shall fill Yes/No/NA against each point in checklist. ReviewerAutor: Detailed Description of the finding shall be provided by the reviewer. Description of finding by reviewerCorrective Action: What action is taken to fix the issue? Corrective ActionAutor: Data in this column shall be filled by reviewer after checking whether the rework is completed. Status









Does model execute without errors/warnings after loading NxtrMBDConfig configuration set?














Does model include adequate annotation throughout?














Are the following values correct for all NTC: .NtcTyp














Are display variables appropriately placed?














Does design provide appropriate tuning flexibility?














Are blocks linked to the correct requirements? (watch for problems due to copy/pasted blocks)














Is the list of unlinked blocks acceptable?














Does design account for all requirements?














Is design of a managable size and easy to understand?














Is design easily disabled via calibration?














Does design either work with global signal units or contain necessary unit-conversion logic?












































































































































































































































































3
Section 3: Delivery PackageAutor: This column is for Self review. Author shall fill Yes/No/NA against each point in checklist. AuthorAutor: This column is for reviewer. Reviewer shall fill Yes/No/NA against each point in checklist. ReviewerAutor: Detailed Description of the finding shall be provided by the reviewer. Description of finding by reviewerCorrective Action: What action is taken to fix the issue? Corrective ActionAutor: Data in this column shall be filled by reviewer after checking whether the rework is completed. Status









Does NTC Summary sheet adequately describe NTC usage?












































































































































4
Section 4: Other Issus/Actions IdentifiedDocumentReferenceSummary of resolutionCorrective Action: What action is taken to fix the issue? Corrective ActionAutor: Data in this column shall be filled by reviewer after checking whether the rework is completed. Status







4.1














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Sheet 6: SME

Peer Review Checklist - Component Design
Template Version:3.0.0






















YesClosedFR











NoRejectedFDD

SME Reviewer:







NAOpenModel

(optional) Reviewer #2:









FMEA












*.m File















Cal Process
































Item No.Cross Ref.Description of CheckAutor: This column is for Self review. Author shall fill Yes/No/NA against each point in checklist. AuthorAutor: This column is for reviewer. Reviewer shall fill Yes/No/NA against each point in checklist. ReviewerAutor: Detailed Description of the finding shall be provided by the reviewer. Description of finding by reviewerCorrective Action: What action is taken to fix the issue? Corrective ActionAutor: Data in this column shall be filled by reviewer after checking whether the rework is completed. Status







1
Section 1: Data Dictionary














Are the following values correct for all Calibrations: .EngDT














Are the following values correct for all NVM: .EngDT














Are the following values correct for all Display Variables: .EngDT














Are the following values correct for all PIM: .EngDT














Are the following values correct for all Constants: .EngDT














Has Static Register evaluation has been completed and updated for any register data that is written to?




























































































































































































































































































































































































































































































































































2
Section 2: ModelAutor: This column is for Self review. Author shall fill Yes/No/NA against each point in checklist. AuthorAutor: This column is for reviewer. Reviewer shall fill Yes/No/NA against each point in checklist. ReviewerAutor: Detailed Description of the finding shall be provided by the reviewer. Description of finding by reviewerCorrective Action: What action is taken to fix the issue? Corrective ActionAutor: Data in this column shall be filled by reviewer after checking whether the rework is completed. Status









Does model include appropriate logic for dealing with missing or corrupted NVM data?














Does design either work with global signal units or contain necessary unit-conversion logic?














Does the design prevent Integrator drifting?














Does design make proper use of limiters to prevent integrator windup and runaway values?














Are all IIR filters free of potential instability over their defined calibration ranges?












































































































































































































































































































































































3

Autor: This column is for Self review. Author shall fill Yes/No/NA against each point in checklist. AuthorAutor: This column is for reviewer. Reviewer shall fill Yes/No/NA against each point in checklist. ReviewerAutor: Detailed Description of the finding shall be provided by the reviewer. Description of finding by reviewerCorrective Action: What action is taken to fix the issue? Corrective ActionAutor: Data in this column shall be filled by reviewer after checking whether the rework is completed. Status









Has author performed basic simulations to screen for problems?












































































































































4

DocumentReferenceSummary of resolutionCorrective Action: What action is taken to fix the issue? Corrective ActionAutor: Data in this column shall be filled by reviewer after checking whether the rework is completed. Status







4.1














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Sheet 7: Master

This is the master list of questions.


ADVANCED FILTER CRITERIA

A macro is used to filter and populate separate spreadsheets for each engineering discipline.

ArtifactDomain1Domain2















NumberArtifactChecklist ItemDomain1Domain2



1dictIs Filename of Data Dictionary in correct format?Processnone



2dictIs the FDD.Version property correctly updated?Processnone



3dictAre the following values correct for Runnables: .ContextProcessSoftwareShould be Architect


4dictAre the following values correct for Runnables: .TimeStepProcessAppsShould be Architect


5dictAre the following values correct for SrvRunnables: .ReturnProcessSoftwareShould be Architect


6dictAre the following values correct for SrvRunnables: .ArgumentsProcessSoftwareShould be Architect


7dictAre the following values correct for all Ip/Op/IrvSignals: .EngDTProcessnoneShould be Architect


8dictAre the following values correct for all Ip/Op/IrvSignals: .DocUnitProcessnoneShould be Architect


9dictAre the following values correct for all Ip/Op/IrvSignals: .EngInitProcessnoneShould be Architect


10dictAre the following values correct for all Ip/Op/IrvSignals: .EngMinProcessnoneShould be Architect


11dictAre the following values correct for all Ip/Op/IrvSignals: .EngMaxProcessnoneShould be Architect


12dictAre the following values correct for all Ip/Op/IrvSignals: .ReadIn/WrittenInProcessnone



13dictAre the following values correct for all Ip/Op/IrvSignals: .ReadType/WriteTypeProcessnone



14dictAre the following values correct for all Calibrations: .EngDTSMEnone



15dictAre the following values correct for all Calibrations: .DocUnitAppsProcess



16dictAre the following values correct for all Calibrations: .EngMaxAppsnone



17dictAre the following values correct for all Calibrations: .CardinalityAppsnone



18dictAre the following values correct for all Calibrations: .CustomerVisibleAppsnone



19dictAre the following values correct for all Calibrations: .ImpactAppsSafety



20dictAre the following values correct for all Calibrations: .GraphLinkAppsnone



21dictAre the following values correct for all Calibrations: .MonotonyAppsnone



22dictAre the following values correct for all Calibrations: .PortNameSoftwareProcess



23dictAre the following values correct for all NVM: .EngDTSMEnone



24dictAre the following values correct for all NVM: .DocUnitProcessApps



25dictAre the following values correct for all NVM: .EngInitSoftwarenone



26dictAre the following values correct for all NVM: .AliasSoftwarenone



27dictAre the following values correct for all NVM: .InitRowColSoftwarenone



28dictAre the following values correct for all Display Variables: .EngDTSMEnone



29dictAre the following values correct for all Display Variables: .DocUnitAppsnone



30dictAre the following values correct for all Display Variables: .EngMinSoftwarenone



31dictAre the following values correct for all Display Variables: .EngMaxSoftwarenone



32dictAre the following values correct for all Display Variables: .InitRowColSoftwarenone



33dictAre the following values correct for all PIM: .EngDTSMEnone



34dictAre the following values correct for all PIM: .DocUnitProcessnone



35dictAre the following values correct for all PIM: .EngMinSoftwarenone



36dictAre the following values correct for all PIM: .EngMaxSoftwarenone



37dictAre the following values correct for all PIM: .InitRowColSoftwarenone



38dictAre the following values correct for all Constants: .EngDTSMEnone



39dictAre the following values correct for all Constants: .DocUnitProcessnone



40dictAre the following values correct for all Calibrations: .EngValAppsnone



41dictAre the following values correct for all Calibrations: .EngMinAppsnone



43dictAre the following values correct for all Calibrations: .TuningOwnerSafetyApps



47dictAre the following values correct for all Calibrations: .OnlineSafetyApps



44dictDoes the FDD .DesignASIL property match requirements?Safetynone



45dictDoes FDD Long Name, Short Name, and Description match requirements?AppsProcess



46dictDo output signal ranges match requirements?AppsProcess



42dictAre lookup tables using compatible table dimensions?SafetySoftware



48dictDo signal and parameter names accurately describe their purpose?Appsnone



49dictDo all .Description properties provide useful information?Appsnone



50dictHas Static Register evaluation has been completed and updated for any register data that is written to?SMEnone



51dictAre all clients from model defined in dictionary?ProcessSoftware



52dictDo client definitions match their corresponding server runnable?ProcessSoftware



53dictIs NVM defined in the appropriate number of blocks (separate for EOL vs saved at power-off)?ProcessSoftware



54dictIs NVM with multiple values defined as a structure?ProcessSoftware



55dictAre NVM structure members arranged largest-to-smallest datatype?ProcessSoftware



56dictAre local Constants unique from global constants available in xx999A dictionaries?ProcessSoftware



57dictAre calibration tables named correctly (e.g. AssiX and AssiY)?ProcessApps



58dictAre Constant names abbreviated properly (ALLCAPS are not checkable by tools)?Processnone



59dictIs the Data Dictionary Verification report error free?Processnone



60dictAre all data types represented by released Data_Management classes?Processnone



61modelAre all the Memory Store blocks for PIM and Display Variables located on the 2nd level of model?ProcessSoftware



62modelIs each diagnostic (NTC) capable of being set to "PASS"?ProcessSoftware



63modelDoes non-zero intialization of PIM occur in the function's Init runnable?ProcessSoftware



64modelDoes design properly include Set Ram Block Status when NVM RAM values change?ProcessSoftware



65modelAre NTCs set only outside an IRQ (not related to the typical periodic OS)?ProcessSoftware



66modelAre NTCs set and read only at periodic steps no less than 2 ms?ProcessSoftware



67modelDoes model execute without errors/warnings after loading NxtrMBDConfig configuration set?ProcessApps



68modelIs filename of model in correct format?Processnone



69modelIs Top level of model annotated with Requirements Baseline?Processnone



70modelIs the Top level of the model annotated with Tool Dependencies?Processnone



71modelIs Top level of model annotated with Change Log or History?Processnone



72modelIs the 2nd level of model free from subsystems that are not Function-Call Subsystems?Processnone



73modelIs the 2nd level of model free from arithmetic and logic operations?Processnone



74modelAre the Runnable trigger signals named as "call_<Runnable>"?Processnone



75modelDoes 2nd level of model have a properly updated annotation with name, description, and intended baseline number?Processnone



76modelAre all data flow layers free of Function-Call Subsystems and Memory Store blocks?Processnone



77modelDoes the Model have the confidentiality and copyright information inside all its Subsystems?Processnone



78modelAre all requirements links of the format <FDDNumber>_<ObjectID>?Processnone



79modelDoes requirements HTML report reference only the DOORS module of this component for all links in the design?Processnone



80modelWas Model Advisor run with the correct configuration settings?Processnone



81modelIs the Model Advisor rerport free from "Fails".Processnone



82modelDoes the model execute?Processnone



83modelAre Model Advisor report ISO26262 warnings acceptable?Safetynone



84modelIs model free from dynamic array size allocation?SafetySoftware



85modelDoes model include adequate annotation throughout?Appsnone



86modelIs model free from data type conversion blocks that do not explicitly state desired data type?SafetySoftware



87modelDoes model refrain from using Display Variable values in downstream operations?SafetySoftware



88modelAre all GOTO/FROM blocks restricted in scope to their own subystem level?SafetySoftware



89modelIf model has ADC input, is failure boolean input and appropriate fault response been included?SafetyProcess



90modelDoes design calculate PIM values only within their defined range?Softwarenone



91modelDoes design include output limiting blocks?SoftwareSafety



92modelDo cal ranges & logic ensure freedom from divide-by-zero?SoftwareSafety



93modelDo cal ranges & logic ensure no incompatible values for their datatype?SoftwareProcess



94modelAre Model Advisor report MISRA warnings acceptable?Softwarenone



95modelIs design free of unreachable logic?Softwarenone



96modelDo state machines provide exits of all non-latch states?Softwarenone



97modelIs design free from recursive logic that could cause indefinate waits?Softwarenone



98modelDoes design maintain data size consistency?Softwarenone



99modelAre "magic numbers" acceptable?ProcessSoftware



100modelAre the following values correct for all NTC: .NtcTypAppsSafety



101modelAre display variables appropriately placed?Appsnone



102modelDoes design provide appropriate tuning flexibility?Appsnone



103modelAre blocks linked to the correct requirements? (watch for problems due to copy/pasted blocks)Appsnone



104modelIs the list of unlinked blocks acceptable?Appsnone



105modelDoes design account for all requirements?Appsnone



106modelIs design of a managable size and easy to understand?AppsSoftware



107modelIs design easily disabled via calibration?Appsnone



108modelDoes model include appropriate logic for dealing with missing or corrupted NVM data?SMESafety



109modelDoes design either work with global signal units or contain necessary unit-conversion logic?SMEApps



110modelDoes the design prevent Integrator drifting?SMEnone



111modelDoes design make proper use of limiters to prevent integrator windup and runaway values?SMEnone



112modelAre all IIR filters free of potential instability over their defined calibration ranges?SMEnone



113modelIs Stateflow used only for state machines not easily represented in Simulink?Softwarenone



114modelDo IF..ELSEIF blocks also contain an ELSE condition?Processnone



115modelDo SWITCH CASE blocks also contain a DEFAULT condtion?Processnone



116modelAre ELSE and DEFAULT branching conditions reachable when dependent on internal variables?Processnone



117modelIs model free from over-nested IF logic or redundant IF..ELSEIF..ELSEIF.. Conditions?Softwarenone



118modelIs model free from arithmetic operations on Boolean values?Softwarenone



119modelIs model optimized to minimize redundant calculations?Processnone



120packageDoes NTC Summary sheet adequately describe NTC usage?Appsnone



121packageDoes review meet 'inspection' criteria?SafetyProcess



122packageDoes Design folder contain only the model, data dictionary, and (optionally) a simulation setup script?Processnone



123packageDoes Doc folder contain a zipped HTML webview model?Processnone



124packageWas webview model created without requirements highlighted?Processnone



125packageDoes Doc folder contain appropriate number of NTC Summary sheets?Processnone



126packageDoes Reports folder contain only the data dictionary verification report, Model Advisor report, and zipped requirements traceability report?Processnone



127packageHas author performed basic simulations to screen for problems?SMEnone




Sheet 8: Template Change Log

RevChangeAuthor
01.00.05Added lesson learned #3.5MDK
01.00.06Added lesson learned #3.6, 3.7 - Structure and writing of NVM in mfiles and models.MDK
02.00.00Combined ESG and Systems into one, compatible with Data_Management 2.13.0 of CreateDD and VerifyDD.K. Derry
02.01.00Added: Does FDD.DesignASIL match requirements?
Added: Was webview model created without requirements highlighted?
Removed: Redundant row in Data Dictionary section.
Formatting: Column C now consistently center-justified.
K. Derry
02.02.00Added: Are all data types represented by released Data_Management classes?
Removed: Are all runnables defined? Rationale: Automated tools checking.
Removed: Does the Component shortname match data dictionary FDD metadata?
Removed: "Data store name must resolve to Simulink signal object"
Edited: Model Advisor report should now be left unzipped.
K. Derry
3.0.0New concept of discipline-specific checklists.
New sheets for Project Info, Safety, Software, Apps, SME, and Master.
New VBA code to distribute master list onto appropriate discipline sheets.
Major reformatting, many line item checks added/deleted/modified.
K. Derry








































































4 - SF011A_EotLrng_ModelAdvisor_Report

Model Advisor Report for 'SF011A_EotLrng'
Model Advisor Report - SF011A_EotLrng.slx
Simulink version: 8.2Model version: 006
System: SF011A_EotLrngCurrent run: 01-Dec-2016 15:31:55
 Model Advisor configuration: ...NxtrModelAdvisorConfig.mat

Run Summary
PassFailWarningNot RunTotal
   46   0   21   292359


Model Advisor

    By Product

        Simulink

        Simulink Coder


        Embedded Coder


        Simscape


        Simulink Verification and Validation

            Modeling Standards

                DO-178C/DO-331 Checks


                IEC 61508, ISO 26262, and EN 50128 Checks


                MathWorks Automotive Advisory Board Checks


            Requirements Consistency


        Simulink Control Design


    By Task

        Code Generation Efficiency


 Check optimization settings

You should turn on the following optimization(s):

  • Block reduction
  • Remove code from floating-point to integer conversions that wraps out-of-range values
  • Inline invariant signals
  • The Simulation range checking diagnostic is enabled. Because this diagnostic can increase the time it takes to simulate your model, you should consider turning it off, by setting its value to none.
  • Use bitsets for storing state configuration (Stateflow)
  • Use bitsets for storing boolean data (Stateflow)
  • Ignore testpoints when generating code
  • Pass reusable subsystem outputs as individual arguments



  •         Frequency Response Estimation


            Managing Data Store Memory Blocks


            Managing Library Links And Variants


            Model Referencing


            Modeling Guidelines for MISRA-C:2004

            Modeling Physical Systems


            Modeling Signals and Parameters using Buses


            Modeling Single-Precision Systems


            Modeling Standards for DO-178C/DO-331


            Modeling Standards for EN 50128


            Modeling Standards for IEC 61508


            Modeling Standards for ISO 26262


     Display model metrics and complexity report

    Display number of elements and name, level, and depth of subsystems for the model or subsystem

    Model metrics information
    Display number of elements for Simulink blocks and Stateflow constructs


    Summary

    Element TypeCount
    Inport186
    Outport80
    SubSystem162
    Stateflow6


    Simulink

    Block TypeCount
    Inport186
    SubSystem162
    Constant132
    Outport80
    DataStoreWrite60
    DataStoreRead58
    DataStoreMemory41
    ActionPort39
    RelationalOperator37
    From33
    Terminator25
    S-Function23
    If28
    DataTypeConversion27
    Product22
    Logic16
    Goto15
    UnaryMinus13
    Sum13
    Merge11
    TriggerPort8
    Rounding5
    Step2
    EnablePort2
    Clock1
    ∧ Less


    Stateflow

    Stateflow constructCount
    Stateflow Transitions90
    Stateflow Junctions48
    Stateflow Data30
    Stateflow Charts6


    _________________________________________________________________________________________

    Model complexity information
    Display name, level, and depth of subsystems


    Maximum Subsystem Depth: 10

    Subsystem Depth

    Subsystem NameLevelDepth
    CopyRight211
    EotLrng19
    EotLrng/CopyRight221
    EotLrng/EotLrngInit125
    EotLrng/EotLrngInit1/CopyRight231
    EotLrng/EotLrngInit1/Enumerated Constant1331
    EotLrng/EotLrngInit1/Enumerated Constant31
    EotLrng/EotLrngInit1/Enumerated Constant131
    EotLrng/EotLrngInit1/Get Error Status31
    EotLrng/EotLrngInit1/Get Error Status131
    EotLrng/EotLrngInit1/LimOffsRange131
    EotLrng/EotLrngInit1/LimOffsRange231
    EotLrng/EotLrngInit1/NvmNotOk32
    EotLrng/EotLrngInit1/NvmNotOk/CopyRight241
    EotLrng/EotLrngInit1/NvmNotOk/Set Ram Block Status41
    EotLrng/EotLrngInit1/NvmNotVal32
    EotLrng/EotLrngInit1/NvmNotVal/CopyRight241
    EotLrng/EotLrngInit1/NvmNotVal/Set Ram Block Status41
    EotLrng/EotLrngInit1/RstEot34
    EotLrng/EotLrngInit1/RstEot/ChkRstLimReq43
    EotLrng/EotLrngInit1/RstEot/ChkRstLimReq/CopyRight251
    EotLrng/EotLrngInit1/RstEot/ChkRstLimReq/ResetLimReq52
    EotLrng/EotLrngInit1/RstEot/ChkRstLimReq/ResetLimReq/Copyright161
    EotLrng/EotLrngInit1/RstEot/Copyright141
    EotLrng/EotLrngInit1/SRLNotEna33
    EotLrng/EotLrngInit1/SRLNotEna/CopyRight241
    EotLrng/EotLrngInit1/SRLNotEna/GetRefTmr100MicroSec32bit42
    EotLrng/EotLrngInit1/SRLNotEna/GetRefTmr100MicroSec32bit/CopyRight251
    EotLrng/EotLrngInit1/SRLNotEna/Set Ram Block Status41
    EotLrng/EotLrngInit1/SetOverTrvlDiagcPass33
    EotLrng/EotLrngInit1/SetOverTrvlDiagcPass/SetNtcSts42
    EotLrng/EotLrngInit1/SetOverTrvlDiagcPass/SetNtcSts/CopyRight251
    EotLrng/EotLrngInit1/SetOverTrvlDiagcPass/SetNtcSts/ISO Fault Debounce Design51
    EotLrng/EotLrngPer128
    EotLrng/EotLrngPer1/CopyRight231
    EotLrng/EotLrngPer1/HwAgCwAndCcwMax37
    EotLrng/EotLrngPer1/HwAgCwAndCcwMax/CopyRight241
    EotLrng/EotLrngPer1/HwAgCwAndCcwMax/HwAgCwAndCcw46
    EotLrng/EotLrngPer1/HwAgCwAndCcwMax/HwAgCwAndCcw/CopyRight251
    EotLrng/EotLrngPer1/HwAgCwAndCcwMax/HwAgCwAndCcw/MaxHwAgCcwDetd52
    EotLrng/EotLrngPer1/HwAgCwAndCcwMax/HwAgCwAndCcw/MaxHwAgCcwDetd/CopyRight261
    EotLrng/EotLrngPer1/HwAgCwAndCcwMax/HwAgCwAndCcw/MaxHwAgCcwDetd/Set Ram Block Status61
    EotLrng/EotLrngPer1/HwAgCwAndCcwMax/HwAgCwAndCcw/MaxHwAgCwDetd52
    EotLrng/EotLrngPer1/HwAgCwAndCcwMax/HwAgCwAndCcw/MaxHwAgCwDetd/CopyRight261
    EotLrng/EotLrngPer1/HwAgCwAndCcwMax/HwAgCwAndCcw/MaxHwAgCwDetd/Set Ram Block Status61
    EotLrng/EotLrngPer1/HwAgCwAndCcwMax/HwAgCwAndCcw/OverTrvlDiagc55
    EotLrng/EotLrngPer1/HwAgCwAndCcwMax/HwAgCwAndCcw/OverTrvlDiagc/CntOvrTrvlAndSetNTC64
    EotLrng/EotLrngPer1/HwAgCwAndCcwMax/HwAgCwAndCcw/OverTrvlDiagc/CntOvrTrvlAndSetNTC/CopyRight271
    EotLrng/EotLrngPer1/HwAgCwAndCcwMax/HwAgCwAndCcw/OverTrvlDiagc/CntOvrTrvlAndSetNTC/Enumerated Constant1371
    EotLrng/EotLrngPer1/HwAgCwAndCcwMax/HwAgCwAndCcw/OverTrvlDiagc/CntOvrTrvlAndSetNTC/OvfChk72
    EotLrng/EotLrngPer1/HwAgCwAndCcwMax/HwAgCwAndCcw/OverTrvlDiagc/CntOvrTrvlAndSetNTC/OvfChk/CopyRight281
    EotLrng/EotLrngPer1/HwAgCwAndCcwMax/HwAgCwAndCcw/OverTrvlDiagc/CntOvrTrvlAndSetNTC/OvfChk/Set Ram Block Status81
    EotLrng/EotLrngPer1/HwAgCwAndCcwMax/HwAgCwAndCcw/OverTrvlDiagc/CntOvrTrvlAndSetNTC/SetOverTrvlDiagc73
    EotLrng/EotLrngPer1/HwAgCwAndCcwMax/HwAgCwAndCcw/OverTrvlDiagc/CntOvrTrvlAndSetNTC/SetOverTrvlDiagc/SetNtcSts82
    EotLrng/EotLrngPer1/HwAgCwAndCcwMax/HwAgCwAndCcw/OverTrvlDiagc/CntOvrTrvlAndSetNTC/SetOverTrvlDiagc/SetNtcSts/CopyRight291
    EotLrng/EotLrngPer1/HwAgCwAndCcwMax/HwAgCwAndCcw/OverTrvlDiagc/CntOvrTrvlAndSetNTC/SetOverTrvlDiagc/SetNtcSts/ISO Fault Debounce Design91
    EotLrng/EotLrngPer1/HwAgCwAndCcwMax/HwAgCwAndCcw/OverTrvlDiagc/CopyRight261
    EotLrng/EotLrngPer1/HwAgCwAndCcwMax/HwAgCwAndCcw/OverTrvlDiagc/HwAgEntrCdn62
    EotLrng/EotLrngPer1/HwAgCwAndCcwMax/HwAgCwAndCcw/OverTrvlDiagc/HwAgEntrCdn/CopyRight271
    EotLrng/EotLrngPer1/HwAgCwAndCcwMax/HwAgCwAndCcw/OverTrvlDiagc/HwAgExitCdn62
    EotLrng/EotLrngPer1/HwAgCwAndCcwMax/HwAgCwAndCcw/OverTrvlDiagc/HwAgExitCdn/CopyRight271
    EotLrng/EotLrngPer1/HwAgCwAndCcwMax/HwAgCwAndCcw/OverTrvlDiagc/Pass62
    EotLrng/EotLrngPer1/HwAgCwAndCcwMax/HwAgCwAndCcw/OverTrvlDiagc/Pass/CopyRight271
    EotLrng/EotLrngPer1/HwAgCwAndCcwMax/HwAgCwAndCcw/OverTrvlDiagc/RstHwAgOverTrvlSwtVari62
    EotLrng/EotLrngPer1/HwAgCwAndCcwMax/HwAgCwAndCcw/OverTrvlDiagc/RstHwAgOverTrvlSwtVari/CopyRight271
    EotLrng/EotLrngPer1/LimOffsRange131
    EotLrng/EotLrngPer1/LimOffsRange231
    EotLrng/EotLrngPer1/SRLEna37
    EotLrng/EotLrngPer1/SRLEna/ChkEotSigForNtc46
    EotLrng/EotLrngPer1/SRLEna/ChkEotSigForNtc/CopyRight251
    EotLrng/EotLrngPer1/SRLEna/ChkEotSigForNtc/Enumerated Constant151
    EotLrng/EotLrngPer1/SRLEna/ChkEotSigForNtc/EotSigAvl55
    EotLrng/EotLrngPer1/SRLEna/ChkEotSigForNtc/EotSigAvl/CopyRight261
    EotLrng/EotLrngPer1/SRLEna/ChkEotSigForNtc/EotSigAvl/Enumerated Constant161
    EotLrng/EotLrngPer1/SRLEna/ChkEotSigForNtc/EotSigAvl/Enumerated Constant1361
    EotLrng/EotLrngPer1/SRLEna/ChkEotSigForNtc/EotSigAvl/SetCorrlFltNtc63
    EotLrng/EotLrngPer1/SRLEna/ChkEotSigForNtc/EotSigAvl/SetCorrlFltNtc/SetNtcSts72
    EotLrng/EotLrngPer1/SRLEna/ChkEotSigForNtc/EotSigAvl/SetCorrlFltNtc/SetNtcSts/CopyRight281
    EotLrng/EotLrngPer1/SRLEna/ChkEotSigForNtc/EotSigAvl/SetCorrlFltNtc/SetNtcSts/ISO Fault Debounce Design81
    EotLrng/EotLrngPer1/SRLEna/ChkEotSigForNtc/EotSigAvl/SetOutOfRngNtc63
    EotLrng/EotLrngPer1/SRLEna/ChkEotSigForNtc/EotSigAvl/SetOutOfRngNtc/SetNtcSts72
    EotLrng/EotLrngPer1/SRLEna/ChkEotSigForNtc/EotSigAvl/SetOutOfRngNtc/SetNtcSts/CopyRight281
    EotLrng/EotLrngPer1/SRLEna/ChkEotSigForNtc/EotSigAvl/SetOutOfRngNtc/SetNtcSts/ISO Fault Debounce Design81
    EotLrng/EotLrngPer1/SRLEna/ChkEotSigForNtc/EotSigAvl/Update NVM64
    EotLrng/EotLrngPer1/SRLEna/ChkEotSigForNtc/EotSigAvl/Update NVM/CopyRight271
    EotLrng/EotLrngPer1/SRLEna/ChkEotSigForNtc/EotSigAvl/Update NVM/Enumerated Constant1371
    EotLrng/EotLrngPer1/SRLEna/ChkEotSigForNtc/EotSigAvl/Update NVM/Set Ram Block Status71
    EotLrng/EotLrngPer1/SRLEna/ChkEotSigForNtc/EotSigAvl/Update NVM/SetNTCPass73
    EotLrng/EotLrngPer1/SRLEna/ChkEotSigForNtc/EotSigAvl/Update NVM/SetNTCPass/SetNtcSts82
    EotLrng/EotLrngPer1/SRLEna/ChkEotSigForNtc/EotSigAvl/Update NVM/SetNTCPass/SetNtcSts/CopyRight291
    EotLrng/EotLrngPer1/SRLEna/ChkEotSigForNtc/EotSigAvl/Update NVM/SetNTCPass/SetNtcSts/ISO Fault Debounce Design91
    EotLrng/EotLrngPer1/SRLEna/ChkEotSigForNtc/SetSigAvlFltNtc53
    EotLrng/EotLrngPer1/SRLEna/ChkEotSigForNtc/SetSigAvlFltNtc/SetNtcSts62
    EotLrng/EotLrngPer1/SRLEna/ChkEotSigForNtc/SetSigAvlFltNtc/SetNtcSts/CopyRight271
    EotLrng/EotLrngPer1/SRLEna/ChkEotSigForNtc/SetSigAvlFltNtc/SetNtcSts/ISO Fault Debounce Design71
    EotLrng/EotLrngPer1/SRLEna/CopyRight241
    EotLrng/EotLrngPer1/SRLEna/Enumerated Constant441
    EotLrng/EotLrngPer1/SRLEna/GetNtcQlfrSts42
    EotLrng/EotLrngPer1/SRLEna/GetNtcQlfrSts/CopyRight251
    EotLrng/EotLrngPer1/SRLNotEna37
    EotLrng/EotLrngPer1/SRLNotEna/CalcResetEot42
    EotLrng/EotLrngPer1/SRLNotEna/CalcResetEot/CopyRight251
    EotLrng/EotLrngPer1/SRLNotEna/CopyRight241
    EotLrng/EotLrngPer1/SRLNotEna/LrnEotLim46
    EotLrng/EotLrngPer1/SRLNotEna/LrnEotLim/CopyRight251
    EotLrng/EotLrngPer1/SRLNotEna/LrnEotLim/LrgnEotCmplSts55
    EotLrng/EotLrngPer1/SRLNotEna/LrnEotLim/LrgnEotCmplSts/Compare To Zero61
    EotLrng/EotLrngPer1/SRLNotEna/LrnEotLim/LrgnEotCmplSts/Compare To Zero161
    EotLrng/EotLrngPer1/SRLNotEna/LrnEotLim/LrgnEotCmplSts/CopyRight261
    EotLrng/EotLrngPer1/SRLNotEna/LrnEotLim/LrgnEotCmplSts/EotCcwElpdTmr64
    EotLrng/EotLrngPer1/SRLNotEna/LrnEotLim/LrgnEotCmplSts/EotCcwElpdTmr/CopyRight271
    EotLrng/EotLrngPer1/SRLNotEna/LrnEotLim/LrgnEotCmplSts/EotCcwElpdTmr/EotCcwLrgnDetd72
    EotLrng/EotLrngPer1/SRLNotEna/LrnEotLim/LrgnEotCmplSts/EotCcwElpdTmr/EotCcwLrgnDetd/CopyRight281
    EotLrng/EotLrngPer1/SRLNotEna/LrnEotLim/LrgnEotCmplSts/EotCcwElpdTmr/GetTiSpan100MicroSec32bit73
    EotLrng/EotLrngPer1/SRLNotEna/LrnEotLim/LrgnEotCmplSts/EotCcwElpdTmr/GetTiSpan100MicroSec32bit/CopyRight281
    EotLrng/EotLrngPer1/SRLNotEna/LrnEotLim/LrgnEotCmplSts/EotCcwElpdTmr/GetTiSpan100MicroSec32bit/No wrapping82
    EotLrng/EotLrngPer1/SRLNotEna/LrnEotLim/LrgnEotCmplSts/EotCcwElpdTmr/GetTiSpan100MicroSec32bit/No wrapping/CopyRight291
    EotLrng/EotLrngPer1/SRLNotEna/LrnEotLim/LrgnEotCmplSts/EotCcwElpdTmr/GetTiSpan100MicroSec32bit/Wrapping82
    EotLrng/EotLrngPer1/SRLNotEna/LrnEotLim/LrgnEotCmplSts/EotCcwElpdTmr/GetTiSpan100MicroSec32bit/Wrapping/CopyRight291
    EotLrng/EotLrngPer1/SRLNotEna/LrnEotLim/LrgnEotCmplSts/EotCwElpdTmr64
    EotLrng/EotLrngPer1/SRLNotEna/LrnEotLim/LrgnEotCmplSts/EotCwElpdTmr/CopyRight271
    EotLrng/EotLrngPer1/SRLNotEna/LrnEotLim/LrgnEotCmplSts/EotCwElpdTmr/EotCwLrgnDetd72
    EotLrng/EotLrngPer1/SRLNotEna/LrnEotLim/LrgnEotCmplSts/EotCwElpdTmr/EotCwLrgnDetd/CopyRight281
    EotLrng/EotLrngPer1/SRLNotEna/LrnEotLim/LrgnEotCmplSts/EotCwElpdTmr/GetTiSpan100MicroSec32bit73
    EotLrng/EotLrngPer1/SRLNotEna/LrnEotLim/LrgnEotCmplSts/EotCwElpdTmr/GetTiSpan100MicroSec32bit/CopyRight281
    EotLrng/EotLrngPer1/SRLNotEna/LrnEotLim/LrgnEotCmplSts/EotCwElpdTmr/GetTiSpan100MicroSec32bit/No wrapping82
    EotLrng/EotLrngPer1/SRLNotEna/LrnEotLim/LrgnEotCmplSts/EotCwElpdTmr/GetTiSpan100MicroSec32bit/No wrapping/CopyRight291
    EotLrng/EotLrngPer1/SRLNotEna/LrnEotLim/LrgnEotCmplSts/EotCwElpdTmr/GetTiSpan100MicroSec32bit/Wrapping82
    EotLrng/EotLrngPer1/SRLNotEna/LrnEotLim/LrgnEotCmplSts/EotCwElpdTmr/GetTiSpan100MicroSec32bit/Wrapping/CopyRight291
    EotLrng/EotLrngPer1/SRLNotEna/LrnEotLim/LrgnEotCmplSts/GetRefTmrEotCcw63
    EotLrng/EotLrngPer1/SRLNotEna/LrnEotLim/LrgnEotCmplSts/GetRefTmrEotCcw/CopyRight271
    EotLrng/EotLrngPer1/SRLNotEna/LrnEotLim/LrgnEotCmplSts/GetRefTmrEotCcw/GetRefTmr100MicroSec32bit172
    EotLrng/EotLrngPer1/SRLNotEna/LrnEotLim/LrgnEotCmplSts/GetRefTmrEotCcw/GetRefTmr100MicroSec32bit1/CopyRight281
    EotLrng/EotLrngPer1/SRLNotEna/LrnEotLim/LrgnEotCmplSts/GetRefTmrEotCw63
    EotLrng/EotLrngPer1/SRLNotEna/LrnEotLim/LrgnEotCmplSts/GetRefTmrEotCw/CopyRight271
    EotLrng/EotLrngPer1/SRLNotEna/LrnEotLim/LrgnEotCmplSts/GetRefTmrEotCw/GetRefTmr100MicroSec32bit72
    EotLrng/EotLrngPer1/SRLNotEna/LrnEotLim/LrgnEotCmplSts/GetRefTmrEotCw/GetRefTmr100MicroSec32bit/CopyRight281
    EotLrng/EotLrngPer1/SRLNotEna/LrnEotLim/LrngEotLim53
    EotLrng/EotLrngPer1/SRLNotEna/LrnEotLim/LrngEotLim/CmpLim62
    EotLrng/EotLrngPer1/SRLNotEna/LrnEotLim/LrngEotLim/CmpLim/CopyRight271
    EotLrng/EotLrngPer1/SRLNotEna/LrnEotLim/LrngEotLim/CopyRight261
    EotLrng/EotLrngPer1/SRLNotEna/RstEot44
    EotLrng/EotLrngPer1/SRLNotEna/RstEot/ChkRstLimReq53
    EotLrng/EotLrngPer1/SRLNotEna/RstEot/ChkRstLimReq/CopyRight261
    EotLrng/EotLrngPer1/SRLNotEna/RstEot/ChkRstLimReq/ResetLimReq62
    EotLrng/EotLrngPer1/SRLNotEna/RstEot/ChkRstLimReq/ResetLimReq/Copyright171
    EotLrng/EotLrngPer1/SRLNotEna/RstEot/Copyright151
    EotLrng/GetHwAgOverTrvlCnt22
    EotLrng/GetHwAgOverTrvlCnt/CopyRight231
    EotLrng/RstHwAgOverTrvlCnt22
    EotLrng/RstHwAgOverTrvlCnt/CopyRight231
    EotLrng/RstHwAgOverTrvlCnt/Set Ram Block Status131
    EotLrng/RstMaxHwAgCwAndCcw22
    EotLrng/RstMaxHwAgCwAndCcw/CopyRight231
    EotLrng/RstMaxHwAgCwAndCcw/Set Ram Block Status31
    EotLrng/RtnMaxHwAgCwAndCcw22
    EotLrng/RtnMaxHwAgCwAndCcw/CopyRight231
    EotLrng/SerlComRstEot23
    EotLrng/SerlComRstEot/CopyRight231
    EotLrng/SerlComRstEot/SetRstLimReq32
    EotLrng/SerlComRstEot/SetRstLimReq/CopyRight241
    EotLrng/SetHwAgOverTrvlCnt22
    EotLrng/SetHwAgOverTrvlCnt/CopyRight231
    EotLrng/SetHwAgOverTrvlCnt/Set Ram Block Status131
    call_EotLrngInit112
    call_EotLrngInit1/CopyRight221
    call_EotLrngPer112
    call_EotLrngPer1/CopyRight221
    ∧ Less



     Check for root Inports with missing properties

    Identify Inport blocks in the top-level of the model with missing or inherited sample times, data types, or port dimensions

    Warning
    The following Inport blocks have undefined or inherited sample times, data types or port dimensions

    InportLinkConditions
    1SF011A_EotLrng/HwAgMissing port dimension
    Missing signal data type
    Missing port sample time
    2SF011A_EotLrng/HwAgDiDiagStsMissing port dimension
    Missing signal data type
    Missing port sample time
    3SF011A_EotLrng/HwAgAuthyMissing port dimension
    Missing signal data type
    Missing port sample time
    4SF011A_EotLrng/HwTqMissing port dimension
    Missing signal data type
    Missing port sample time
    5SF011A_EotLrng/MotVelCrfMissing port dimension
    Missing signal data type
    Missing port sample time
    6SF011A_EotLrng/HwAgEotSig0AvlMissing port dimension
    Missing signal data type
    Missing port sample time
    7SF011A_EotLrng/HwAgEotSig1AvlMissing port dimension
    Missing signal data type
    Missing port sample time
    8SF011A_EotLrng/HwAgEotSig0CwMissing port dimension
    Missing signal data type
    Missing port sample time
    9SF011A_EotLrng/HwAgEotSig0CcwMissing port dimension
    Missing signal data type
    Missing port sample time
    10SF011A_EotLrng/HwAgEotSig1CwMissing port dimension
    Missing signal data type
    Missing port sample time
    11SF011A_EotLrng/HwAgEotSig1CcwMissing port dimension
    Missing signal data type
    Missing port sample time
    12SF011A_EotLrng/HwAgOverTrvlCnt_ArgInMissing port dimension
    Missing signal data type
    Missing port sample time
    ∧ Less


    Recommended Action
    Explicitly define all missing Inport block properties identified in the results
    • Missing port dimension: Model contains Inport blocks with inherited port dimension (-1). Specify port dimension for the listed Inport blocks.
    • Missing signal data type: Model contains Inport blocks with inherited data type. Specify a data type for the listed Inport blocks.
    • Missing port sample time: Model contains Inport blocks with inherited sample time (-1). Specify sample time information for the listed Inport blocks. Note: The sample time of root Inports with bus type must match the sample times specified at the leaf elements of the bus object.


     Check state machine type of Stateflow charts

    Compares the state machine type of all Stateflow charts to the desired type.

    Check for Classic state machines
    Identify Stateflow charts using the Classic state machine type.

    Warning
    The following charts using Classic state machines were found in the model:

    Recommended Action
    For each chart listed above, in the Chart Properties dialog box, specify State Machine Type to either Mealy or Moore. Use the same state machine type for all charts in the model.
    _________________________________________________________________________________________

    Check for Mealy state machines
    Identify Stateflow charts using the Mealy state machine type.

    Passed
    No charts using Mealy state machines were found in the model.
    _________________________________________________________________________________________

    Check for Moore state machines
    Identify Stateflow charts using the Moore state machine type.

    Passed
    No charts using Moore state machines were found in the model.

    Input Parameters Selection
    NameValue
    State Machine TypeCommon


     Check for model objects that do not link to requirements

    Check Simulink blocks and Stateflow objects that do not link to a requirements document

    Warning
    The following blocks do not link to a requirement document:

    ∧ Less
    Recommended Action
    For each object in the list, in the Model Editor, right-click the block, select Requirements, and specify a requirement.



            Modeling Standards for MAAB

                Naming Conventions


     Check subsystem names

    Identify subsystem names that use characters that are not correct in C code.

    See Also

    Warning
    The following subsystem names contain incorrect characters:

    ErrorSubsystem block
    Name contains incorrect characters...../EotLrng/EotLrngInit1/Get Error Status
    Name contains incorrect characters...../EotLrng/EotLrngInit1/Get Error Status1
    Name contains incorrect characters...../ChkEotSigForNtc/EotSigAvl/Update NVM


    Recommended Action
    Rename the subsystem blocks using correct characters.


     Check character usage in block names

    Identify block names that use characters that are not correct in C code.

    See Also

    Warning
    The following block names use characters that are not correct for C code:

    Error typeBlock
    Name contains incorrect characters...../Function-Call Generator
    Name contains incorrect characters...../call_EotLrngPer1/Function-Call Generator


    Recommended Action
    Rename the block using correct characters.



                Model Architecture


     Check for mixing basic blocks and subsystems

    Identify levels in the model that include basic blocks and subsystems. Each level of a model must be designed with blocks of the same level (for example, only subsystems or only basic blocks).

    See Also

    Warning
    The following level(s) in the model include basic blocks and subsystems:

    SystemBlock path
    SF011A_EotLrngSF011A_EotLrng/Clock
    SF011A_EotLrngSF011A_EotLrng/CopyRight2
    SF011A_EotLrngSF011A_EotLrng/Data Store Read1
    SF011A_EotLrngSF011A_EotLrng/Data Store Read2
    SF011A_EotLrngSF011A_EotLrng/Data Store Read3
    SF011A_EotLrngSF011A_EotLrng/Data Store Read4
    SF011A_EotLrngSF011A_EotLrng/Data Store Read5
    SF011A_EotLrngSF011A_EotLrng/Data Store Read6
    SF011A_EotLrngSF011A_EotLrng/Data Store Write
    SF011A_EotLrngSF011A_EotLrng/Step
    SF011A_EotLrngSF011A_EotLrng/Step1
    SF011A_EotLrng/EotLrngSF011A_EotLrng/EotLrng/CopyRight2
    SF011A_EotLrng/EotLrng/EotLrngInit1..../EotLrng/EotLrngInit1/Calibration4
    SF011A_EotLrng/EotLrng/EotLrngInit1..../EotLrng/EotLrngInit1/Constant
    SF011A_EotLrng/EotLrng/EotLrngInit1..../EotLrng/EotLrngInit1/Constant1
    SF011A_EotLrng/EotLrng/EotLrngInit1..../EotLrng/EotLrngInit1/Constant15
    SF011A_EotLrng/EotLrng/EotLrngInit1..../EotLrng/EotLrngInit1/Constant18
    SF011A_EotLrng/EotLrng/EotLrngInit1..../EotLrng/EotLrngInit1/Constant2
    SF011A_EotLrng/EotLrng/EotLrngInit1..../EotLrng/EotLrngInit1/Constant3
    SF011A_EotLrng/EotLrng/EotLrngInit1..../EotLrng/EotLrngInit1/Constant4
    SF011A_EotLrng/EotLrng/EotLrngInit1..../EotLrng/EotLrngInit1/CopyRight2
    SF011A_EotLrng/EotLrng/EotLrngInit1..../EotLrng/EotLrngInit1/Data Store Read
    SF011A_EotLrng/EotLrng/EotLrngInit1..../EotLrng/EotLrngInit1/Data Store Read1
    SF011A_EotLrng/EotLrng/EotLrngInit1..../EotLrng/EotLrngInit1/Data Store Read2
    SF011A_EotLrng/EotLrng/EotLrngInit1..../EotLrng/EotLrngInit1/Data Store Read3
    SF011A_EotLrng/EotLrng/EotLrngInit1..../EotLrng/EotLrngInit1/Data Store Read4
    SF011A_EotLrng/EotLrng/EotLrngInit1..../EotLrng/EotLrngInit1/Data Store Read5
    SF011A_EotLrng/EotLrng/EotLrngInit1..../EotLrngInit1/Enumerated Constant13
    SF011A_EotLrng/EotLrng/EotLrngInit1..../EotLrng/EotLrngInit1/Enumerated Constant
    SF011A_EotLrng/EotLrng/EotLrngInit1..../EotLrngInit1/Enumerated Constant1
    SF011A_EotLrng/EotLrng/EotLrngInit1..../EotLrng/EotLrngInit1/Get Error Status
    SF011A_EotLrng/EotLrng/EotLrngInit1..../EotLrng/EotLrngInit1/Get Error Status1
    SF011A_EotLrng/EotLrng/EotLrngInit1..../EotLrng/EotLrngInit1/LimOffsRange1
    SF011A_EotLrng/EotLrng/EotLrngInit1..../EotLrng/EotLrngInit1/LimOffsRange2
    SF011A_EotLrng/EotLrng/EotLrngInit1..../EotLrng/EotLrngInit1/Logical Operator
    SF011A_EotLrng/EotLrng/EotLrngInit1..../EotLrng/EotLrngInit1/Logical Operator3
    SF011A_EotLrng/EotLrng/EotLrngInit1..../EotLrng/EotLrngInit1/Logical Operator4
    SF011A_EotLrng/EotLrng/EotLrngInit1..../EotLrng/EotLrngInit1/Relational Operator
    SF011A_EotLrng/EotLrng/EotLrngInit1..../EotLrngInit1/Relational Operator1
    SF011A_EotLrng/EotLrng/EotLrngInit1..../EotLrngInit1/Relational Operator2
    SF011A_EotLrng/EotLrng/EotLrngInit1..../EotLrngInit1/Relational Operator3
    SF011A_EotLrng/EotLrng/EotLrngInit1..../EotLrngInit1/Relational Operator4
    SF011A_EotLrng/EotLrng/EotLrngInit1..../EotLrngInit1/Relational Operator7
    SF011A_EotLrng/EotLrng/EotLrngInit1..../EotLrngInit1/SetOverTrvlDiagcPass
    SF011A_EotLrng/EotLrng/EotLrngInit1..../EotLrng/EotLrngInit1/Unary Minus
    SF011A_EotLrng/EotLrng/EotLrngInit1..../EotLrng/EotLrngInit1/Unary Minus1
    ..../EotLrng/EotLrngInit1/RstEot..../EotLrng/EotLrngInit1/RstEot/Cal1
    ..../EotLrng/EotLrngInit1/RstEot..../EotLrng/EotLrngInit1/RstEot/Cal2
    ..../EotLrng/EotLrngInit1/RstEot..../EotLrng/EotLrngInit1/RstEot/Calibration4
    ..../EotLrng/EotLrngInit1/RstEot..../EotLrng/EotLrngInit1/RstEot/Constant2
    ..../EotLrng/EotLrngInit1/RstEot..../EotLrng/EotLrngInit1/RstEot/Constant3
    ..../EotLrng/EotLrngInit1/RstEot..../EotLrng/EotLrngInit1/RstEot/Copyright1
    ..../EotLrng/EotLrngInit1/RstEot..../EotLrng/EotLrngInit1/RstEot/EotNotDetd
    ..../EotLrng/EotLrngInit1/RstEot..../EotLrng/EotLrngInit1/RstEot/Unary Minus
    ..../EotLrng/EotLrngInit1/RstEot/ChkRstLimReq..../RstEot/ChkRstLimReq/CopyRight2
    ..../EotLrng/EotLrngInit1/RstEot/ChkRstLimReq..../RstEot/ChkRstLimReq/Data Store Read4
    ..../EotLrng/EotLrngInit1/SRLNotEna..../EotLrngInit1/SRLNotEna/CopyRight2
    ..../EotLrng/EotLrngInit1/SRLNotEna..../EotLrngInit1/SRLNotEna/Data Store Write1
    ..../EotLrng/EotLrngInit1/SRLNotEna..../EotLrngInit1/SRLNotEna/Data Store Write2
    ..../EotLrng/EotLrngInit1/SRLNotEna..../SRLNotEna/Set Ram Block Status
    ..../EotLrng/EotLrngInit1/SRLNotEna..../EotLrng/EotLrngInit1/SRLNotEna/WriteFlag
    SF011A_EotLrng/EotLrng/EotLrngPer1..../EotLrng/EotLrngPer1/Calibration2
    SF011A_EotLrng/EotLrng/EotLrngPer1..../EotLrng/EotLrngPer1/CopyRight2
    SF011A_EotLrng/EotLrng/EotLrngPer1..../EotLrng/EotLrngPer1/LimOffsRange1
    SF011A_EotLrng/EotLrng/EotLrngPer1..../EotLrng/EotLrngPer1/LimOffsRange2
    ..../EotLrng/EotLrngPer1/HwAgCwAndCcwMax..../EotLrng/EotLrngPer1/HwAgCwAndCcwMax/Conf
    ..../EotLrng/EotLrngPer1/HwAgCwAndCcwMax..../EotLrngPer1/HwAgCwAndCcwMax/Constant
    ..../EotLrng/EotLrngPer1/HwAgCwAndCcwMax..../EotLrngPer1/HwAgCwAndCcwMax/Constant4
    ..../EotLrng/EotLrngPer1/HwAgCwAndCcwMax..../EotLrngPer1/HwAgCwAndCcwMax/CopyRight2
    ..../EotLrng/EotLrngPer1/HwAgCwAndCcwMax..../HwAgCwAndCcwMax/Relational Operator1
    ..../EotLrngPer1/HwAgCwAndCcwMax/HwAgCwAndCcw..../HwAgCwAndCcwMax/HwAgCwAndCcw/CopyRight2
    ..../EotLrngPer1/HwAgCwAndCcwMax/HwAgCwAndCcw..../HwAgCwAndCcw/Data Store Read6
    ..../EotLrngPer1/HwAgCwAndCcwMax/HwAgCwAndCcw..../HwAgCwAndCcw/Data Store Read7
    ..../EotLrngPer1/HwAgCwAndCcwMax/HwAgCwAndCcw..../HwAgCwAndCcw/Logical Operator1
    ..../EotLrngPer1/HwAgCwAndCcwMax/HwAgCwAndCcw..../HwAgCwAndCcw/Relational Operator5
    ..../EotLrngPer1/HwAgCwAndCcwMax/HwAgCwAndCcw..../HwAgCwAndCcw/Relational Operator6
    ..../HwAgCwAndCcw/OverTrvlDiagc..../HwAgCwAndCcw/OverTrvlDiagc/
    ..../HwAgCwAndCcw/OverTrvlDiagc..../HwAgCwAndCcw/OverTrvlDiagc/Abslt_f32_f32
    ..../HwAgCwAndCcw/OverTrvlDiagc..../HwAgCwAndCcw/OverTrvlDiagc/CopyRight2
    ..../HwAgCwAndCcw/OverTrvlDiagc..../OverTrvlDiagc/Data Store Write1
    ..../OverTrvlDiagc/CntOvrTrvlAndSetNTC..../CntOvrTrvlAndSetNTC/Constant
    ..../OverTrvlDiagc/CntOvrTrvlAndSetNTC..../CntOvrTrvlAndSetNTC/Constant1
    ..../OverTrvlDiagc/CntOvrTrvlAndSetNTC..../CntOvrTrvlAndSetNTC/Constant15
    ..../OverTrvlDiagc/CntOvrTrvlAndSetNTC..../CntOvrTrvlAndSetNTC/Constant18
    ..../OverTrvlDiagc/CntOvrTrvlAndSetNTC..../CntOvrTrvlAndSetNTC/Constant2
    ..../OverTrvlDiagc/CntOvrTrvlAndSetNTC..../CntOvrTrvlAndSetNTC/Constant3
    ..../OverTrvlDiagc/CntOvrTrvlAndSetNTC..../CntOvrTrvlAndSetNTC/CopyRight2
    ..../OverTrvlDiagc/CntOvrTrvlAndSetNTC..../CntOvrTrvlAndSetNTC/Data Store Read
    ..../OverTrvlDiagc/CntOvrTrvlAndSetNTC..../CntOvrTrvlAndSetNTC/Data Store Read1
    ..../OverTrvlDiagc/CntOvrTrvlAndSetNTC..../Enumerated Constant13
    ..../OverTrvlDiagc/CntOvrTrvlAndSetNTC..../CntOvrTrvlAndSetNTC/Relational Operator1
    ..../OverTrvlDiagc/CntOvrTrvlAndSetNTC..../CntOvrTrvlAndSetNTC/Relational Operator2
    ..../OverTrvlDiagc/CntOvrTrvlAndSetNTC..../CntOvrTrvlAndSetNTC/SetOverTrvlDiagc
    ..../EotLrng/EotLrngPer1/SRLEna..../EotLrng/EotLrngPer1/SRLEna/Constant
    ..../EotLrng/EotLrngPer1/SRLEna..../EotLrng/EotLrngPer1/SRLEna/CopyRight2
    ..../EotLrng/EotLrngPer1/SRLEna..../EotLrngPer1/SRLEna/Data Store Read
    ..../EotLrng/EotLrngPer1/SRLEna..../EotLrngPer1/SRLEna/Data Store Read1
    ..../EotLrng/EotLrngPer1/SRLEna..../EotLrngPer1/SRLEna/Data Store Read2
    ..../EotLrng/EotLrngPer1/SRLEna..../EotLrngPer1/SRLEna/Data Store Read3
    ..../EotLrng/EotLrngPer1/SRLEna..../EotLrngPer1/SRLEna/Enumerated Constant4
    ..../EotLrng/EotLrngPer1/SRLEna..../EotLrng/EotLrngPer1/SRLEna/GetNtcQlfrSts
    ..../EotLrng/EotLrngPer1/SRLEna..../EotLrng/EotLrngPer1/SRLEna/NtcStsChk
    ..../EotLrngPer1/SRLEna/ChkEotSigForNtc..../SRLEna/ChkEotSigForNtc/Constant1
    ..../EotLrngPer1/SRLEna/ChkEotSigForNtc..../SRLEna/ChkEotSigForNtc/Constant2
    ..../EotLrngPer1/SRLEna/ChkEotSigForNtc..../SRLEna/ChkEotSigForNtc/Constant3
    ..../EotLrngPer1/SRLEna/ChkEotSigForNtc..../SRLEna/ChkEotSigForNtc/CopyRight2
    ..../EotLrngPer1/SRLEna/ChkEotSigForNtc..../ChkEotSigForNtc/Enumerated Constant1
    ..../EotLrngPer1/SRLEna/ChkEotSigForNtc..../SRLEna/ChkEotSigForNtc/SetSigAvlFltNtc
    ..../SRLEna/ChkEotSigForNtc/EotSigAvl..../ChkEotSigForNtc/EotSigAvl/Abslt_f32_f1
    ..../SRLEna/ChkEotSigForNtc/EotSigAvl..../ChkEotSigForNtc/EotSigAvl/Abslt_f32_f2
    ..../SRLEna/ChkEotSigForNtc/EotSigAvl..../ChkEotSigForNtc/EotSigAvl/Constant
    ..../SRLEna/ChkEotSigForNtc/EotSigAvl..../ChkEotSigForNtc/EotSigAvl/Constant1
    ..../SRLEna/ChkEotSigForNtc/EotSigAvl..../ChkEotSigForNtc/EotSigAvl/Constant10
    ..../SRLEna/ChkEotSigForNtc/EotSigAvl..../ChkEotSigForNtc/EotSigAvl/Constant11
    ..../SRLEna/ChkEotSigForNtc/EotSigAvl..../ChkEotSigForNtc/EotSigAvl/Constant12
    ..../SRLEna/ChkEotSigForNtc/EotSigAvl..../ChkEotSigForNtc/EotSigAvl/Constant13
    ..../SRLEna/ChkEotSigForNtc/EotSigAvl..../ChkEotSigForNtc/EotSigAvl/Constant15
    ..../SRLEna/ChkEotSigForNtc/EotSigAvl..../ChkEotSigForNtc/EotSigAvl/Constant18
    ..../SRLEna/ChkEotSigForNtc/EotSigAvl..../ChkEotSigForNtc/EotSigAvl/Constant2
    ..../SRLEna/ChkEotSigForNtc/EotSigAvl..../ChkEotSigForNtc/EotSigAvl/Constant3
    ..../SRLEna/ChkEotSigForNtc/EotSigAvl..../ChkEotSigForNtc/EotSigAvl/Constant4
    ..../SRLEna/ChkEotSigForNtc/EotSigAvl..../ChkEotSigForNtc/EotSigAvl/Constant5
    ..../SRLEna/ChkEotSigForNtc/EotSigAvl..../ChkEotSigForNtc/EotSigAvl/Constant6
    ..../SRLEna/ChkEotSigForNtc/EotSigAvl..../ChkEotSigForNtc/EotSigAvl/Constant7
    ..../SRLEna/ChkEotSigForNtc/EotSigAvl..../ChkEotSigForNtc/EotSigAvl/Constant8
    ..../SRLEna/ChkEotSigForNtc/EotSigAvl..../ChkEotSigForNtc/EotSigAvl/Constant9
    ..../SRLEna/ChkEotSigForNtc/EotSigAvl..../ChkEotSigForNtc/EotSigAvl/CopyRight2
    ..../SRLEna/ChkEotSigForNtc/EotSigAvl..../EotSigAvl/Enumerated Constant1
    ..../SRLEna/ChkEotSigForNtc/EotSigAvl..../EotSigAvl/Enumerated Constant13
    ..../SRLEna/ChkEotSigForNtc/EotSigAvl..../ChkEotSigForNtc/EotSigAvl/EotCcwSigCorrl
    ..../SRLEna/ChkEotSigForNtc/EotSigAvl..../ChkEotSigForNtc/EotSigAvl/EotCwSigCorrl
    ..../SRLEna/ChkEotSigForNtc/EotSigAvl..../EotSigAvl/Logical Operator
    ..../SRLEna/ChkEotSigForNtc/EotSigAvl..../EotSigAvl/Logical Operator1
    ..../SRLEna/ChkEotSigForNtc/EotSigAvl..../EotSigAvl/Logical Operator2
    ..../SRLEna/ChkEotSigForNtc/EotSigAvl..../EotSigAvl/Logical Operator3
    ..../SRLEna/ChkEotSigForNtc/EotSigAvl..../EotSigAvl/Logical Operator4
    ..../SRLEna/ChkEotSigForNtc/EotSigAvl..../EotSigAvl/Logical Operator5
    ..../SRLEna/ChkEotSigForNtc/EotSigAvl..../EotSigAvl/Relational Operator
    ..../SRLEna/ChkEotSigForNtc/EotSigAvl..../EotSigAvl/Relational Operator1
    ..../SRLEna/ChkEotSigForNtc/EotSigAvl..../EotSigAvl/Relational Operator2
    ..../SRLEna/ChkEotSigForNtc/EotSigAvl..../EotSigAvl/Relational Operator3
    ..../SRLEna/ChkEotSigForNtc/EotSigAvl..../EotSigAvl/Relational Operator4
    ..../SRLEna/ChkEotSigForNtc/EotSigAvl..../EotSigAvl/Relational Operator5
    ..../SRLEna/ChkEotSigForNtc/EotSigAvl..../EotSigAvl/Relational Operator6
    ..../SRLEna/ChkEotSigForNtc/EotSigAvl..../EotSigAvl/Relational Operator7
    ..../SRLEna/ChkEotSigForNtc/EotSigAvl..../EotSigAvl/Relational Operator8
    ..../SRLEna/ChkEotSigForNtc/EotSigAvl..../EotSigAvl/Relational Operator9
    ..../SRLEna/ChkEotSigForNtc/EotSigAvl..../ChkEotSigForNtc/EotSigAvl/SetCorrlFltNtc
    ..../SRLEna/ChkEotSigForNtc/EotSigAvl..../ChkEotSigForNtc/EotSigAvl/SetOutOfRngNtc
    ..../SRLEna/ChkEotSigForNtc/EotSigAvl..../ChkEotSigForNtc/EotSigAvl/Unary Minus
    ..../SRLEna/ChkEotSigForNtc/EotSigAvl..../ChkEotSigForNtc/EotSigAvl/Unary Minus1
    ..../SRLEna/ChkEotSigForNtc/EotSigAvl..../ChkEotSigForNtc/EotSigAvl/Unary Minus2
    ..../SRLEna/ChkEotSigForNtc/EotSigAvl..../ChkEotSigForNtc/EotSigAvl/Unary Minus3
    ..../EotLrng/EotLrngPer1/SRLNotEna..../EotLrng/EotLrngPer1/SRLNotEna/CopyRight2
    ..../EotLrng/EotLrngPer1/SRLNotEna..../EotLrngPer1/SRLNotEna/Data Store Read
    ..../EotLrng/EotLrngPer1/SRLNotEna..../EotLrngPer1/SRLNotEna/Data Store Read1
    ..../EotLrng/EotLrngPer1/SRLNotEna..../EotLrngPer1/SRLNotEna/Data Store Read2
    ..../EotLrng/EotLrngPer1/SRLNotEna..../EotLrngPer1/SRLNotEna/Data Store Read3
    ..../EotLrng/EotLrngPer1/SRLNotEna/LrnEotLim..../SRLNotEna/LrnEotLim/CopyRight2
    ..../SRLNotEna/LrnEotLim/LrgnEotCmplSts..../LrnEotLim/LrgnEotCmplSts/Abslt_f32_f1
    ..../SRLNotEna/LrnEotLim/LrgnEotCmplSts..../LrnEotLim/LrgnEotCmplSts/Abslt_f32_f32
    ..../SRLNotEna/LrnEotLim/LrgnEotCmplSts..../LrnEotLim/LrgnEotCmplSts/Calibration
    ..../SRLNotEna/LrnEotLim/LrgnEotCmplSts..../LrnEotLim/LrgnEotCmplSts/Compare To Zero
    ..../SRLNotEna/LrnEotLim/LrgnEotCmplSts..../LrgnEotCmplSts/Compare To Zero1
    ..../SRLNotEna/LrnEotLim/LrgnEotCmplSts..../LrnEotLim/LrgnEotCmplSts/CopyRight2
    ..../SRLNotEna/LrnEotLim/LrgnEotCmplSts..../LrgnEotCmplSts/Logical Operator
    ..../SRLNotEna/LrnEotLim/LrgnEotCmplSts..../LrgnEotCmplSts/Logical Operator1
    ..../SRLNotEna/LrnEotLim/LrgnEotCmplSts..../LrgnEotCmplSts/Logical Operator2
    ..../SRLNotEna/LrnEotLim/LrgnEotCmplSts..../LrgnEotCmplSts/Relational Operator1
    ..../SRLNotEna/LrnEotLim/LrgnEotCmplSts..../LrgnEotCmplSts/Relational Operator2
    ..../SRLNotEna/LrnEotLim/LrgnEotCmplSts..../LrgnEotCmplSts/Relational Operator3
    ..../SRLNotEna/LrnEotLim/LrgnEotCmplSts..../LrgnEotCmplSts/Relational Operator4
    ..../SRLNotEna/LrnEotLim/LrgnEotCmplSts..../LrgnEotCmplSts/Relational Operator5
    ..../SRLNotEna/LrnEotLim/LrgnEotCmplSts..../LrnEotLim/LrgnEotCmplSts/Unary Minus
    ..../SRLNotEna/LrnEotLim/LrgnEotCmplSts..../LrnEotLim/LrgnEotCmplSts/calibration1
    ..../SRLNotEna/LrnEotLim/LrgnEotCmplSts..../LrnEotLim/LrgnEotCmplSts/calibration2
    ..../SRLNotEna/LrnEotLim/LrgnEotCmplSts..../LrnEotLim/LrgnEotCmplSts/calibration3
    ..../SRLNotEna/LrnEotLim/LrgnEotCmplSts..../LrnEotLim/LrgnEotCmplSts/calibration4
    ..../LrnEotLim/LrgnEotCmplSts/EotCcwElpdTmr..../LrgnEotCmplSts/EotCcwElpdTmr/CopyRight2
    ..../LrnEotLim/LrgnEotCmplSts/EotCcwElpdTmr..../EotCcwElpdTmr/Data Store Read1
    ..../LrnEotLim/LrgnEotCmplSts/EotCcwElpdTmr..../LrgnEotCmplSts/EotCcwElpdTmr/Divide2
    ..../LrnEotLim/LrgnEotCmplSts/EotCcwElpdTmr..../EotCcwElpdTmr/GetTiSpan100MicroSec32bit
    ..../LrnEotLim/LrgnEotCmplSts/EotCcwElpdTmr..../EotCcwElpdTmr/MillisecPerCount
    ..../LrnEotLim/LrgnEotCmplSts/EotCcwElpdTmr..../EotCcwElpdTmr/Relational Operator1
    ..../LrnEotLim/LrgnEotCmplSts/EotCcwElpdTmr..../EotCcwElpdTmr/calibration6
    ..../LrnEotLim/LrgnEotCmplSts/EotCwElpdTmr..../LrgnEotCmplSts/EotCwElpdTmr/CopyRight2
    ..../LrnEotLim/LrgnEotCmplSts/EotCwElpdTmr..../EotCwElpdTmr/Data Store Read
    ..../LrnEotLim/LrgnEotCmplSts/EotCwElpdTmr..../LrgnEotCmplSts/EotCwElpdTmr/Divide2
    ..../LrnEotLim/LrgnEotCmplSts/EotCwElpdTmr..../EotCwElpdTmr/GetTiSpan100MicroSec32bit
    ..../LrnEotLim/LrgnEotCmplSts/EotCwElpdTmr..../EotCwElpdTmr/MillisecPerCount
    ..../LrnEotLim/LrgnEotCmplSts/EotCwElpdTmr..../EotCwElpdTmr/Relational Operator1
    ..../LrnEotLim/LrgnEotCmplSts/EotCwElpdTmr..../LrgnEotCmplSts/EotCwElpdTmr/calibration5
    ..../LrnEotLim/LrgnEotCmplSts/GetRefTmrEotCcw..../GetRefTmrEotCcw/CopyRight2
    ..../LrnEotLim/LrgnEotCmplSts/GetRefTmrEotCcw..../GetRefTmrEotCcw/Data Store Write2
    ..../LrnEotLim/LrgnEotCmplSts/GetRefTmrEotCw..../LrgnEotCmplSts/GetRefTmrEotCw/CopyRight2
    ..../LrnEotLim/LrgnEotCmplSts/GetRefTmrEotCw..../GetRefTmrEotCw/Data Store Write1
    ..../SRLNotEna/LrnEotLim/LrngEotLim..../LrnEotLim/LrngEotLim/Calibration
    ..../SRLNotEna/LrnEotLim/LrngEotLim..../LrnEotLim/LrngEotLim/CopyRight2
    ..../SRLNotEna/LrnEotLim/LrngEotLim..../LrngEotLim/Relational Operator1
    ..../EotLrng/EotLrngPer1/SRLNotEna/RstEot..../EotLrngPer1/SRLNotEna/RstEot/Cal1
    ..../EotLrng/EotLrngPer1/SRLNotEna/RstEot..../EotLrngPer1/SRLNotEna/RstEot/Cal2
    ..../EotLrng/EotLrngPer1/SRLNotEna/RstEot..../SRLNotEna/RstEot/Calibration4
    ..../EotLrng/EotLrngPer1/SRLNotEna/RstEot..../EotLrngPer1/SRLNotEna/RstEot/Constant2
    ..../EotLrng/EotLrngPer1/SRLNotEna/RstEot..../EotLrngPer1/SRLNotEna/RstEot/Constant3
    ..../EotLrng/EotLrngPer1/SRLNotEna/RstEot..../EotLrngPer1/SRLNotEna/RstEot/Copyright1
    ..../EotLrng/EotLrngPer1/SRLNotEna/RstEot..../EotLrngPer1/SRLNotEna/RstEot/EotNotDetd
    ..../EotLrng/EotLrngPer1/SRLNotEna/RstEot..../EotLrngPer1/SRLNotEna/RstEot/Unary Minus
    ..../SRLNotEna/RstEot/ChkRstLimReq..../SRLNotEna/RstEot/ChkRstLimReq/CopyRight2
    ..../SRLNotEna/RstEot/ChkRstLimReq..../RstEot/ChkRstLimReq/Data Store Read4
    SF011A_EotLrng/EotLrng/SerlComRstEot..../EotLrng/SerlComRstEot/Calibration4
    SF011A_EotLrng/EotLrng/SerlComRstEot..../EotLrng/SerlComRstEot/CopyRight2
    ∧ Less


    Recommended Action
    If possible, replace blocks at the identified level of the model hierarchy with basic blocks. Move nonvirtual blocks into the identified subsystem.



                Model Configuration Options

                Simulink


     Check for Simulink diagrams using nonstandard display attributes

    Identify nonstandard display attributes in Simulink diagrams.

    See Also

    _________________________________________________________________________________________

    Check format settings
    Identify incorrect model-level format options.

    Warning
    The following format display options are incorrect.

    Display AttributeRecommended ValueActual Value
    Display > Signals & Ports > Wide Nonscalar Linesonoff
    View > Model Browser Options > Model Browseroffon
    Display > Library Links > Allnonedisabled


    Recommended Action
    Set the format options to the recommended value.
    _________________________________________________________________________________________

    Check block colors
    Identify blocks using nonstandard colors.

    Warning
    The following blocks use nonstandard colors:

    Recommended Action
    Set the block foreground color to black and the background color to white.
    _________________________________________________________________________________________

    Check canvas colors
    Identify canvases that are not white.

    Passed
    All diagrams use a white canvas.
    _________________________________________________________________________________________

    Check diagram zoom
    Identify diagrams that do not have zoom factor set to 100 %.

    Warning
    The following diagrams do not have zoom factor set to 100 percent:

    ∧ Less
    Recommended Action
    For each listed diagram, select View > Zoom > Normal View (100%).


     Check font formatting

    Identify inconsistent formatting of text.

    See Also

    Warning
    Font formatting is not consistent.

    The following font characteristics are used in the model/subsystem. Font characteristics are sorted by number of occurrences. The most common characteristics are bold.
    Font NameFont SizeFont Style

    Helvetica
    Arial

    10
    14
    9

    normal



    Recommended Action
    To have consistent font formatting, click Modify All Fonts to apply the font formatting selected in the input parameters above to all objects.

    Input Parameters Selection
    NameValue
    Font NameCommon
    Font SizeCommon
    Font StyleCommon


     Check positioning and configuration of ports

    Identify input and output ports with incorrect positioning and configurations.

    See Also

    _________________________________________________________________________________________

    Check Inport blocks position
    Identify Inport blocks that result in left-flowing signals.

    Passed
    There are no Inport blocks in the model that result in left-flowing signals.
    _________________________________________________________________________________________

    Check Outport block position
    Identify Outport blocks that result in left-flowing signals.

    Passed
    There are no Outport blocks in the model that result in left-flowing signals.
    _________________________________________________________________________________________

    Check port orientation
    Identify port blocks with nondefault orientation.

    Passed
    All ports use the default orientation.
    _________________________________________________________________________________________

    Check for duplicate Inports blocks
    Identify duplicate Inport blocks.

    Passed
    All Inport blocks in the model are used once.


     Check visibility of block port names

    Identify port block names that are not uniformly displayed. The block names must all be displayed or none displayed. Library blocks are an exception to this rule. This check ignores masked and subsystem blocks.

    See Also

    _________________________________________________________________________________________

    Check for incorrect port name display
    Identify ports that are incorrectly displaying names.

    Passed
    Subsystem blocks are correctly displayed.
    _________________________________________________________________________________________

    Check for incorrect subsystem port name display
    Identify subsystems that are incorrectly displaying names.

    Passed
    Subsystem blocks are correctly displayed.

    Input Parameters Selection
    NameValue
    Display all port names (Diagram > Format > Show Block Name).true


     Check the display attributes of block names

    Identify whether to display block names.

    See Also

    _________________________________________________________________________________________

    Check for blocks with hidden names and obvious function
    Identify block names that are displayed but can be hidden due to obvious behavior.

    Passed
    All blocks with obvious behavior have hidden names.
    _________________________________________________________________________________________

    Check for non-descriptive displayed block names
    Identify block names that are displayed but should be hidden due to a lack of a descriptive name.

    Warning
    The following blocks have a name displayed, however, the name is not descriptive:

    Recommended Action
    Modify the block name to provide descriptive information, or hide the block name by deselecting (Diagram > Format > Show Block Name).
    _________________________________________________________________________________________

    Check for missing block names
    Identify block names that are hidden but should be displayed to show a descriptive name.

    Warning
    The following blocks have descriptive names, however, the names are hidden:

    ∧ Less
    Recommended Action
    Modify the blocks to show the block name (Diagram > Format > Show Block Name).


     Check for nondefault block attributes

    Identify blocks that use and fail to display nondefault values.

    See Also

    Warning
    The following blocks use and fail to display nondefault values:

    BlockParameterExpected ValueActual Value
    ..../OverTrvlDiagc/RstHwAgOverTrvlSwtVari/LockScaleoffon
    ..../LrnEotLim/LrgnEotCmplSts/CalibrationVectorParams1Donoff


    Recommended Action
    For the above blocks, display the nondefault value using the Block Annotation pane of the Block Properties dialog box.


     Check signal line labels

    Identify blocks that require labeled signals. A subset of source and destination blocks require labeled signals.

    See Also

    _________________________________________________________________________________________

    Check source block labels
    The following source blocks require labeled signals; Inport, From, Data Store Read, Constant, Bus Selector, Demux, Selector. If the signal name is visible on the block, this rule is considered met.

    Warning
    The following signals have no label:

    ∧ Less
    Recommended Action
    Add a new or propagated label to the signal line.
    _________________________________________________________________________________________

    Check destination block labels
    The following destination blocks require labeled signals; Outport, Goto, Data Store Write, Bus Creator, Mux, Subsystem, Chart. If the signal name is visible on the source block, this rule is considered met.

    Warning
    The following signals have no label:

    ∧ Less
    Recommended Action
    Add a new or propagated label to the signal line.


     Check for propagated signal labels

    Identify propagated labels on signal lines.

    See Also

    _________________________________________________________________________________________

    Check subsystem input labels
    Identify subsystem inputs that are labeled and display propagated signals.

    Passed
    All inputs to the subsystem have labels and display propagated signals.
    _________________________________________________________________________________________

    Check subsystem output labels
    Identify outputs from subsystems that are labeled and display signal propagation.

    Passed
    All outputs from the subsystem have labels and display propagated signals.
    _________________________________________________________________________________________

    Signal propagation for nonsubsystem blocks
    Identify the signal propagation status for both transformative and nontransformative blocks.

    Passed
    All outputs from non subsystem blocks correctly use labels and display propagated signals.



                Stateflow


     Check usage of exclusive and default states in state machines

    Identify Stateflow charts and substates that incorrectly use or define exclusive and default states.
    Note: This check does not support charts that use MATLAB as the action language.

    See Also

    _________________________________________________________________________________________

    Check Stateflow charts for exclusive states
    Identify Stateflow charts that have singular exclusive (OR) states.

    Passed
    The Stateflow charts do not have singular exclusive (OR) states.
    _________________________________________________________________________________________

    Check Stateflow charts for undefined default states
    Identify Stateflow charts that do not define default states.

    Passed
    Each Stateflow chart defines a default state.
    _________________________________________________________________________________________

    Check for multiple states assigned as the default state
    At the root level in the Stateflow hierarchy only one state should be assigned as the default.

    Passed
    The root level of the chart has only one default state assigned.
    _________________________________________________________________________________________

    Check for substates with singular OR states
    States configured as OR should always be part of a group of states.

    Passed
    No singular OR states were detected.
    _________________________________________________________________________________________

    Check for substates without default states defined
    At every level in the Stateflow hierarchy a default state should be assigned.

    Passed
    All substates have default states assigned.
    _________________________________________________________________________________________

    Check for substates with multiple default states defined
    At every level in the Stateflow hierarchy only one state should be assigned as the default.

    Passed
    All levels of the chart have only one default state assigned.


     Check transition orientations in flowcharts

    Identify transitions in Stateflow flowcharts that are drawn incorrectly.

    See Also

    _________________________________________________________________________________________

    Check for conditions drawn vertically
    Condition expressions should be drawn on the horizontal segments of flowcharts.

    Warning
    The following transitions have condition expressions that are not horizontal:

    Recommended Action
    Draw condition transitions horizontally.
    _________________________________________________________________________________________

    Check for action transitions drawn vertically
    Transition actions should be drawn on the vertical segments of flowcharts.

    Warning
    The following transitions have action expressions that are not vertical:

    ∧ Less
    Recommended Action
    Draw action transitions vertically.
    _________________________________________________________________________________________

    Check for junctions for default transitions
    All Junctions in a flow chart should have a default exit transition.

    Warning
    The following Junctions do not have a default exit transition:

    Recommended Action
    Consider reorganizing the flow chart to add a default transition.
    _________________________________________________________________________________________

    Check for transitions that combine condition and action
    Flowcharts should not combine condition evaluations and action expressions in a single transition.

    Warning
    The following transition have a mixture of condition and assignment actions:

    ∧ Less
    Recommended Action
    Separate the conditional action from the assignment action.


     Check default transition placement in Stateflow charts

    Identify all groupings of states that do not have a default transition or do not have the default state as the top-most state.

    See Also

    _________________________________________________________________________________________

    Identify states that do not have default transitions.

    Passed
    All groupings of states have default transitions.
    _________________________________________________________________________________________

    Identify states where the default transition is not the top-most state.

    Passed
    The default states are in the correct position.
    _________________________________________________________________________________________

    Identify default transitions not connected to the top of the state.

    Passed
    All default transitions connect to the top of the state.
    _________________________________________________________________________________________

    Identify states with multiple default transitions.

    Passed
    All states have only one default transition.



                MATLAB Functions


            Requirements Consistency Checking


            Simulation Accuracy


            Simulation Runtime Accuracy Diagnostics


     Runtime diagnostics for S-functions

    This model contains the following C-MEX S-functions:

    IDS-FunctionBlock
    1C:\Users\nz2988\Documents\MATLAB\Nexteer Library\Nexteer_Utilities v4.10.0\Libraries\EA4_Library\Math\Abslt_f32_f32.mexw64SF011A_EotLrng/EotLrng/EotLrngPer1/HwAgCwAndCcwMax/HwAgCwAndCcw/OverTrvlDiagc/Abslt_f32_f32
      SF011A_EotLrng/EotLrng/EotLrngPer1/SRLEna/ChkEotSigForNtc/EotSigAvl/Abslt_f32_f1
      ...
    2C:\Users\nz2988\Documents\MATLAB\Nexteer Library\Nexteer_Utilities v4.10.0\Libraries\EA4_Library\Math\Max_f32.mexw64SF011A_EotLrng/EotLrng/EotLrngPer1/SRLNotEna/LrnEotLim/LrngEotLim/CmpLim/Max_f1
      SF011A_EotLrng/EotLrng/EotLrngPer1/SRLNotEna/LrnEotLim/LrngEotLim/CmpLim/Max_f2
      ...
    3C:\Users\nz2988\Documents\MATLAB\Nexteer Library\Nexteer_Utilities v4.10.0\Libraries\EA4_Library\Math\Min_f32.mexw64SF011A_EotLrng/EotLrng/EotLrngPer1/SRLNotEna/LrnEotLim/LrngEotLim/CmpLim/Min_f1
      SF011A_EotLrng/EotLrng/EotLrngPer1/SRLNotEna/LrnEotLim/LrngEotLim/CmpLim/Min_f2
      ...

    Consider setting Solver data inconsistency [?] to either error or warning (currently set to none) to validate whether S-functions adhere to the ODE solver consistency rules that Simulink applies to its built-in blocks.

    Consider setting ArrayBounds exceeded [?]to either error or warning (currently set to none) to check if S-functions are writing outside array boundaries.

    Note: These runtime diagnostics may slow down simulation considerably. You should set them back to none once you have verified that they do not cause any warnings or errors during simulation.


     Check if Read/Write diagnostics are enabled for Data Store blocks

    Note: These runtime diagnostics may slow down simulation considerably. You should set them back to Disable all once you have verified that they do not cause any warnings or errors during simulation.



            Simulink Model File Integrity

            Upgrading to the Current Simulink Version