SinVltgGenn_IntegrationManual
Integration Manual
For
Sine Voltage Generation
VERSION: 1
DATE: 11-June-2015
Location: The official version of this document is stored in the Nexteer Configuration Management System.
Revision History
Version | Description | Author | Date |
1 | Initial version | Sankardu Varadapureddi | 2-May-2015 |
Table of Contents
3.2 Global Functions(Non RTE) to be provided to Integration Project 6
4 Configuration REQUIREMeNTS 7
4.2 Configuration Files to be provided by Integration Project 7
4.3 Da Vinci Parameter Configuration Changes 7
4.4 DaVinci Interrupt Configuration Changes 7
4.5 Manual Configuration Changes 7
5 Integration DATAFLOW REQUIREMENTS 8
5.1 Required Global Data Inputs 8
5.2 Required Global Data Outputs 8
5.3 Specific Include Path present 8
Abbrevations And Acronyms
Abbreviation | Description |
DFD | Design functional diagram |
MDD | Module design Document |
References
This section lists the title & version of all the documents that are referred for development of this document
Sr. No. | Title | Version |
1 | Software Naming Conventions | Process 4.00.00 |
2 | Software Coding Standards | Process 4.00.00 |
3 | FDD – ES300A_SinVltgGenn_Design | See Synergy sub project version |
Dependencies
SWCs
Module | Required Feature |
None |
Note : Referencing the external components should be avoided in most cases. Only in unavoidable circumstance external components should be referred. Developer should track the references.
Global Functions(Non RTE) to be provided to Integration Project
SinVltgGennPer1
SinVltgGennPer2
Configuration REQUIREMeNTS
Build Time Config
Modules | Notes | |
None |
Configuration Files to be provided by Integration Project
None
Da Vinci Parameter Configuration Changes
Parameter | Notes | SWC |
None |
DaVinci Interrupt Configuration Changes
ISR Name | VIM # | Priority Dependency | Notes |
None |
Manual Configuration Changes
Constant | Notes | SWC |
None |
Integration DATAFLOW REQUIREMENTS
Required Global Data Inputs
See design model for details.
Required Global Data Outputs
See design model for details.
Specific Include Path present
Yes
Runnable Scheduling
This section specifies the required runnable scheduling.
Init | Scheduling Requirements | Trigger |
SinVltgGennInit1 | None | RTE (init) |
Runnable | Scheduling Requirements | Trigger |
SinVltgGennPer1 | MotCtrlISR | |
SinVltgGennPer2 | MotCtrlISR |
Memory Map REQUIREMENTS
Mapping
Memory Section * | Contents | Notes |
MotCtrl_START_SEC_CODE | Code section for Motor Control scheduled functions | Constants are defined at function level. Memory mapping need to be adjusted accordingly. |
* Each …START_SEC… constant is terminated by a …STOP_SEC… constant as specified in the AUTOSAR Memory Mapping requirements.
Usage
Feature | RAM | ROM |
None |
Non RTE NvM Blocks
Block Name |
None |
Note : Size of the NVM block if configured in configurator
RTE NvM Blocks
Block Name |
None |
Note : Size of the NVM block if configured in developer
Compiler Settings
Preprocessor MACRO
None
Optimization Settings
None