TSG31CfgAndUse Integration Manual

TSG31CfgAndUse

Integration Manual

VERSION: 1.0

DATE: 28-Apr-2015

Revision History

Sl. No.DescriptionAuthorVersionDate
1Initial versionK Creager1.028-Apr-2015

Table of Contents

1 Abbrevations And Acronyms 4

2 References 5

3 Dependencies 6

3.1 SWCs 6

3.2 Global Functions(Non RTE) to be provided to Integration Project 6

4 Configuration REQUIREMeNTS 7

4.1 Build Time Config 7

4.2 Configuration Files to be provided by Integration Project 7

4.3 Da Vinci Parameter Configuration Changes 7

4.4 DaVinci Interrupt Configuration Changes 7

4.5 Manual Configuration Changes 7

5 Integration DATAFLOW REQUIREMENTS 8

5.1 Required Global Data Inputs 8

5.2 Required Global Data Outputs 8

5.3 Specific Include Path present 8

6 Runnable Scheduling 9

7 Memory Map REQUIREMENTS 10

7.1 Mapping 10

7.2 Usage 10

7.3 Non RTE NvM Blocks 10

7.4 RTE NvM Blocks 10

8 Compiler Settings 11

8.1 Preprocessor MACRO 11

8.2 Optimization Settings 11

9 Appendix 12

Abbrevations And Acronyms

AbbreviationDescription
DFDDesign functional diagram
MDDModule design Document
FDDFunctional Design Document

References

This section lists the title & version of all the documents that are referred for development of this document

Sr. No.TitleVersion
<1>MDD GuidelinesSoftware Process Release 03.06.00
<2>Software Naming ConventionsSoftware Process Release 03.06.00
<3>Design and Coding StandardsSoftware Process Release 03.06.00
<4>FDD: CM475A_TSG31CfgAndUse_DesignSee Synergy subproject version

Dependencies

SWCs

ModuleRequired Feature
<Name of SWC><Addition of global data, function>*.

Note : Referencing the external components should be avoided in most cases. Only in unavoidable circumstance external components should be referred. Developer should track the references.

Global Functions(Non RTE) to be provided to Integration Project

See FDD – CM475A_TSG31CfgAndUse_DataDict.m file

Configuration REQUIREMeNTS

Build Time Config

ModulesNotes
None

Configuration Files to be provided by Integration Project

<Configuration file that will generated from this components that will require Da Vinci Config generation or manual generation. Describe each parameter >

Da Vinci Parameter Configuration Changes

ParameterNotesSWC
<Configurator Changes for parameters>

DaVinci Interrupt Configuration Changes

ISR NameVIM #Priority DependencyNotes
<Configurator Changes for Interrupts>

Manual Configuration Changes

ConstantNotesSWC
<Additional configuration changes>

Integration DATAFLOW REQUIREMENTS

Required Global Data Inputs

See FDD – CM475A_TSG31CfgAndUse_DataDict.m file

Required Global Data Outputs

See FDD – CM475A_TSG31CfgAndUse_DataDict.m file

Specific Include Path present

Yes

Runnable Scheduling

This section specifies the required runnable scheduling.

InitScheduling RequirementsTrigger
TSG31CfgAndUseInit1NoneRTE/ Init
RunnableScheduling RequirementsTrigger
TSG31CfgAndUsePer1NoneMotor control runnable
TSG31CfgAndUsePer2NoneRTE/2 ms

.

Memory Map REQUIREMENTS

Mapping

Memory SectionContentsNotes
MotCtrl_START_SEC_CODEMotor Control runnables

* Each …START_SEC… constant is terminated by a …STOP_SEC… constant as specified in the AUTOSAR Memory Mapping requirements.

Usage

FeatureRAMROM
<Memmap usuage info>

Table 1: ARM Cortex R4 Memory Usage

Non RTE NvM Blocks

Block Name
<NVM block used Non RTE functions >

Note : Size of the NVM block if configured in developer

RTE NvM Blocks

Block Name
<NVM block used in RTE functions >

Note : Size of the NVM block if configured in developer

Compiler Settings

Preprocessor MACRO

<Define all the preprocessor Macros needed and conditions when needed>.

Optimization Settings

<Define Optimization levels that are needed and conditions when needed>.

Appendix

<This section is for appendix>

Last modified October 12, 2025: Initial commit (1fadfc4)