LimrCdng_IntegrationManual
Integration Manual
For
LimrCdng
VERSION: 1.0
DATE: 22-Jul-2015
Prepared By:
Nick Saxton,
Nexteer Automotive,
Saginaw, MI, USA
Revision History
| Sl. No. | Description | Author | Version | Date |
| 1 | Initial version | N. Saxton | 1.0 | 22-Jul-2015 |
Table of Contents
3.2 Global Functions(Non RTE) to be provided to Integration Project 6
4 Configuration REQUIREMeNTS 7
4.2 Configuration Files to be provided by Integration Project 7
4.3 Da Vinci Parameter Configuration Changes 7
4.4 DaVinci Interrupt Configuration Changes 7
4.5 Manual Configuration Changes 7
5 Integration DATAFLOW REQUIREMENTS 8
5.1 Required Global Data Inputs 8
5.2 Required Global Data Outputs 8
5.3 Specific Include Path present 8
Abbrevations And Acronyms
| Abbreviation | Description |
| DFD | Design functional diagram |
| MDD | Module design Document |
References
This section lists the title & version of all the documents that are referred for development of this document
| Sr. No. | Title | Version |
| 1 | Software Naming Conventions | 2.0 |
| 2 | Software Design and Coding Standards | 2.1 |
| 3 | SF038A LimrCdng FDD | See Synergy subproject version |
Dependencies
SWCs
| Module | Required Feature |
| None |
Global Functions(Non RTE) to be provided to Integration Project
None
Configuration REQUIREMeNTS
Build Time Config
| Modules | Notes | |
| FLTINJENA | Set to STD_ON for Fault Injection |
Configuration Files to be provided by Integration Project
None
Da Vinci Parameter Configuration Changes
| Parameter | Notes | SWC |
| None |
DaVinci Interrupt Configuration Changes
| ISR Name | VIM # | Priority Dependency | Notes |
| None |
Manual Configuration Changes
| Constant | Notes | SWC |
| None |
Integration DATAFLOW REQUIREMENTS
Required Global Data Inputs
Refer .m file in FDD
Required Global Data Outputs
Refer .m file in FDD
Specific Include Path present
No
Runnable Scheduling
This section specifies the required runnable scheduling.
| Init | Scheduling Requirements | Trigger |
| None |
| Runnable | Scheduling Requirements | Trigger |
| LimrCdngPer1 | None | RTE (2ms) |
Memory Map REQUIREMENTS
Mapping
| Memory Section | Contents | Notes |
| None | ||
Usage
| Feature | RAM | ROM |
| None |
Table 1: ARM Cortex R4 Memory Usage
NvM Blocks
None
Compiler Settings
Preprocessor MACRO
None
Optimization Settings
None