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Component Implementation

Component Implementation

Component Documentation

1 - ExcpnHndlg Integration Manual

Integration Manual

For

ExcpnHndlg

VERSION: 4

DATE: 04/05/16

Prepared By:

Software Group,

Nexteer Automotive,

Saginaw, MI, USA

Location: The official version of this document is stored in the Nexteer Configuration Management System.

Revision History

Sl. No.DescriptionAuthorVersionDate
1Initial versionLucas Wendling1.001/19/16
2Updated for ChkForStrtUpTest() functions and Clock Monitor FEAvinash James2.002/10/16
3Updated for DTS RAM Double bit ECC error from FENMI to SYSERRAvinash James3.003/22/16
4Updates for New FENMI Handlers for mode error and removed SPI Dbt Bit handlerAvinash James4.004/05/16

Table of Contents

1 Abbrevations And Acronyms 4

2 References 5

3 Dependencies 6

3.1 SWCs 6

3.2 Global Functions(Non RTE) to be provided to Integration Project 6

4 Configuration REQUIREMeNTS 8

4.1 Build Time Config 8

4.2 Configuration Files to be provided by Integration Project 8

4.3 Da Vinci Parameter Configuration Changes 8

4.4 DaVinci Interrupt Configuration Changes 8

4.5 Manual Configuration Changes 8

5 Integration DATAFLOW REQUIREMENTS 9

5.1 Required Global Data Inputs 9

5.2 Required Global Data Outputs 9

5.3 Specific Include Path present 9

6 Runnable Scheduling 10

7 Memory Map REQUIREMENTS 11

7.1 Mapping 11

7.2 Usage 11

7.3 NvM Blocks 11

8 Compiler Settings 12

8.1 Preprocessor MACRO 12

8.2 Optimization Settings 12

9 Appendix 13

Abbrevations And Acronyms

AbbreviationDescription

References

This section lists the title & version of all the documents that are referred for development of this document

Sr. No.TitleVersion

Dependencies

SWCs

ModuleRequired Feature

Note : Referencing the external components should be avoided in most cases. Only in unavoidable circumstance external components should be referred. Developer should track the references.

Global Functions(Non RTE) to be provided to Integration Project

SetMcuDiagcIdnData – Non-Rte Server Interface (called as needed)

GetMcuDiagcIdnData – Non-Rte Server Interface (called as needed)

SysErrIrq/Patched_SysErrIrq – Interrupt Handler Routine (triggered by Interrupt)

FpuErrIrq/Patched_FpuErrIrq – Interrupt Handler Routine (triggered by Interrupt)

AlgnErrIrq – Interrupt Handler Routine (triggered by Interrupt)

ResdOperIrq – Interrupt Handler Routine (triggered by Interrupt)

ExcpnHndlgInit1 – Non-RTE initialization function (called during startup before RTE is initialized)

FeNmiPeg – Callout function for interrupt response handling (to be called by FENMI Interrupt handler)

FeNmiDmaTrf – Callout function for interrupt response handling (to be called by FENMI Interrupt handler)

FeNmiDmaRegAcsProtnErr – Callout function for interrupt response handling (to be called by FENMI Interrupt handler)

FeNmiEcmMstChkrCmp – Callout function for interrupt response handling (to be called by FENMI Interrupt handler)

FeNmiWdg – Callout function for interrupt response handling (to be called by FENMI Interrupt handler)

ProcUkwnExcpnErr – Callout function for OS error response handling (to be called by OS error handler)

ProcMpuExcpnErr – Callout function for OS error response handling (to be called by OS error handler)

ProcPrvlgdInstrExcpnErr – Callout function for OS error response handling (to be called by OS error handler)

ProcPrmntOsErr – Callout function for OS error response handling (to be called by OS error handler)

ProcNonCritOsErr – Callout function for OS error response handling (to be called by OS error handler)

ChkForStrtUpTest_Oper – (called as needed from both RTE and non-RTE context))

FeNmiClkMonr0RtLowrLimFlt – Callout function responding to Clock Monitor 0 Runtime Lower Limit Failure(to be called by FENMI Interrupt handler)

FeNmiClkMonr0RtUpprLimFlt – Callout function responding to Clock Monitor 0 Runtime Upper Limit Failure

(to be called by FENMI Interrupt handler)

FeNmiClkMonr1RtLowrLimFlt – Callout function responding to Clock Monitor 1 Runtime Lower Limit Failure

(to be called by FENMI Interrupt handler)

FeNmiClkMonr1RtUpprLimFlt – Callout function responding to Clock Monitor 1 Runtime Upper Limit Failure

(to be called by FENMI Interrupt handler)

FeNmiClkMonr2RtLowrLimFlt – Callout function responding to Clock Monitor 2 Runtime Lower Limit Failure

(to be called by FENMI Interrupt handler)

FeNmiClkMonr2RtUpprLimFlt – Callout function responding to Clock Monitor 2 Runtime Upper Limit Failure

(to be called by FENMI Interrupt handler)

FeNmiClkMonr3RtLowrLimFlt – Callout function responding to Clock Monitor 3 Runtime Lower Limit Failure

(to be called by FENMI Interrupt handler)

FeNmiClkMonr3RtUpprLimFlt – Callout function responding to Clock Monitor 3 Runtime Upper Limit Failure

(to be called by FENMI Interrupt handler)

FeNmiOperModErrSngChipInactv – Callout function responding to Single Chip Mode inactive in Single chip mode (to be called by FENMI Interrupt handler)

FeNmiOperModErrFlsProgmModStrtd – Callout function responding to Flash programming Mode active in Single chip mode (to be called by FENMI Interrupt handler)

FeNmiOperModErrTestModStrtd – Callout function responding to Test Mode active in Single chip mode (to be called by FENMI Interrupt handler)

Configuration REQUIREMeNTS

Build Time Config

ModulesNotes

Configuration Files to be provided by Integration Project

N/A

Da Vinci Parameter Configuration Changes

ParameterNotesSWC

DaVinci Interrupt Configuration Changes

ISR NameNotes
Patched_SysErrIrqThe ExcpnHndlg module implements an interrupt that needs a patch for a hardware problem that exists on the P1M hardware (see Renesas Technical Update TN-RH8-S001A/E). Nexteer has created the appropriate workaround that subsequently calls the normal interrupt handler code. Therefore, when configuring the SysErrIrq interrupt in the O/S the interrupt handler name should be configured to the Nexteer code with the workaround (“Patched_SysErrIrq”) instead of directly referencing the normal interrupt handler code.
Patched_FpuErrIrqThe ExcpnHndlg module implements an interrupt that needs a patch for a hardware problem that exists on the P1M hardware (see Renesas Technical Update TN-RH8-S001A/E). Nexteer has created the appropriate workaround that subsequently calls the normal interrupt handler code. Therefore, when configuring the FpuErrIrq interrupt in the O/S the interrupt handler name should be configured to the Nexteer code with the workaround (“Patched_FpuErrIrq”) instead of directly referencing the normal interrupt handler code.

Manual Configuration Changes

ConstantNotesSWC

Integration DATAFLOW REQUIREMENTS

Required Global Data Inputs

Required Global Data Outputs

Specific Include Path present

Yes

Runnable Scheduling

API usage and scheduling of BSW components expected to be captured at a project architectural level and is beyond the scope of this document. Third party documentation can be referenced as needed.

InitScheduling RequirementsTrigger
ExcpnHndlgInit1Pre-RTE initializatonOnce at init
ExcpnHndlgInit2After diagnostic manager is initialized and NTCs can be setRTE initialization
RunnableScheduling RequirementsTrigger
ExcpnHndlgPer12ms

.

Memory Map REQUIREMENTS

Mapping

Memory SectionContentsNotes

* Each …START_SEC… constant is terminated by a …STOP_SEC… constant as specified in the AUTOSAR Memory Mapping requirements.

Usage

FeatureRAMROM

NvM Blocks

Compiler Settings

Preprocessor MACRO

Optimization Settings

Appendix

<This section is for appendix>

2 - ExcpnHndlg Module Design Document

Module Design Document

For

ExcpnHndlg

April 5, 2016

Prepared For:

Software Engineering

Nexteer Automotive,

Saginaw, MI, USA

Prepared By:

Software Group,

Nexteer Automotive,

Saginaw, MI, USA
Change History

DescriptionAuthorVersionDate
Initial VersionAvinash James1.005-Apr-2016


Table of Contents

1 Introduction 7

1.1 Purpose 7

1.2 Scope 7

2 ExcpnHndlg & High-Level Description 8

3 Design details of software module 9

3.1 Graphical representation of ExcpnHndlg 9

3.2 Data Flow Diagram 9

3.2.1 Component level DFD 9

3.2.2 Function level DFD 9

4 Constant Data Dictionary 10

4.1 Program (fixed) Constants 10

4.1.1 Embedded Constants 10

5 Software Component Implementation 13

5.1 Sub-Module Functions 13

5.1.1 Init: ExcpnHndlgInit1 13

5.1.1.1 Design Rationale 13

5.1.1.2 Module Outputs 13

5.1.2 Init: ExcpnHndlgInit2 13

5.1.2.1 Design Rationale 13

5.1.2.2 Module Outputs 13

5.1.3 Per: ExcpnHndlgPer1 13

5.1.3.1 Design Rationale 13

5.1.3.2 Store Module Inputs to Local copies 13

5.1.3.3 (Processing of function)……… 13

5.1.3.4 Store Local copy of outputs into Module Outputs 13

5.2 Server Runables 13

5.2.1 ChkForStrtUpTest 13

5.2.1.1 Design Rationale 13

5.2.1.2 (Processing of function)……… 13

5.2.2 FeNmiClkMonr0RtLowrLimFlt 14

5.2.2.1 Design Rationale 14

5.2.2.2 (Processing of function)……… 14

5.2.3 FeNmiClkMonr0RtUpprLimFlt 14

5.2.3.1 Design Rationale 14

5.2.3.2 (Processing of function)……… 14

5.2.4 FeNmiClkMonr1RtLowrLimFlt 14

5.2.4.1 Design Rationale 14

5.2.4.2 (Processing of function)……… 14

5.2.5 FeNmiClkMonr1RtUpprLimFlt 14

5.2.5.1 Design Rationale 14

5.2.5.2 (Processing of function)……… 14

5.2.6 FeNmiClkMonr2RtLowrLimFlt 14

5.2.6.1 Design Rationale 14

5.2.6.2 (Processing of function)……… 14

5.2.7 FeNmiClkMonr2RtUpprLimFlt 14

5.2.7.1 Design Rationale 14

5.2.7.2 (Processing of function)……… 15

5.2.8 FeNmiClkMonr3RtLowrLimFlt 15

5.2.8.1 Design Rationale 15

5.2.8.2 (Processing of function)……… 15

5.2.9 FeNmiClkMonr3RtUpprLimFlt 15

5.2.9.1 Design Rationale 15

5.2.9.2 (Processing of function)……… 15

5.2.10 FeNmiDmaTrf 15

5.2.10.1 Design Rationale 15

5.2.10.2 (Processing of function)……… 15

5.2.11 FeNmiDmaRegAcsProtnErr 15

5.2.11.1 Design Rationale 15

5.2.11.2 (Processing of function)……… 15

5.2.12 FeNmiEcmMstChkrCmp 15

5.2.12.1 Design Rationale 15

5.2.12.2 (Processing of function)……… 15

5.2.13 FeNmiOperModErrFlsProgmModStrtd 16

5.2.13.1 Design Rationale 16

5.2.13.2 (Processing of function)……… 16

5.2.14 FeNmiOperModErrSngChipInactv 16

5.2.14.1 Design Rationale 16

5.2.14.2 (Processing of function)……… 16

5.2.15 FeNmiOperModErrTestModStrtd 16

5.2.15.1 Design Rationale 16

5.2.15.2 (Processing of function)……… 16

5.2.16 FeNmiPeg 16

5.2.16.1 Design Rationale 16

5.2.16.2 (Processing of function)……… 16

5.2.17 FeNmiWdg 16

5.2.17.1 Design Rationale 16

5.2.17.2 (Processing of function)……… 16

5.2.18 GetMcuDiagcIdnData 17

5.2.18.1 Design Rationale 17

5.2.18.2 (Processing of function)……… 17

5.2.19 ProcMpuExcpnErr 17

5.2.19.1 Design Rationale 17

5.2.19.2 (Processing of function)……… 17

5.2.20 ProcNonCritOsErr 17

5.2.20.1 Design Rationale 17

5.2.20.2 (Processing of function)……… 17

5.2.21 ProcPrmntOsErr 17

5.2.21.1 Design Rationale 17

5.2.21.2 (Processing of function)……… 17

5.2.22 ProcPrvlgdInstrExcpnErr 17

5.2.22.1 Design Rationale 17

5.2.22.2 (Processing of function)……… 17

5.2.23 ProcUkwnExcpnErr 18

5.2.23.1 Design Rationale 18

5.2.23.2 (Processing of function)……… 18

5.2.24 SetMcuDiagcIdnData 18

5.2.24.1 Design Rationale 18

5.2.24.2 (Processing of function)……… 18

5.3 Interrupt Functions 18

5.3.1 AlgnErrIrq 18

5.3.1.1 Design Rationale 18

5.3.1.2 (Processing of the ISR function)….. 18

5.3.2 FpuErrIrq 18

5.3.2.1 Design Rationale 18

5.3.2.2 (Processing of the ISR function)….. 18

5.3.3 SysErrIrq 18

5.3.3.1 Design Rationale 18

5.3.3.2 (Processing of the ISR function)….. 18

5.3.4 ResdOperIrq 19

5.3.4.1 Design Rationale 19

5.3.4.2 (Processing of the ISR function)….. 19

5.4 Module Internal (Local) Functions 19

5.4.1 ProcStrtUpOrSwRst 19

5.4.1.1 Design Rationale 19

5.4.1.2 Processing 19

5.4.2 ProcEcmRst 19

5.4.2.1 Design Rationale 19

5.4.2.2 Processing 19

5.4.3 ProcPinRst 19

5.4.3.1 Design Rationale 20

5.4.3.2 Processing 20

5.5 GLOBAL Function/Macro Definitions 20

5.5.1 GLOBAL Function #1 20

5.5.1.1 Design Rationale 20

5.5.1.2 processing 20

6 Known Limitations with Design 21

7 UNIT TEST CONSIDERATION 22

Appendix A Abbreviations and Acronyms 23

Appendix B Glossary 24

Appendix C References 25

Introduction

Purpose

This document details the design in the FDD and also lists out any deviations which were made from the design for the implementation due to any constraints in development. ExcpnHndlg MDD describes the exception handling / reset cause determination for microcontroller diagnostics

Scope

The following definitions are used throughout this document:

  • Shall: indicates a mandatory requirement without exception in compliance.

  • Should: indicates a mandatory requirement; exceptions allowed only with documented justification.

  • May: indicates an optional action.

ExcpnHndlg & High-Level Description

Refer FDD

Design details of software module

Graphical representation of ExcpnHndlg

Data Flow Diagram

Component level DFD

N/A

Function level DFD

N/A

Constant Data Dictionary

Program (fixed) Constants

Embedded Constants

Local Constants

Constant NameResolutionUnitsValue
FPCFGININVAL_CNT_T_U321Counts0x0000001CU
FPCFGREGID_CNT_S321Counts10
FPCFGSELNID_CNT_S321Counts0
FPUINVLDOPERSTSBIT_CNT_U321Counts((uint32)(0x00004000U))
FPUDIVBYZEROSTSBIT_CNT_U321Counts((uint32)(0x00002000U))
FPUOVFSTSBIT_CNT_U321Counts((uint32)(0x00001000U))
MEMERRINFOREADWRBIT_CNT_U321Counts((uint32)(0x00000001U))
CF1STERSTRADRPARMASK_CNT_U321Counts((uint32)(0x00000004U))
CF1STERSTRDBLBITMASK_CNT_U321Counts((uint32)(0x00000002U))
CF1STERSTRSNGBITMASK_CNT_U321Counts((uint32)(0x00000001U))
PRPHLBUSDATAPARMASK_CNT_U321Counts((uint32)(0x10000000U))
DTSDBLBITMASK_CNT_U321Counts((uint32)(0x80000000U))
CODFLSSNGBITHARDFLT_CNT_U081Counts1U
CODFLSECCDBLBIT_CNT_U081Counts2U
CODFLSADRPAR_CNT_U081Counts4U
MEMBISTSTRTUPTESTFAILR_CNT_U081Counts1U
LCLRAMECCSNGBITHARDFLT_CNT_U081Counts1U
LCLRAMECCDBLBIT_CNT_U081Counts2U
INVLDRAMAREA_CNT_U081Counts4U
DTSDBLBIT_CNT_U081Counts2U
SPI0PRPHLRAMDBLBIT_CNT_U081Counts2U
SPI1PRPHLRAMDBLBIT_CNT_U081Counts2U
SPI2PRPHLRAMDBLBIT_CNT_U081Counts2U
SPI3PRPHLRAMDBLBIT_CNT_U081Counts2U
BISTCODECCFAILR_CNT_U081Counts1U
LOGLBISTSTRTUPTESTFAILR_CNT_U081Counts4U
BISTNOTCMPL_CNT_U081Counts16U
CPULOCKSTEPSTRTUPTESTFAILR_CNT_U081Counts32U
LOCKSTEPCOMP_CNT_U081Counts1U
SYSVCIE_CNT_U081Counts2U
RESDOPER_CNT_U081Counts4U
ALGNREAD_CNT_U081Counts8U
ALGNWR_CNT_U081Counts16U
INSTRFETCH_CNT_U081Counts32U
CLKMONR0RTLOWRLIMFLT_CNT_U081Counts4U
CLKMONR0RTUPPRLIMFLT_CNT_U081Counts8U
CLKMONR2RTLOWRLIMFLT_CNT_U081Counts64U
CLKMONR2RTUPPRLIMFLT_CNT_U081Counts128U
OPERMODERRFLSPROGMMODSTRTD_CNT_U081Counts1U
OPERMODERRTESTMODSTRTD_CNT_U081Counts2U
OPERMODERRSNGCHIPINACTV_CNT_U081Counts4U
CLKMONR1RTLOWRLIMFLT_CNT_U081Counts4U
CLKMONR1RTUPPRLIMFLT_CNT_U081Counts8U
CLKMONR3RTLOWRLIMFLT_CNT_U081Counts64U
CLKMONR3RTUPPRLIMFLT_CNT_U081Counts128U
DATAPROTNERR_CNT_U081Counts1U
INSTRPROTNERR_CNT_U081Counts2U
ECMSTSFLT_CNT_U081Counts1U
ECMMSTSTRTUPTESTFAILR_CNT_U081Counts4U
ECMCHKRSTRTUPTESTFAILR_CNT_U081Counts8U
ECMRTMSTCHKRCOMPFLT_CNT_U081Counts128U
FPUINVLDOPEREXCPN_CNT_U081Counts2U
FPUDIVBYZEROEXCPN_CNT_U081Counts4U
FPUOVFEXCPN_CNT_U081Counts8U
FPUUKWNEXCPN_CNT_U081Counts16U
UKWNRST_CNT_U081Counts1U
UKWNECMRST_CNT_U081Counts2U
UKWNSWRST_CNT_U081Counts16U
BACKUPRAMTSTFAILR_CNT_U081Counts32U
FLSBTLDRPREOSSRTUPEXCPN_CNT_U081Counts64U
STRTUPRSTINFOFAILD_CNT_U081Counts128U
PROGFLOW_CNT_U081Counts1U
DEADLINEMONR_CNT_U081Counts2U
ALVMONR_CNT_U081Counts4U
WDGTOUT_CNT_U081Counts1U
PEGRTFLT_CNT_U081Counts2U
IPGRTFLT_CNT_U081Counts8U
PBGSTRTUPTSTAILR_CNT_U081Counts16U
PBGRTFLT_CNT_U081Counts32U
DBGRST_CNT_U081Counts1U
OSCRITFLT_CNT_U081Counts1U
UKWNEXCPN_CNT_U081Counts2U
OSNONCRITFLT_CNT_U081Counts1U
DMATRFERR_CNT_U081Counts1U
DMAREGACSPROTCNERR_CNT_U081Counts2U
PRPHLBUSDATAPARSTRTUPFLT_CNT_U081Counts64U
PRPHLBUSDATAPARPRTFLT_CNT_U081Counts128U
CVMOVERVLTGSTRTUPTESTFAILR_CNT_U081Counts1U
CVMUNDERVLTGSTRTUPTESTFAILR_CNT_U081Counts2U
INTCVMOVERVLTGMONR_CNT_U081Counts1U
INTCVMUNDERVLTGMONR_CNT_U081Counts2U
INTMONRLOVCCFLT_CNT_U081Counts16U
EXTVLTGMONRFLT_CNT_U081Counts128U
UPPR16BITMASK_CNT_U321Counts((uint32)(0xFFFF0000U))
LOWR16BITMASK_CNT_U321Counts((uint32)(0x0000FFFFU))

Software Component Implementation

Sub-Module Functions

Init: ExcpnHndlgInit1

Design Rationale

Non-RTE function because it needs to be called before the OS is started - so that floating point exceptions can be enabled before anything uses floating point

Module Outputs

None

Init: ExcpnHndlgInit2

Design Rationale

RTE function to initialize all the NTCs to pass

Module Outputs

None

Per: ExcpnHndlgPer1

Design Rationale

RTE Periodic function called every 2 ms to check for OS errors

Store Module Inputs to Local copies

Refer MDD

(Processing of function)………

Triggered on Timing Event every 2ms

Store Local copy of outputs into Module Outputs

None

Server Runables

ChkForStrtUpTest

Design Rationale

Refer FDD

(Processing of function)………

Refer FDD

FeNmiClkMonr0RtLowrLimFlt

Design Rationale

Refer FDD

(Processing of function)………

Refer FDD

FeNmiClkMonr0RtUpprLimFlt

Design Rationale

Refer FDD

(Processing of function)………

Refer FDD

FeNmiClkMonr1RtLowrLimFlt

Design Rationale

Refer FDD

(Processing of function)………

Refer FDD

FeNmiClkMonr1RtUpprLimFlt

Design Rationale

Refer FDD

(Processing of function)………

Refer FDD

FeNmiClkMonr2RtLowrLimFlt

Design Rationale

Refer FDD

(Processing of function)………

Refer FDD

FeNmiClkMonr2RtUpprLimFlt

Design Rationale

Refer FDD

(Processing of function)………

Refer FDD

FeNmiClkMonr3RtLowrLimFlt

Design Rationale

Refer FDD

(Processing of function)………

Refer FDD

FeNmiClkMonr3RtUpprLimFlt

Design Rationale

Refer FDD

(Processing of function)………

Refer FDD

FeNmiDmaTrf

Design Rationale

Refer FDD

(Processing of function)………

Refer FDD

FeNmiDmaRegAcsProtnErr

Design Rationale

Refer FDD

(Processing of function)………

Refer FDD

FeNmiEcmMstChkrCmp

Design Rationale

Refer FDD

(Processing of function)………

Refer FDD

FeNmiOperModErrFlsProgmModStrtd

Design Rationale

Refer FDD

(Processing of function)………

Refer FDD

FeNmiOperModErrSngChipInactv

Design Rationale

Refer FDD

(Processing of function)………

Refer FDD

FeNmiOperModErrTestModStrtd

Design Rationale

Refer FDD

(Processing of function)………

Refer FDD

FeNmiPeg

Design Rationale

Refer FDD

(Processing of function)………

Refer FDD

FeNmiWdg

Design Rationale

Refer FDD

(Processing of function)………

Refer FDD

GetMcuDiagcIdnData

Design Rationale

Refer FDD

(Processing of function)………

Refer FDD

ProcMpuExcpnErr

Design Rationale

Refer FDD

(Processing of function)………

Refer FDD

ProcNonCritOsErr

Design Rationale

Refer FDD

(Processing of function)………

Refer FDD

ProcPrmntOsErr

Design Rationale

Refer FDD

(Processing of function)………

Refer FDD

ProcPrvlgdInstrExcpnErr

Design Rationale

Refer FDD

(Processing of function)………

Refer FDD

ProcUkwnExcpnErr

Design Rationale

Refer FDD

(Processing of function)………

Refer FDD

SetMcuDiagcIdnData

Design Rationale

Refer FDD

(Processing of function)………

Refer FDD

Interrupt Functions

AlgnErrIrq

Design Rationale

Refer FDD

(Processing of the ISR function)…..

Refer FDD

FpuErrIrq

Design Rationale

Refer FDD

(Processing of the ISR function)…..

Refer FDD

SysErrIrq

Design Rationale

Refer FDD

(Processing of the ISR function)…..

Refer FDD

ResdOperIrq

Design Rationale

Refer FDD

(Processing of the ISR function)…..

Refer FDD

Module Internal (Local) Functions

ProcStrtUpOrSwRst

Function NameProcStrtUpOrSwRstTypeMinMax
Arguments PassedNone
Return ValueNA

Design Rationale

Refer FDD

Processing

ProcEcmRst

Function NameProcEcmRstTypeMinMax
Arguments PassedNone
Return ValueNA

Design Rationale

Refer FDD

Processing

ProcPinRst

Function NameProcPinRstTypeMinMax
Arguments PassedNone
Return ValueNA

Design Rationale

Refer FDD

Processing

GLOBAL Function/Macro Definitions

<If these are numerous and defined in a separate source file then reference the source file only.>

GLOBAL Function #1

Function Name(Exact name used)TypeMinMax
Arguments Passed(if none, write None)<Refer MDD guidelines[1]><Refer MDD guidelines[1]><Refer MDD guidelines[1]>
(Insert more rows for additional passed arguments)
Return Value(if no value returned, write N/A)

Design Rationale

processing

(Place flowchart/design for local function)

Known Limitations with Design

None

UNIT TEST CONSIDERATION

None

Abbreviations and Acronyms

Abbreviation or AcronymDescription

Glossary

Note: Terms and definitions from the source “Nexteer Automotive” take precedence over all other definitions of the same term. Terms and definitions from the source “Nexteer Automotive” are formulated from multiple sources, including the following:

  • ISO 9000

  • ISO/IEC 12207

  • ISO/IEC 15504

  • Automotive SPICE® Process Reference Model (PRM)

  • Automotive SPICE® Process Assessment Model (PAM)

  • ISO/IEC 15288

  • ISO 26262

  • IEEE Standards

  • SWEBOK

  • PMBOK

  • Existing Nexteer Automotive documentation

TermDefinitionSource
MDDModule Design Document
DFDData Flow Diagram

References

Ref. #TitleVersion
1AUTOSAR Specification of Memory Mapping (Link:AUTOSAR_SWS_MemoryMapping.pdf)v1.3.0 R4.0 Rev 2
2MDD GuidelineEA4 01.00.01
3Software Naming Conventions.doc1.0
4Software Design and Coding Standards.doc2.1

3 - ExcpnHndlg Peer Review Checklists

Overview

Summary Sheet
Synergy Project
Src - ExcpnHndlgNonRte
Src - ExcpnHndlgIrq
Src - ExcpnHndlg
MDD
PolySpace
Integration Manual

Sheet 1: Summary Sheet
























Rev 1.28-Jun-15

Peer Review Summary Sheet


























Synergy Project Name:


kzshz2: Intended Use: Identify which component is being reviewed. This should be the Module Short Name from Synergy Rationale: Required for traceability. It will help to ensure this form is not attaced to the the wrong change request. CM101A_ExcpnHndlg_Impl
Revision / Baseline:


kzshz2: Intended Use: Identify which Synergy revision of this component is being reviewed Rationale: Required for traceability. It will help to ensure this form is not attaced to the the wrong change request. CM101A_ExcpnHndlg_Impl_3.0.0

























Change Owner:


kzshz2: Intended Use: Identify the developer who made the change(s) Rationale: A change request may have more than one resolver, this will help identify who made what change. Change owner identification may be required by indusrty standards. Avinash James
Work CR ID:


EA4#5099





























kzshz2: Intended Use: Intended to identify at a high level to the reviewers which areas of the component have been changed. Rationale: This will be good information to know when ensuring appropriate reviews have been completed. Modified File Types:















































































































































































kzshz2: Intended Use: Identify who where the reviewers, what they reviewed, and if the reviewed changes have been approved to release the code for testing. Comments here should be at a highlevel, the specific comments should be present on the specific review form sheet. Rationale: Since this Form will be attached to the Change Request it will confirm the approval and provides feedback in case of audits. ADD DR Level Move reviewer and approval to individual checklist form Review Checklist Summary:






















































Reviewed:































YesMDD


YesSource Code


YesPolySpace









































YesIntegration Manual


N/ADavinci Files








































































Comments:






























































































General Guidelines:
- The reviews shall be performed over the portions of the component that were modified as a result of the Change Request.
- New components should include FDD Owner and Integrator as apart of the Group Review Board (Source Code, Integration Manual, and Davinci Files)
- Enter any rework required into the comment field and select No. When the rework is complete, review again using this same review sheet and select Yes. Add date and additional comment stating that the rework is completed.
- To review a component with multiple source code files use the "Add Source" button to create a Source code tab for each source file.
- .h file should be reviewed with the source file as part of the source file.




















Sheet 2: Synergy Project

Peer Review Meeting Log (Component Synergy Project Review)



















































Quality Check Items:




































Rationale is required for all answers of No










New baseline version name from Summary Sheet follows








Yes
Comments:



naming convention





































Project contains necessary subprojects








Yes
Comments:










































Project contains the correct version of subprojects








Yes
Comments:










































Design subproject is correct version








Yes
Comments:











































General Notes / Comments:



























































LN: Intended Use: Identify who were the reviewers and if the reviewed changes have been approved. Rationale: Since this Form will be attached to the Change Request it will confirm the approval and provides feedback in case of audits. KMC: Group Review Level removed in Rev 4.0 since the design review is not checked in until approved, so it would always be DR4. Review Board:


























Change Owner:

Avinash James


Review Date :

04/06/16
































Lead Peer Reviewer:


Selva Sengottaiyan


Approved by Reviewer(s):



Yes































Other Reviewer(s):









































































Sheet 3: Src - ExcpnHndlgNonRte






















Rev 1.28-Jun-15
Peer Review Meeting Log (Source Code Review)

























Source File Name:


CDD_ExcpnHndlgNonRte.c

Source File Revision:


6
Header File Name:


CDD_ExcpnHndlg.h

Header File Revision:


kzshz2: Intended Use: Identify which version of the source file is being review. Rationale: Required for traceability between source code and review. Auditors will likely require this. 5

























MDD Name:

ExcpnHndlg Module Design Document.docx

Revision:
1

























FDD/SCIR/DSR/FDR/CM Name:




CM101A_ExcpnHndlg_Design

Revision:
3.0.1


























Quality Check Items:



































Rationale is required for all answers of No









Working EA4 Software Naming Convention followed:















































for variable names







N/A
Comments:

















































for constant names







Yes
Comments:

















































for function names







Yes
Comments:

















































for other names (component, memory







N/A
Comments:










mapping handles, typedefs, etc.)




































All paths assign a value to outputs, ensuring








N/A
Comments:









all outputs are initialized prior to being written





































Requirements Tracability tags in code match the requirements tracability in the FDD








N/A
Comments:

No traceability in FDD






requirements tracability in the FDD





































All variables are declared at the function level.








N/A
Comments:
























Synergy version matches change history





kzshz2: Intended Use: Indicate that the the versioning was confirmed by the peer reviewer(s). Rationale: There have been many occassions where versions were not updated in files and as a result Unit Test were referencing wrong versions. This often time leads to the need to re-run of batch tests.


Yes
Comments:



and Version Control version in file comment block





































Change log contains detailed description of changes








Yes
Comments:



and Work CR number





































Code accurately implements FDD (Document or Model)








Yes
Comments:










































Verified no Compiler Errors or Warnings


KMC: Intended Use: To confirm no compiler errors or warnings exist for the code under review (warnings from contract header files may be ignored). Rationale: This is needed to ensure there will be no errors discovered at the time of integration. A Sandox project should be used; QAC can find compiler errors but not warnings.





Yes
Comments:
















































Component.h is included








N/A
Comments:
























All other includes are actually needed. (System includes








Yes
Comments:









only allowed in Nexteer library components)





































Software Design and Coding Standards followed:











Version: 2.1

























Code comments are clear, correct, and adequate







Yes
Comments:










and have been updated for the change: [N40] and













all other rules in the same section as rule [N40],






















plus [N75], [N12], [N23], [N33], [N37], [N38],






















[N48], [N54], [N77], [N79], [N72]














































Source file (.c and .h) comment blocks are per







Yes
Comments:










standards and contain correct information: [N41], [N42]





































Function comment blocks are per standards and







Yes
Comments:










contain correct information: [N43]





































Code formatting (indentation, placement of







Yes
Comments:










braces, etc.) is per standards: [N5], [N55], [N56],













[N57], [N58], [N59]














































Embedded constants used per standards; no







N/A
Comments:










"magic numbers": [N12]





































Memory mapping for non-RTE code







N/A
Comments:










is per standard





































All execution-order-dependent code can be







N/A
Comments:










recognized by the compiler: [N80]





































All loops have termination conditions that ensure







N/A
Comments:










finite loop iterations: [N63]





































All divides protect against divide by zero







N/A
Comments:










if needed: [N65]





































All integer division and modulus operations







N/A
Comments:










handle negative numbers correctly: [N76]





































All typecasting and fixed point arithmetic,







N/A
Comments:










including all use of fixed point macros and













timer functions, is correct and has no possibility






















of unintended overflow or underflow: [N66]














































All float-to-unsiged conversions ensure the.







N/A
Comments:










float value is non-negative: [N67]





































All conversions between signed and unsigned







N/A
Comments:










types handle msb==1 as intended: [N78]





































All pointer dereferencing protects against







N/A
Comments:










null pointer if needed: [N70]





































Component outputs are limited to the legal range







N/A
Comments:










defined in the FDD DataDict.m file : [N53]





































All code is mapped with FDD (all FDD







N/A
Comments:










subfunctions and/or model blocks identified













with code comments; all code corresponds to






















some FDD subfunction and/or model block): [N40]













































Review did not identify violations of other








Yes
Comments:









coding standard rules





































Anomaly or Design Work CR created








N/A
Comments: List Anomaly or CR numbers









for any FDD corrections needed































































General Notes / Comments:
















































Changes only reviewed































LN: Intended Use: Identify who were the reviewers and if the reviewed changes have been approved. Rationale: Since this Form will be attached to the Change Request it will confirm the approval and provides feedback in case of audits. KMC: Group Review Level removed in Rev 4.0 since the design review is not checked in until approved, so it would always be DR4. Review Board:


























Change Owner:

Avinash James


Review Date :

04/06/16
































Lead Peer Reviewer:


Selva Sengottaiyan


Approved by Reviewer(s):



Yes































Other Reviewer(s):









































































Sheet 4: Src - ExcpnHndlgIrq






















Rev 1.28-Jun-15
Peer Review Meeting Log (Source Code Review)

























Source File Name:


CDD_ExcpnHndlgIrq.c

Source File Revision:


5
Header File Name:


CDD_ExcpnHndlg.h

Header File Revision:


kzshz2: Intended Use: Identify which version of the source file is being review. Rationale: Required for traceability between source code and review. Auditors will likely require this. 5

























MDD Name:

ExcpnHndlg Module Design Document.docx

Revision:
1

























FDD/SCIR/DSR/FDR/CM Name:




CM101A_ExcpnHndlg_Design

Revision:
3.0.1


























Quality Check Items:



































Rationale is required for all answers of No









Working EA4 Software Naming Convention followed:















































for variable names







N/A
Comments:

















































for constant names







Yes
Comments:

















































for function names







N/A
Comments:

















































for other names (component, memory







N/A
Comments:










mapping handles, typedefs, etc.)




































All paths assign a value to outputs, ensuring








N/A
Comments:









all outputs are initialized prior to being written





































Requirements Tracability tags in code match the requirements tracability in the FDD








N/A
Comments:









requirements tracability in the FDD





































All variables are declared at the function level.








N/A
Comments:
























Synergy version matches change history





kzshz2: Intended Use: Indicate that the the versioning was confirmed by the peer reviewer(s). Rationale: There have been many occassions where versions were not updated in files and as a result Unit Test were referencing wrong versions. This often time leads to the need to re-run of batch tests.


Yes
Comments:



and Version Control version in file comment block





































Change log contains detailed description of changes








Yes
Comments:



and Work CR number





































Code accurately implements FDD (Document or Model)








Yes
Comments:










































Verified no Compiler Errors or Warnings


KMC: Intended Use: To confirm no compiler errors or warnings exist for the code under review (warnings from contract header files may be ignored). Rationale: This is needed to ensure there will be no errors discovered at the time of integration. A Sandox project should be used; QAC can find compiler errors but not warnings.





Yes
Comments:
















































Component.h is included








N/A
Comments:
























All other includes are actually needed. (System includes








N/A
Comments:









only allowed in Nexteer library components)





































Software Design and Coding Standards followed:











Version: 2.1

























Code comments are clear, correct, and adequate







Yes
Comments:










and have been updated for the change: [N40] and













all other rules in the same section as rule [N40],






















plus [N75], [N12], [N23], [N33], [N37], [N38],






















[N48], [N54], [N77], [N79], [N72]














































Source file (.c and .h) comment blocks are per







Yes
Comments:










standards and contain correct information: [N41], [N42]





































Function comment blocks are per standards and







Yes
Comments:










contain correct information: [N43]





































Code formatting (indentation, placement of







Yes
Comments:










braces, etc.) is per standards: [N5], [N55], [N56],













[N57], [N58], [N59]














































Embedded constants used per standards; no







Yes
Comments:










"magic numbers": [N12]





































Memory mapping for non-RTE code







N/A
Comments:










is per standard





































All execution-order-dependent code can be







N/A
Comments:










recognized by the compiler: [N80]





































All loops have termination conditions that ensure







N/A
Comments:










finite loop iterations: [N63]





































All divides protect against divide by zero







N/A
Comments:










if needed: [N65]





































All integer division and modulus operations







N/A
Comments:










handle negative numbers correctly: [N76]





































All typecasting and fixed point arithmetic,







Yes
Comments:










including all use of fixed point macros and













timer functions, is correct and has no possibility






















of unintended overflow or underflow: [N66]














































All float-to-unsiged conversions ensure the.







N/A
Comments:










float value is non-negative: [N67]





































All conversions between signed and unsigned







N/A
Comments:










types handle msb==1 as intended: [N78]





































All pointer dereferencing protects against







N/A
Comments:










null pointer if needed: [N70]





































Component outputs are limited to the legal range







N/A
Comments:










defined in the FDD DataDict.m file : [N53]





































All code is mapped with FDD (all FDD







Yes
Comments:










subfunctions and/or model blocks identified













with code comments; all code corresponds to






















some FDD subfunction and/or model block): [N40]













































Review did not identify violations of other








Yes
Comments:









coding standard rules





































Anomaly or Design Work CR created








N/A
Comments: List Anomaly or CR numbers









for any FDD corrections needed































































General Notes / Comments:
















































Reviewed only the changes































LN: Intended Use: Identify who were the reviewers and if the reviewed changes have been approved. Rationale: Since this Form will be attached to the Change Request it will confirm the approval and provides feedback in case of audits. KMC: Group Review Level removed in Rev 4.0 since the design review is not checked in until approved, so it would always be DR4. Review Board:


























Change Owner:

Avinash James


Review Date :

04/06/16
































Lead Peer Reviewer:


Selva Sengottaiyan


Approved by Reviewer(s):



Yes































Other Reviewer(s):









































































Sheet 5: Src - ExcpnHndlg






















Rev 1.28-Jun-15
Peer Review Meeting Log (Source Code Review)

























Source File Name:


CDD_ExcpnHndlg.c

Source File Revision:


3
Header File Name:


CDD_ExcpnHndlg.h, CDD_ExcpnHndlg_private.h

Header File Revision:


kzshz2: Intended Use: Identify which version of the source file is being review. Rationale: Required for traceability between source code and review. Auditors will likely require this. 5,1

























MDD Name:

ExcpnHndlg Module Design Document.docx

Revision:
1

























FDD/SCIR/DSR/FDR/CM Name:




CM101A_ExcpnHndlg_Design

Revision:
3.0.1


























Quality Check Items:



































Rationale is required for all answers of No









Working EA4 Software Naming Convention followed:















































for variable names







N/A
Comments:

















































for constant names







Yes
Comments:

















































for function names







N/A
Comments:

















































for other names (component, memory







N/A
Comments:










mapping handles, typedefs, etc.)




































All paths assign a value to outputs, ensuring








N/A
Comments:









all outputs are initialized prior to being written





































Requirements Tracability tags in code match the requirements tracability in the FDD








N/A
Comments:
No Links in FDD







requirements tracability in the FDD





































All variables are declared at the function level.








N/A
Comments:
























Synergy version matches change history





kzshz2: Intended Use: Indicate that the the versioning was confirmed by the peer reviewer(s). Rationale: There have been many occassions where versions were not updated in files and as a result Unit Test were referencing wrong versions. This often time leads to the need to re-run of batch tests.


Yes
Comments:



and Version Control version in file comment block





































Change log contains detailed description of changes








Yes
Comments:



and Work CR number





































Code accurately implements FDD (Document or Model)








Yes
Comments:










































Verified no Compiler Errors or Warnings


KMC: Intended Use: To confirm no compiler errors or warnings exist for the code under review (warnings from contract header files may be ignored). Rationale: This is needed to ensure there will be no errors discovered at the time of integration. A Sandox project should be used; QAC can find compiler errors but not warnings.





Yes
Comments:
















































Component.h is included








N/A
Comments:
























All other includes are actually needed. (System includes








N/A
Comments:









only allowed in Nexteer library components)





































Software Design and Coding Standards followed:











Version: 2.1

























Code comments are clear, correct, and adequate







Yes
Comments:










and have been updated for the change: [N40] and













all other rules in the same section as rule [N40],






















plus [N75], [N12], [N23], [N33], [N37], [N38],






















[N48], [N54], [N77], [N79], [N72]














































Source file (.c and .h) comment blocks are per







Yes
Comments:










standards and contain correct information: [N41], [N42]





































Function comment blocks are per standards and







Yes
Comments:










contain correct information: [N43]





































Code formatting (indentation, placement of







Yes
Comments:










braces, etc.) is per standards: [N5], [N55], [N56],













[N57], [N58], [N59]














































Embedded constants used per standards; no







Yes
Comments:










"magic numbers": [N12]





































Memory mapping for non-RTE code







N/A
Comments:










is per standard





































All execution-order-dependent code can be







Yes
Comments:










recognized by the compiler: [N80]





































All loops have termination conditions that ensure







N/A
Comments:










finite loop iterations: [N63]





































All divides protect against divide by zero







N/A
Comments:










if needed: [N65]





































All integer division and modulus operations







N/A
Comments:










handle negative numbers correctly: [N76]





































All typecasting and fixed point arithmetic,







N/A
Comments:










including all use of fixed point macros and













timer functions, is correct and has no possibility






















of unintended overflow or underflow: [N66]














































All float-to-unsiged conversions ensure the.







N/A
Comments:










float value is non-negative: [N67]





































All conversions between signed and unsigned







N/A
Comments:










types handle msb==1 as intended: [N78]





































All pointer dereferencing protects against







Yes
Comments:










null pointer if needed: [N70]





































Component outputs are limited to the legal range







N/A
Comments:










defined in the FDD DataDict.m file : [N53]





































All code is mapped with FDD (all FDD







Yes
Comments:










subfunctions and/or model blocks identified













with code comments; all code corresponds to






















some FDD subfunction and/or model block): [N40]













































Review did not identify violations of other








Yes
Comments:









coding standard rules





































Anomaly or Design Work CR created








N/A
Comments: List Anomaly or CR numbers









for any FDD corrections needed































































General Notes / Comments:


























Consider in future if we want to put some sort of ifdef around each #define enum value for possible incompatible redefinitions and to avoid redefinitions (future rev)



























































LN: Intended Use: Identify who were the reviewers and if the reviewed changes have been approved. Rationale: Since this Form will be attached to the Change Request it will confirm the approval and provides feedback in case of audits. KMC: Group Review Level removed in Rev 4.0 since the design review is not checked in until approved, so it would always be DR4. Review Board:


























Change Owner:

Avinash James


Review Date :

04/06/16
































Lead Peer Reviewer:


Selva Sengottaiyan


Approved by Reviewer(s):



Yes































Other Reviewer(s):









































































Sheet 6: MDD






















Rev 1.28-Jun-15
Peer Review Meeting Log (MDD Review)


























MDD Name:








ExcpnHndlg Module Design Document.docx






MDD Revision:

1


























Source File Name:


CDD_ExcpnHndlgIrq.c











Source File Revision:


5

Source File Name:


CDD_ExcpnHndlg.c











Source File Revision:


3

Source File Name:


CDD_ExcpnHndlgNonRte.c











Source File Revision:


6


























Quality Check Items:




































Rationale is required for all answers of No










Synergy version matches document








Yes
Comments:













































Change log contains detailed description of changes








Yes
Comments:













































Changes Highlighted (for Unit Tester)








N/A
Comments:

Initial Version










































Diagrams have been included per MDD Guideline








Yes
Comments:











and reviewed






































All Design Exceptions and Limitations are listed








Yes
Comments:



















































Design rationale given for all global








Yes
Comments:











data not communicated through RTE ports, per














Design and Coding Standards rules [N9] and [N10].















































All implementation details that differ from the FDD are








Yes
Comments:











noted and explained in Design Rationale






































All Unit Test Considerations have been described








Yes
Comments:



















































General Notes / Comments:



























































LN: Intended Use: Identify who were the reviewers and if the reviewed changes have been approved. Rationale: Since this Form will be attached to the Change Request it will confirm the approval and provides feedback in case of audits. KMC: Group Review Level removed in Rev 4.0 since the design review is not checked in until approved, so it would always be DR4. Review Board:


























Change Owner:

Avinash James


Review Date :

04/06/16
































Lead Peer Reviewer:


Selva Sengottaiyan


Approved by Reviewer(s):



Yes































Other Reviewer(s):









































































Sheet 7: PolySpace






















Rev 1.28-Jun-15
Peer Review Meeting Log (QAC/PolySpace Review)


























Source File Name:


CDD_ExcpnHndlgIrq.c











Source File Revision:


5

Source File Name:


CDD_ExcpnHndlg.c











Source File Revision:


3

Source File Name:


CDD_ExcpnHndlgNonRte.c











Source File Revision:


6

Source File Name:















Source File Revision:






























EA4 Static Analysis Compliance Guideline version:







01.01.00














Poly Space version:


Windows User: eg. 2013b 2013B
Polyspace sub project version:




Windows User: eg. TL108a_PolyspaceSuprt_1.0.0 NA

QAC version:


Windows User: eg 8.1.1-R 8.1.1-R
QAC sub project version:




Windows User: eg. TL_100A_1.1.0 1.2.0


























Quality Check Items:




































Rationale is required for all answers of No



































Contract Folder's header files are appropriate and





kzshz2: Intended Use: Identify that the contract folder contains only the information required for this component. All other variables, constants, function prototypes, etc. should be removed. Rationale: This will help avoid unit testers having to considers object not used. It will also avoid having other files required for QAC.


Yes
Comments:




function prototypes match the latest component version







































100% Compliance to the EA4 Static AnalysisYes
Comments:





Compliance Guideline





























Are previously added justification and deviation








Yes
Comments:





comments still appropriate






































Do all MISRA deviation comments use approved








Yes
Comments:





deviation tags






































Cyclomatic complexity and Static path count OK






Creager, Kathleen: use Browse Function Metrics, STCYC and STPTH

No
Comments:

see comments below


for all functions in the component per Design














and Coding Standards rule [N47]

































































































General Notes / Comments:























Rule 3.4 - pragma comments are pesent in CDD_ExcpnHndlgIrq.c - reviewed and ok

Rule 17.4 - array subscripting -- allowed per compliance guideline

red check -- ok -- intentional non-terminating loop in NxtrSwRst functions in MicroCtrlSuprt component

Rule 2.1 - new deviation agreed upon for assembly code needed for errata workaround

Function ProcStrtUpOrSwRst() has complexity 65 and path count 65, because of a 65-case switch stmt. No change needed - this is conceptually less complex than

splitting up the function































LN: Intended Use: Identify who were the reviewers and if the reviewed changes have been approved. Rationale: Since this Form will be attached to the Change Request it will confirm the approval and provides feedback in case of audits. KMC: Group Review Level removed in Rev 4.0 since the design review is not checked in until approved, so it would always be DR4. Review Board:


























Change Owner:

Avinash James


Review Date :

04/06/16
































Lead Peer Reviewer:


Selva Sengottaiyan


Approved by Reviewer(s):



Yes































Other Reviewer(s):









































































Sheet 8: Integration Manual






















Rev 1.28-Jun-15
Peer Review Meeting Log (Integration Manual Review)


























Integration Manual Name:



kzshz2: Intended Use: Identify which file is being reviewed Rationale: Required for traceability. It will help to ensure this sheet is not attached to the wrong design review form. ExcpnHndlg Integration Manual.doc

Integration Manual Revision:



kzshz2: Intended Use: Identify which version of the integration manual has been reviewed. Rationale: Required for traceability between the MDD and review. Auditors will likely require this. 4





























Quality Check Items:




































Rationale is required for all answers of No










Synergy version matches header








Yes
Comments:










































Latest template used








Yes
Comments:










































Change log contains detailed description of changes








Yes
Comments:










































Changes Highlighted (for Integrator)








Yes
Comments:











































General Notes / Comments:



























































LN: Intended Use: Identify who were the reviewers and if the reviewed changes have been approved. Rationale: Since this Form will be attached to the Change Request it will confirm the approval and provides feedback in case of audits. KMC: Group Review Level removed in Rev 4.0 since the design review is not checked in until approved, so it would always be DR4. Review Board:


























Change Owner:

Avinash James


Review Date :

04/06/16
































Lead Peer Reviewer:


Selva Sengottaiyan


Approved by Reviewer(s):



Yes































Other Reviewer(s):