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Component Design

Component Design

Module Detailled Design

Component Documentation

1 - CM475A_TSG31RegisterConfiguration

Overview

FieldNames
Registers

Sheet 1: FieldNames


RegisterField NamesAddress
(Hex)		Address
(Dec)		SettingSetting DescriptionRequirementModeNotesInitPeriodic
Write Constraints














41TSG31IOC0TOE6

1Enables control of TSG3nO6 to TSG3nO1 by rewriting TSG3nIOC2
Any



Can be written at field or register level
42TSG31IOC0TOE5

1Enables control of TSG3nO6 to TSG3nO1 by rewriting TSG3nIOC2
Any



Can be written at field or register level
43TSG31IOC0TOE4

1Enables control of TSG3nO6 to TSG3nO1 by rewriting TSG3nIOC2
Any



Can be written at field or register level
44TSG31IOC0TOE3

1Enables control of TSG3nO6 to TSG3nO1 by rewriting TSG3nIOC2
Any



Can be written at field or register level
45TSG31IOC0TOE2

1Enables control of TSG3nO6 to TSG3nO1 by rewriting TSG3nIOC2
Any



Can be written at field or register level
46TSG31IOC0TOE1

1Enables control of TSG3nO6 to TSG3nO1 by rewriting TSG3nIOC2
Any



Can be written at field or register level

Sheet 2: Registers

Data
Sheet
Order		NameSymbolAddressReload
313029282726252423222120191817161514131211109876543210







































1TSG3n control register 0TSG3nCTL0208HDisabledConfig8 bit RegisterReservedTSG3nDWDReservedTSG3nMD[2:0]
1TSG3n control register 0TSG3nCTL0208HDisabledInit























00000001Select HT-PWM Mode
2TSG3n control register 1TSG3nCTL120CHDisabledConfig16 bit RegisterReservedTBA2TBA1TAB0PPCPECTDCNDCPRCTSG3nPTC[1:0]
2TSG3n control register 1TSG3nCTL120CHDisabledInit















0000001110000000Enable detection of simultaneous pins on
3TSG3n control register 2TSG3nCTL2780HDisabledConfigReservedCKS
3TSG3n control register 2TSG3nCTL2780HDisabledInit00000000000000000000000000000000Selects PCLK as count clock
4TSG3n control register 3TSG3nCTL3004HDisabledConfig8 bit RegisterReservedRIARMC
4TSG3n control register 3TSG3nCTL3004HDisabledInit























00000000Set Reload mode, location set by CTL4
5TSG3n control register 4TSG3nCTL407CHEnabledConfigReservedPREVREPIEVIERCC
5TSG3n control register 4TSG3nCTL407CHEnabledInit00000000000000000000000010000000Reload at Valley, no interrupts
6TSG3n control register 5TSG3nCTL5008HDisabledConfig16 bit RegisterReservedACCAT09AT08AT07AT06AT05AT04AT03AT02AT01AT00
6TSG3n control register 5TSG3nCTL5008HDisabledInit















0000000000000100Enables ADTRG0 on DCMP0E incrementing
7TSG3n control register 6TSG3nCTL600CHDisabledConfig16 bit RegisterReservedACCAT19AT18AT07AT06AT05AT04AT03AT02AT01AT00
7TSG3n control register 6TSG3nCTL600CHDisabledInit















0000000000000100Enables ADTRG0 on DCMP0E incrementing
8TSG3n control register 7TSG3nCTL7218HDisabledConfig8 bit RegisterReservedSPSTL2SPSTL1SPSTLO
8TSG3n control register 7TSG3nCTL7218HDisabledInit















0000000000000000N/A for HT-PWM Mode
9TSG3n control register 8TSG3nCTL821CHDisabledConfig8 bit RegisterReserved120DCMC
9TSG3n control register 8TSG3nCTL821CHDisabledInit















0000000000000000N/A for HT-PWM Mode
10TSG3n I/O control register 0TSG3nIOC0200HDisabledConfig8 bit RegisterReservedTOE6TOE5TOE4TOE3TOE2TOE1Reserved
10TSG3n I/O control register 0TSG3nIOC0200HDisabledInit
































11TSG3n I/O control register 1TSG3nIOC1204HDisabledConfig8 bit RegisterReservedPTSEOCWOCTGSTOS
11TSG3n I/O control register 1TSG3nIOC1204HDisabledInit
































12TSG3n I/O control register 2TSG3nIOC2000HDisabledConfig16 bit RegisterReservedOL6OL5OL4OL3OL2OL1RESERVEDTO6TO5TO4TO3TO2TO1RESERVED
12TSG3n I/O control register 2TSG3nIOC2000HDisabledInit
































13TSG3n I/O control register 3TSG3nIOC3074HEnabledConfigRESERVEDTOL6TOL5TOL4TOL3TOL2TOL1RESERVED
13TSG3n I/O control register 3TSG3nIOC3074HEnabledInit
































14TSG3n status register 0TSG3nSTR0010HDisabledConfig8 bit RegisterReservedCUFSUFRSFTE
14TSG3n status register 0TSG3nSTR0010HDisabledInit
































15TSG3n status register 1TSG3nSTR1014HDisabledConfig8 bit RegisterReservedTSFOPF[2:0]
15TSG3n status register 1TSG3nSTR1014HDisabledInit
































16TSG3n status register 2TSG3nSTR2018HDisabledConfig16 bit RegisterReservedTBF2TBF1TBF0PPFPEFTDFNDFPRFPTFRESERVED
16TSG3n status register 2TSG3nSTR2018HDisabledInit
































17TSG3n status clear trigger registerTSG3nSTC01CHDisabledConfig16 bit RegisterReservedTBR2TBR1TBR0PPRPERTDRNDRPRRPTRRESERVED
17TSG3n status clear trigger registerTSG3nSTC01CHDisabledInit
































18TSG3n option register 0TSG3nOPT0020HDisabledConfig8 bit RegisterReservedSOCSTEPOTPSSIDCPSCRESERVED
18TSG3n option register 0TSG3nOPT0020HDisabledInit
































19TSG3n option register 1TSG3nOPT1024HDisabledConfig8 bit RegisterReservedSPC[2:0]
19TSG3n option register 1TSG3nOPT1024HDisabledInit
































20TSG3n trigger register 0TSG3nTRG0030HDisabledConfig8 bit RegisterReservedTS
20TSG3n trigger register 0TSG3nTRG0030HDisabledInit
































21TSG3n trigger register 1TSG3nTRG1034HDisabledConfig8 bit RegisterReservedTT
21TSG3n trigger register 1TSG3nTRG1034HDisabledInit
































22TSG3n trigger register 2TSG3nTRG2038HDisabledConfig8 bit RegisterReservedIMT
22TSG3n trigger register 2TSG3nTRG2038HDisabledInit
































23TSG3n counter read buffer registerTSG3nCNT028HDisabledConfig16 bit RegisterLOWER 16 BITS OF 18 BIT COUNTER
23TSG3n counter read buffer registerTSG3nCNT028HDisabledInit
































24TSG3n bit extended counter read buffer registerTSG3nCNTE1A0HDisabledConfigRESERVED18 BIT COUNTER
24TSG3n bit extended counter read buffer registerTSG3nCNTE1A0HDisabledInit
































25TSG3n sub-counter read buffer registerTSG3nSBC02CHDisabledConfig16 bit RegisterLOWER 16 BITS OF 18 BIT SUB COUNTER
25TSG3n sub-counter read buffer registerTSG3nSBC02CHDisabledInit
































26TSG3n bit extended sub-counter read buffer registerTSG3nSBCE1A4HDisabledConfigRESERVED18 BIT SUB COUNTER
26TSG3n bit extended sub-counter read buffer registerTSG3nSBCE1A4HDisabledInit
































27TSG3n compare register 0TSG3nCMP0058HEnabledConfig16 bit RegisterLOWER 16 BITS OF 18 BIT COMPARE REGISTER
27TSG3n compare register 0TSG3nCMP0058HEnabledInit
































28TSG3n bit extended compare register 0TSG3nCMP0E14CHEnabledConfigRESERVED18 BIT COMPARE REGISTER
28TSG3n bit extended compare register 0TSG3nCMP0E14CHEnabledInit
































29TSG3n compare register 1, 2TSG3nCMP1W040HEnabledConfigLOWER 16 BITS OF COMPARE 2LOWER 16 BITS OF COMPARE 1
29TSG3n compare register 1, 2TSG3nCMP1W040HEnabledInit
































32TSG3n compare register 3, 4TSG3nCMP3W04CHEnabledConfigLOWER 16 BITS OF COMPARE 4LOWER 16 BITS OF COMPARE 3
32TSG3n compare register 3, 4TSG3nCMP3W04CHEnabledInit
































30TSG3n compare register 5, 6TSG3nCMP5W044HEnabledConfigLOWER 16 BITS OF COMPARE 6LOWER 16 BITS OF COMPARE 5
30TSG3n compare register 5, 6TSG3nCMP5W044HEnabledInit
































33TSG3n compare register 7, 8TSG3nCMP7W050HEnabledConfigLOWER 16 BITS OF COMPARE 8LOWER 16 BITS OF COMPARE 7
33TSG3n compare register 7, 8TSG3nCMP7W050HEnabledInit
































31TSG3n compare register 9, 10TSG3nCMP9W048HEnabledConfigLOWER 16 BITS OF COMPARE 10LOWER 16 BITS OF COMPARE 9
31TSG3n compare register 9, 10TSG3nCMP9W048HEnabledInit
































34TSG3n compare register 11, 12TSG3nCMP11W054HEnabledConfigLOWER 16 BITS OF COMPARE 12LOWER 16 BITS OF COMPARE 11
34TSG3n compare register 11, 12TSG3nCMP11W054HEnabledInit
































35TSG3n compare register 1TSG3nCMP1080HEnabledConfigRESERVEDLOWER 16 BITS OF COMPARE 1
35TSG3n compare register 1TSG3nCMP1080HEnabledInit
































36TSG3n compare register 2TSG3nCMP2084HEnabledConfigRESERVEDLOWER 16 BITS OF COMPARE 2
36TSG3n compare register 2TSG3nCMP2084HEnabledInit
































37TSG3n compare register 3TSG3nCMP3098HEnabledConfigRESERVEDLOWER 16 BITS OF COMPARE 3
37TSG3n compare register 3TSG3nCMP3098HEnabledInit
































38TSG3n compare register 4TSG3nCMP409CHEnabledConfigRESERVEDLOWER 16 BITS OF COMPARE 4
38TSG3n compare register 4TSG3nCMP409CHEnabledInit
































39TSG3n compare register 5TSG3nCMP5088HEnabledConfigRESERVEDLOWER 16 BITS OF COMPARE 5
39TSG3n compare register 5TSG3nCMP5088HEnabledInit
































40TSG3n compare register 6TSG3nCMP608CHEnabledConfigRESERVEDLOWER 16 BITS OF COMPARE 6
40TSG3n compare register 6TSG3nCMP608CHEnabledInit
































41TSG3n compare register 7TSG3nCMP70A0HEnabledConfigRESERVEDLOWER 16 BITS OF COMPARE 7
41TSG3n compare register 7TSG3nCMP70A0HEnabledInit
































42TSG3n compare register 8TSG3nCMP80A4HEnabledConfigRESERVEDLOWER 16 BITS OF COMPARE 8
42TSG3n compare register 8TSG3nCMP80A4HEnabledInit
































43TSG3n compare register 9TSG3nCMP9090HEnabledConfigRESERVEDLOWER 16 BITS OF COMPARE 9
43TSG3n compare register 9TSG3nCMP9090HEnabledInit
































44TSG3n compare register 10TSG3nCMP10094HEnabledConfigRESERVEDLOWER 16 BITS OF COMPARE 10
44TSG3n compare register 10TSG3nCMP10094HEnabledInit
































45TSG3n compare register 11TSG3nCMP110A8HEnabledConfigRESERVEDLOWER 16 BITS OF COMPARE 11
45TSG3n compare register 11TSG3nCMP110A8HEnabledInit
































46TSG3n compare register 12TSG3nCMP120ACHEnabledConfigRESERVEDLOWER 16 BITS OF COMPARE 12
46TSG3n compare register 12TSG3nCMP120ACHEnabledInit
































47TSG3n bit extended compare register 1TSG3nCMP1E17CHEnabledConfigRESERVEDEXTENDED COMPARE 1
47TSG3n bit extended compare register 1TSG3nCMP1E17CHEnabledInit
































48TSG3n bit extended compare register 2TSG3nCMP2E178HEnabledConfigRESERVEDEXTENDED COMPARE 2
48TSG3n bit extended compare register 2TSG3nCMP2E178HEnabledInit
































49TSG3n bit extended compare register 3TSG3nCMP3E164HEnabledConfigRESERVEDEXTENDED COMPARE 3
49TSG3n bit extended compare register 3TSG3nCMP3E164HEnabledInit
































50TSG3n bit extended compare register 4TSG3nCMP4E160HEnabledConfigRESERVEDEXTENDED COMPARE 4
50TSG3n bit extended compare register 4TSG3nCMP4E160HEnabledInit
































51TSG3n bit extended compare register 5TSG3nCMP5E174HEnabledConfigRESERVEDEXTENDED COMPARE 5
51TSG3n bit extended compare register 5TSG3nCMP5E174HEnabledInit
































52TSG3n bit extended compare register 6TSG3nCMP6E170HEnabledConfigRESERVEDEXTENDED COMPARE 6
52TSG3n bit extended compare register 6TSG3nCMP6E170HEnabledInit
































53TSG3n bit extended compare register 7TSG3nCMP7E15CHEnabledConfigRESERVEDEXTENDED COMPARE 7
53TSG3n bit extended compare register 7TSG3nCMP7E15CHEnabledInit
































54TSG3n bit extended compare register 8TSG3nCMP8E158HEnabledConfigRESERVEDEXTENDED COMPARE 8
54TSG3n bit extended compare register 8TSG3nCMP8E158HEnabledInit
































55TSG3n bit extended compare register 9TSG3nCMP9E16CHEnabledConfigRESERVEDEXTENDED COMPARE 9
55TSG3n bit extended compare register 9TSG3nCMP9E16CHEnabledInit
































56TSG3n bit extended compare register 10TSG3nCMP10E168HEnabledConfigRESERVEDEXTENDED COMPARE 10
56TSG3n bit extended compare register 10TSG3nCMP10E168HEnabledInit
































57TSG3n bit extended compare register 11TSG3nCMP11E154HEnabledConfigRESERVEDEXTENDED COMPARE 11
57TSG3n bit extended compare register 11TSG3nCMP11E154HEnabledInit
































58TSG3n bit extended compare register 12TSG3nCMP12E150HEnabledConfigRESERVEDEXTENDED COMPARE 12
58TSG3n bit extended compare register 12TSG3nCMP12E150HEnabledInit
































59TSG3n diagnostic output compare register 0, 1TSG3nDCMP0W05CHEnabledConfigLOWER 16 BITS OF DCMP1ELOWER 16 BITS OF DCMP0E
59TSG3n diagnostic output compare register 0, 1TSG3nDCMP0W05CHEnabledInit
































60TSG3n diagnostic output compare register 2TSG3nDCMP2060HEnabledConfigRESERVEDLOWER 16 BITS OF DCMP2E
60TSG3n diagnostic output compare register 2TSG3nDCMP2060HEnabledInit
































61TSG3n bit extended diagnostic output compare register 0TSG3nDCMP0E148HEnabledConfigRESERVEDEXTENDED DIAGNOSTIC OUTPUT COMPARE 0
61TSG3n bit extended diagnostic output compare register 0TSG3nDCMP0E148HEnabledInit
































62TSG3n bit extended diagnostic output compare register 1TSG3nDCMP1E144HEnabledConfigRESERVEDEXTENDED DIAGNOSTIC OUTPUT COMPARE 1
62TSG3n bit extended diagnostic output compare register 1TSG3nDCMP1E144HEnabledInit
































63TSG3n bit extended diagnostic output compare register 2TSG3nDCMP2E140HEnabledConfigRESERVEDEXTENDED DIAGNOSTIC OUTPUT COMPARE 2
63TSG3n bit extended diagnostic output compare register 2TSG3nDCMP2E140HEnabledInit
































64TSG3n pattern register 0TSG3nPAT0W064HEnabledConfigRESERVEDPAT5TPAT4TPAT3TPAT2TPAT1TPAT0T
64TSG3n pattern register 0TSG3nPAT0W064HEnabledInit
































65TSG3n pattern register 1TSG3nPAT1W068HEnabledConfigRESERVEDPAT5BPAT4BPAT3BPAT2BPAT1BPAT0B
65TSG3n pattern register 1TSG3nPAT1W068HEnabledInit
































66TSG3n dead time control register 0TSG3nDTC0W06CHEnabledConfigRESERVEDWRITE PROTECTION CODE CHECKRESERVEDDTC0 - DEAD TIME COMPARE
66TSG3n dead time control register 0TSG3nDTC0W06CHEnabledInit
































67TSG3n dead time control register 1TSG3nDTC1W070HEnabledConfigRESERVEDWRITE PROTECTION CODE CHECKRESERVEDDTC1 - DEAD TIME COMPARE
67TSG3n dead time control register 1TSG3nDTC1W070HEnabledInit
































68TSG3n HT-PWM U phase compare registerTSG3nCMPU0B0HEnabledConfig16 bit RegisterLOWER 16 BITS OF CMPUE
68TSG3n HT-PWM U phase compare registerTSG3nCMPU0B0HEnabledInit
































69TSG3n HT-PWM V phase compare registerTSG3nCMPV0B4HEnabledConfig16 bit RegisterLOWER 16 BITS OF CMPVE
69TSG3n HT-PWM V phase compare registerTSG3nCMPV0B4HEnabledInit
































70TSG3n HT-PWM W phase compare registerTSG3nCMPW0B8HEnabledConfig16 bit RegisterLOWER 16 BITS OF CMPWE
70TSG3n HT-PWM W phase compare registerTSG3nCMPW0B8HEnabledInit
































71TSG3n bit extended HT-PWM U phase compare registerTSG3nCMPUE188HEnabledConfigRESERVEDEXTENDED U PHASE COMPARE
71TSG3n bit extended HT-PWM U phase compare registerTSG3nCMPUE188HEnabledInit
































72TSG3n bit extended HT-PWM V phase compare registerTSG3nCMPVE184HEnabledConfigRESERVEDEXTENDED V PHASE COMPARE
72TSG3n bit extended HT-PWM V phase compare registerTSG3nCMPVE184HEnabledInit
































73TSG3n bit extended HT-PWM W phase compare registerTSG3nCMPWE180HEnabledConfigRESERVEDEXTENDED W PHASE COMPARE
73TSG3n bit extended HT-PWM W phase compare registerTSG3nCMPWE180HEnabledInit
































74TSG3n SP-PWM U phase active width registerTSG3nUPW0BCHEnabledConfig16 bit RegisterLOWER 16 BITS OF EXTENDED U PHASE ACTIVE WIDTH
74TSG3n SP-PWM U phase active width registerTSG3nUPW0BCHEnabledInit
































75TSG3n SP-PWM V phase active width registerTSG3nVPW0C0HEnabledConfig16 bit RegisterLOWER 16 BITS OF EXTENDED V PHASE ACTIVE WIDTH
75TSG3n SP-PWM V phase active width registerTSG3nVPW0C0HEnabledInit
































76TSG3n SP-PWM W phase active width registerTSG3nWPW0C4HEnabledConfig16 bit RegisterLOWER 16 BITS OF EXTENDED W PHASE ACTIVE WIDTH
76TSG3n SP-PWM W phase active width registerTSG3nWPW0C4HEnabledInit
































77TSG3n bit extended SP-PWM U phase active width registerTSG3nUPWE198HEnabledConfigRESERVEDEXTENDED U PHASE ACTIVE WIDTH
77TSG3n bit extended SP-PWM U phase active width registerTSG3nUPWE198HEnabledInit
































78TSG3n bit extended SP-PWM V phase active width registerTSG3nVPWE194HEnabledConfigRESERVEDEXTENDED V PHASE ACTIVE WIDTH
78TSG3n bit extended SP-PWM V phase active width registerTSG3nVPWE194HEnabledInit
































79TSG3n bit extended SP-PWM W phase active width registerTSG3nWPWE190HEnabledConfigRESERVEDEXTENDED W PHASE ACTIVE WIDTH
79TSG3n bit extended SP-PWM W phase active width registerTSG3nWPWE190HEnabledInit
































80TSG3n HSP-PWM W phase shift registerTSG3nHSPSHWE120HEnabledConfigRESERVEDEXTENDED PWM MODE W PHASE SHIFT REGISTER
80TSG3n HSP-PWM W phase shift registerTSG3nHSPSHWE120HEnabledInit
































81TSG3n HSP-PWM V phase shift registerTSG3nHSPSHVE124HEnabledConfigRESERVEDEXTENDED PWM MODE V PHASE SHIFT REGISTER
81TSG3n HSP-PWM V phase shift registerTSG3nHSPSHVE124HEnabledInit
































82TSG3n HSP-PWM U phase shift registerTSG3nHSPSHUE128HEnabledConfigRESERVEDEXTENDED PWM MODE U PHASE SHIFT REGISTER
82TSG3n HSP-PWM U phase shift registerTSG3nHSPSHUE128HEnabledInit
































83TSG3n HSP-PWM W phase compare registerTSG3nHSPCMWE12CHEnabledConfigRESERVEDEXTENDED PWM MODE W PHASE COMPARE REGISTER
83TSG3n HSP-PWM W phase compare registerTSG3nHSPCMWE12CHEnabledInit
































84TSG3n HSP-PWM V phase compare registerTSG3nHSPCMVE130HEnabledConfigRESERVEDEXTENDED PWM MODE V PHASE COMPARE REGISTER
84TSG3n HSP-PWM V phase compare registerTSG3nHSPCMVE130HEnabledInit
































85TSG3n HSP-PWM U phase compare registerTSG3nHSPCMUE134HEnabledConfigRESERVEDEXTENDED PWM MODE U PHASE COMPARE REGISTER
85TSG3n HSP-PWM U phase compare registerTSG3nHSPCMUE134HEnabledInit
































86TSG3n dead time protection registerTSG3nDTPR210HDisabledConfig16 bit RegisterDTCMWROTE PROTECTION CODE CHECK
86TSG3n dead time protection registerTSG3nDTPR210HDisabledInit
































2 - CM475A TSG31 DFMEA

Overview

Detailed Drawing
IOBlock
Sheet3

Sheet 1: Detailed Drawing


Sheet 2: IOBlock


Sheet 3: Sheet3

OutputFailureFunctional EffectSystem Response
AdcStrtOfCnvn2Stuck OnMultiple 2mSec ADC reads, ADC accuracy degredation
AdcStrtOfCnvn2Stuck OffNo 2mSec ADC, values stuck at last value
AdcStrtOfCnvnMotCtrlPeakStuck OnMultiple MtrCtrl ADC reads, Multiple MtrCtrlISRs, Processor starvation
AdcStrtOfCnvnMotCtrlPeakStuck OffNo MtrCtrlADC read, loss of MtrCtrlISR
AdcStrtOfCnvnMotCtrlVlyStuck OnMultiple MtrCtrl Valley ADC reads, ADC accuracy degredation
AdcStrtOfCnvnMotCtrlVlyStuck OffNo MtrCtrl Valley ADC reads, loss of shunt current
DmaMotPosnSpiStrtStuck OnMulitple MtrPos SPI starts, DMA starvation - delayed data
DmaMotPosnSpiStrtStuck OffNo SPI based MtrPos reads
DMATSG31UpdateStuck OnContinually update TSG31 updates, DMA starvation (extinguished)
DMATSG31UpdateStuck OffNo TSG31 updates, stuck on last value
DmaVlyTrigStuck OnDMA starvation
DmaVlyTrigStuck OffLoss of interloop data transfer, data stuck at last value
DataTrfToMotCtrl1MilliSecStuck OnDMA starvation
DataTrfToMotCtrl1MilliSecStuck OffLoss of interloop data transfer, data stuck at last value
DataTrfTo2MilliSecMotCtrlStuck OnDMA starvation
DataTrfTo2MilliSecMotCtrlStuck OffLoss of interloop data transfer, data stuck at last value
DataTrfTo1MilliSecMotCtrlStuck OnDMA starvation
DataTrfTo1MilliSecMotCtrlStuck OffLoss of interloop data transfer, data stuck at last value
PhaALowrCmdStuck OnWrong output torque
PhaALowrCmdStuck OffWrong output torque
PhaALowrCmdLoss of deadtimeBridge shoot through
PhaAUpprCmdStuck OnWrong output torque
PhaAUpprCmdStuck OffWrong output torque
PhaAUpprCmdLoss of deadtimeBridge shoot through
PhaBLowrCmdStuck OnWrong output torque
PhaBLowrCmdStuck OffWrong output torque
PhaBLowrCmdLoss of deadtimeBridge shoot through
PhaBUpprCmdStuck OnWrong output torque
PhaBUpprCmdStuck OffWrong output torque
PhaBUpprCmdLoss of deadtimeBridge shoot through
PhaCLowrCmdStuck OnWrong output torque
PhaCLowrCmdStuck OffWrong output torque
PhaCLowrCmdLoss of deadtimeBridge shoot through
PhaCUpprCmdStuck OnWrong output torque
PhaCUpprCmdStuck OffWrong output torque
PhaCUpprCmdLoss of deadtimeBridge shoot through