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Component Design

Component Design

Component Documentation

Reports

1 - SF028A_AssiHiFrq_Peer Review Checklist Design

Nexteer_Template_V1.0

Overview

Peer Review Instructions
Technical Review Checklist
Template Change Log

Sheet 1: Peer Review Instructions

Instructions for Functional Design Package Peer Review




PRE-MEETING


Function OwnerConfirm that requirements are reviewed and approved PRIOR to the FDP peer review

Function OwnerStart with latest version of the template for any "first reviews" - Continue to use existing temmplate for re-reviews

Function OwnerProvide the functional design package (changed documents) to the invited attendees 1-2 working days in advance of review

Function OwnerNotify the assigned peer reviewer and make sure they are prepared to do their function in the meeting

Function OwnerIdentify necessary attendance and invite to meeting

Function OwnerComplete the "Author" column information for sections 1 through 3 prior to the review

Function OwnerComplete the attendance invitation list in section 5

Function OwnerFor Re-reviews only: Complete the column "remarks by author" to identify actions taken to address items found in earlier reviews.



DURING MEETING


Function OwnerPresent document changes to the review team

Peer ReviewerCapture attendance of the review

Peer ReviewerCapture actions and issues in section 4. Identify issue summary, Document type, Reference (Requirement ID, section number, etc), Defect Type and indicate status as "OPEN"



POST MEETING


Function OwnerFollow up on all "open" items. Update "Summary of Resolution" to indicate what was done or decided.

Function OwnerSchedule follow up review OR review open items with peer reviewer and obtain agreement to close

Peer ReviewerClose change request in system and confirm all associated tasks are complete. Upload peer review checklist (this document) with any FDP updates

Sheet 2: Technical Review Checklist

Technical Review Checklist - Template Version 02.00.00







Product NameElectric Power SteeringElectrical Arch.4Review ScopeDefect TypeNumbers




YesClosedFR
Function IDSF028A_AssiHiFrq

Update model to EA4 standards.Requirement0




NoRejectedFDD
Long NameHigh Frequency Assist

Interface0




NAOpenModel
Version that you started from. NOT the version you hope to release. If this will be v1.0.0, enter NA. Starting Baseline1.0.1EffortDesign0






FMEA
AuthorSneha SinghReview Effort(Hrs.)
Standards0






*.m File


Corr+Verf effort(Hrs.)
Documentation1






Cal Process


Total Effort (Hrs.)
Others0













Total1







Checklist No.Description of CheckAuthor: This column is for Self review. Author shall fill Yes/No/NA against each point in checklist. AuthorAuthor: This column is for reviewer. Reviewer shall fill Yes/No/NA against each point in checklist. ReviewerAuthor: Detailed Description of the finding shall be provided by the reviewer. Description of finding by reviewerAuthor: Defect type to be selected. Defect TypeAuthor: What action is taken to fix the comment & other remarks need to be filled by author. Remarks By AuthorAuthor: Data in this column shall be filled by reviewer after checking whether the rework is completed. Status







1Section 1: Data Dictionary














Is Filename of Data Dictionary in correct format?YesYes












Is the FDD.Version property correctly updated?YesNoNeeds to be updated to match modelDocumentation
Closed








Is the Data Dictionary Verification report error free?YesYes












Does FDD Long Name, Short Name, and Description match requirements?YesYes












Are all runnables defined?YesYes












Do runnables have the correct time step?YesYes












Do server runnables correctly define arguments?NANA

No Server runnables









Are all clients defined?NANA

No Clients









Do client definitions match the corresponding server runnable?NoNo












Does name and metadata of every signal match its corresponding interface signal?YesYes












Do output signal ranges match requirements (check DOOR min/max attributes too)?NANA












Are calibration tables named correctly (e.g. AssiX and AssiY)?YesYes












Do all calibrations have correct values for all metadata?YesYes












Are calibration tables named correctly (e.g. AssiX and AssiY)?YesYes












Is NVM defined in the appropriate number of blocks?NANA

No NVM defined









Are constants defined with proper scope (local vs global)?YesYes












Are all dependent constants and calibrations included in one file?YesYes



























2Section 2: ModelAuthor: This column is for Self review. Author shall fill Yes/No/NA against each point in checklist. AuthorAuthor: This column is for reviewer. Reviewer shall fill Yes/No/NA against each point in checklist. ReviewerAuthor: Detailed Description of the finding shall be provided by the reviewer. Description of finding by reviewerAuthor: Defect type to be selected. Defect TypeAuthor: What action is taken to fix the comment & other remarks need to be filled by author. Remarks By AuthorAuthor: Data in this column shall be filled by reviewer after checking whether the rework is completed. Status








Is filename of model in correct format?YesYes












Is Top level of model annotated with Requirements Baseline?YesYes












Is the Top level of the model annotated with Tool Dependencies?YesYes












Is Top level of model annotated with Change Log or History?YesYes












Does the Component shortname match data dictionary FDD metadata?YesYes












Is the 2nd level of model free from subsystems that are not Function-Call Subsystems?YesYes












Is the 2nd level of model free from arithmetic and logic operations?YesYes











Are the Runnable trigger signals named as "call_<Runnable>"?NANA












Does 2nd level of model have a properly updated annotation with name, description, and intended baseline number?YesYes












Are all data flow layers free of Function-Call Subsystems and Memory Store blocks?YesYes












Does the Model have the confidentiality and copyright information inside all its Subsystems?YesYes












Are all the Memory Store blocks for PIM and Display Variables located on the 2nd level of model?YesYes












Do all Memory Store blocks for PIM and Display Variables have the "Data store name must resolve to Simulink signal object" setting checked to true?YesYes












Is each diagnostic (NTC) capable of being set to "PASS"?NANA

No NTCs









Does non-zero intialization of PIM occur in the function's Init runnable?NANA

No non-zero intialization of PIMs in the model









Does design properly include Set Ram Block Status when NVM RAM values change?NANA

No NVM defined









Does model include appropriate logic for dealing with missing or corrupted NVM data?NANA

No NVM defined









Does model execute without errors/warnings after loading NxtrMBDConfig configuration set?NoNo

Warnings are acceptable
























3Section 3: Requirements LinkingAuthor: This column is for Self review. Author shall fill Yes/No/NA against each point in checklist. AuthorAuthor: This column is for reviewer. Reviewer shall fill Yes/No/NA against each point in checklist. ReviewerAuthor: Detailed Description of the finding shall be provided by the reviewer. Description of finding by reviewerAuthor: Defect type to be selected. Defect TypeAuthor: What action is taken to fix the comment & other remarks need to be filled by author. Remarks By AuthorAuthor: Data in this column shall be filled by reviewer after checking whether the rework is completed. Status








Are all requirements links of the format <FDDNumber>_<ObjectID>?YesYes












Does requirements HTML report reference only the DOORS module of this component for all links in the design?NANA












Are linked blocks linked to the correct requirements(s)? (watch for problems due to copy/pasted blocks)YesYes












Is the list of unlinked blocks acceptable?YesYes



























4Section 4: Model AdvisorAuthor: This column is for Self review. Author shall fill Yes/No/NA against each point in checklist. AuthorAuthor: This column is for reviewer. Reviewer shall fill Yes/No/NA against each point in checklist. ReviewerAuthor: Detailed Description of the finding shall be provided by the reviewer. Description of finding by reviewerAuthor: Defect type to be selected. Defect TypeAuthor: What action is taken to fix the comment & other remarks need to be filled by author. Remarks By AuthorAuthor: Data in this column shall be filled by reviewer after checking whether the rework is completed. Status








Was Model Advisor run with the correct configuration settings?YesYes












Is the Model Advisor rerport free from "Fails".YesYes












Are Model Advisor report "Warnings" acceptable?YesYes



























5Section 5: Delivery PackageAuthor: This column is for Self review. Author shall fill Yes/No/NA against each point in checklist. AuthorAuthor: This column is for reviewer. Reviewer shall fill Yes/No/NA against each point in checklist. ReviewerAuthor: Detailed Description of the finding shall be provided by the reviewer. Description of finding by reviewerAuthor: Defect type to be selected. Defect TypeAuthor: What action is taken to fix the comment & other remarks need to be filled by author. Remarks By AuthorAuthor: Data in this column shall be filled by reviewer after checking whether the rework is completed. Status








Does Design folder contain only the model, data dictionary, and (optionally) a simulation setup script?YesYes












Does Doc folder contain a zipped HTML webview model?YesYes












Does Reports folder contain only the data dictionary verification report, zipped Model Advisor report, and zipped requirements traceability report?NoNo



























6Section 6: Other Issus/Actions IdentifiedDocumentReferenceSummary of resolutionAuthor: Defect type to be selected. Defect TypeAuthor: What action is taken to fix the comment & other remarks need to be filled by author. Remarks By AuthorAuthor: Data in this column shall be filled by reviewer after checking whether the rework is completed. Status























































































































































































































































































































































































































7Section 7: APPROVALS













RoleFirst ReviewDateAttendanceApproval?










Function Owner*Qi Wang / Sneha Singh6/2/2016












Peer Reviewer*Price Lefler












Safety<Name - if invited>












Software<Name - if invited>












ESG / Systems<Name - if invited>












EPDT / CSE<Name - if invited>












Hardware<Name - if invited>












Test<Name - if invited>












RoleSecond Review (if required)DateAttendanceApproval?










Function Owner*<Owner Name>













Peer Reviewer*<Name - if invited>












Safety<Name - if invited>












Software<Name - if invited>












ESG / Systems<Name - if invited>












EPDT / CSE<Name - if invited>












Hardware<Name - if invited>












Test<Name - if invited>












RoleThird Review (if required)DateAttendanceApproval?










Function Owner*<Owner Name>













Peer Reviewer*<Name>












Safety<Name - if invited>












Software<Name - if invited>












ESG / Systems<Name - if invited>












EPDT / CSE<Name - if invited>












Hardware<Name - if invited>












Test<Name - if invited>












RoleFourth Review (if required)DateAttendanceApproval?










Function Owner*<Owner Name>













Peer Reviewer*<Name>












Safety<Name - if invited>












Software<Name - if invited>












ESG / Systems<Name - if invited>












EPDT / CSE<Name - if invited>












Hardware<Name - if invited>












Test<Name - if invited>












RoleAdd more if necessaryDateAttendanceApproval?










































P.S.:Yes indicates adherence














No indicates non-adherence, reviewer shall provide suitable comments at the end of this document for each point.














NA indicates not applicable













Sheet 3: Template Change Log

RevChangeAuthor


























































































2 - SF028A_AssiHiFrq_ModelAdvisorReport

Model Advisor Report for 'SF028A_AssiHiFrq'
Model Advisor Report - SF028A_AssiHiFrq.slx
Simulink version: 8.2Model version: 1.4
System: SF028A_AssiHiFrqCurrent run: 02-Jun-2016 10:25:24
67 items with a timestamp different than 02-Jun-2016 10:25:24Model Advisor configuration: ...NxtrModelAdvisorConfig.mat

Run Summary
PassFailWarningNot RunTotal
   56   0   12   132200


By Task

    Code Generation Efficiency

 Check optimization settings (02-Jun-2016 10:22:47)

You should turn on the following optimization(s):

  • Block reduction
  • Remove code from floating-point to integer conversions that wraps out-of-range values
  • Inline invariant signals
  • The Solver data inconsistency diagnostic is enabled. Because this diagnostic can increase the time it takes to simulate your model, you should consider turning it off, by setting its value to none.
  • The Array bounds exceeded diagnostic is enabled. Because this diagnostic can increase the time it takes to simulate your model, you should consider turning it off, by setting its value to none.
  • The Simulation range checking diagnostic is enabled. Because this diagnostic can increase the time it takes to simulate your model, you should consider turning it off, by setting its value to none.
  • Ignore testpoints when generating code
  • Pass reusable subsystem outputs as individual arguments



    •     Frequency Response Estimation

        Managing Data Store Memory Blocks

        Managing Library Links And Variants

        Model Referencing

        Modeling Guidelines for MISRA-C:2004

        Modeling Physical Systems

        Modeling Signals and Parameters using Buses

        Modeling Single-Precision Systems

        Modeling Standards for DO-178C/DO-331

        Modeling Standards for EN 50128

        Modeling Standards for IEC 61508

        Modeling Standards for ISO 26262

     Display model metrics and complexity report (02-Jun-2016 10:22:47)

    Display number of elements and name, level, and depth of subsystems for the model or subsystem

    Model metrics information
    Display number of elements for Simulink blocks and Stateflow constructs


    Summary

    Element TypeCount
    Inport37
    Outport19
    SubSystem31


    Simulink

    Block TypeCount
    Constant55
    Inport37
    SubSystem31
    Outport19
    Product17
    S-Function16
    Math15
    DataStoreWrite11
    Sum10
    From10
    DataTypeConversion7
    Width7
    Goto6
    UnaryMinus4
    DataStoreMemory4
    TriggerPort2
    Sqrt2
    DataStoreRead2
    Demux1
    ∧ Less

    Model complexity information
    Display name, level, and depth of subsystems


    Maximum Subsystem Depth: 5

    Subsystem Depth

    Subsystem NameLevelDepth
    AssiHiFrq14
    AssiHiFrq/AssiHiFrqInit122
    AssiHiFrq/AssiHiFrqInit1/CopyRight231
    AssiHiFrq/AssiHiFrqInit1/FilHpInit31
    AssiHiFrq/AssiHiFrqPer123
    AssiHiFrq/AssiHiFrqPer1/CopyRight231
    AssiHiFrq/AssiHiFrqPer1/Determine Gain32
    AssiHiFrq/AssiHiFrqPer1/Determine Gain/BilnrIntrpnWithRound_u16_u16MplXu16MplY41
    AssiHiFrq/AssiHiFrqPer1/Determine Gain/BilnrIntrpnWithRound_u16_u16MplXu16MplY141
    AssiHiFrq/AssiHiFrqPer1/Determine Gain/BilnrIntrpnWithRound_u16_u16MplXu16MplY241
    AssiHiFrq/AssiHiFrqPer1/Determine Gain/CopyRight241
    AssiHiFrq/AssiHiFrqPer1/Determine Gain/FixdToFloat_f32_u141
    AssiHiFrq/AssiHiFrqPer1/Determine Gain/FixdToFloat_f32_u1641
    AssiHiFrq/AssiHiFrqPer1/Determine Gain/FixdToFloat_f32_u241
    AssiHiFrq/AssiHiFrqPer1/Determine Gain/FloatToFixd_u16_f141
    AssiHiFrq/AssiHiFrqPer1/Determine Gain/FloatToFixd_u16_f241
    AssiHiFrq/AssiHiFrqPer1/Determine Gain/FloatToFixd_u16_f3241
    AssiHiFrq/AssiHiFrqPer1/FilHpUpdGain31
    AssiHiFrq/AssiHiFrqPer1/FilHpUpdOutp31
    AssiHiFrq/AssiHiFrqPer1/FixdToFloat_f32_u1631
    AssiHiFrq/AssiHiFrqPer1/FloatToFixd_u16_f3231
    AssiHiFrq/AssiHiFrqPer1/LimStat_f131
    AssiHiFrq/AssiHiFrqPer1/LnrIntrpn_u16_u16VariXu16VariY31
    AssiHiFrq/CopyRight221
    CopyRight211
    ∧ Less


     Check for model objects that do not link to requirements (02-Jun-2016 10:22:47)

    Check Simulink blocks and Stateflow objects that do not link to a requirements document

    Warning
    The following blocks do not link to a requirement document:

    ∧ Less
    Recommended Action
    For each object in the list, in the Model Editor, right-click the block, select Requirements, and specify a requirement.



        Modeling Standards for MAAB

            Naming Conventions

     Check folder names (02-Jun-2016 10:22:47)

    Identify folders using incorrect characters and formatting.

    See Also

    Warning
    The following folders have incorrect names:

    FolderIncorrect Character or Format
    C:/Users/xzb1db/Desktop/Sneha_Work/01. EA4_FDDs/SF028A_AssiHiFrq_Design/02_June_2016/SF028A_AssiHiFrq_Design/SF028A_AssiHiFrq_Design/DesignFolder name includes incorrect characters or formatting.


    Recommended Action
    Rename the above folders to remove incorrect characters and formatting.



            Model Architecture

            Model Configuration Options

            Simulink

     Check for Simulink diagrams using nonstandard display attributes (02-Jun-2016 10:22:47)

    Identify nonstandard display attributes in Simulink diagrams.

    See Also

    _________________________________________________________________________________________

    Check format settings
    Identify incorrect model-level format options.

    Passed
    The format options are correct.
    _________________________________________________________________________________________

    Check block colors
    Identify blocks using nonstandard colors.

    Warning
    The following blocks use nonstandard colors:

    ∧ Less
    Recommended Action
    Set the block foreground color to black and the background color to white.
    _________________________________________________________________________________________

    Check canvas colors
    Identify canvases that are not white.

    Passed
    All diagrams use a white canvas.
    _________________________________________________________________________________________

    Check diagram zoom
    Identify diagrams that do not have zoom factor set to 100 %.

    Passed
    All canvases have a zoom factor of 100 percent.

     Check font formatting (02-Jun-2016 10:22:47)

    Identify inconsistent formatting of text.

    See Also

    Warning
    Font formatting is not consistent.

    The following font characteristics are used in the model/subsystem. Font characteristics are sorted by number of occurrences. The most common characteristics are bold.
    Font NameFont SizeFont Style

    Helvetica
    Arial

    10
    9
    14

    normal



    Recommended Action
    To have consistent font formatting, click Modify All Fonts to apply the font formatting selected in the input parameters above to all objects.

    Input Parameters Selection
    NameValue
    Font NameCommon
    Font SizeCommon
    Font StyleCommon

     Check positioning and configuration of ports (02-Jun-2016 10:22:47)

    Identify input and output ports with incorrect positioning and configurations.

    See Also

    _________________________________________________________________________________________

    Check Inport blocks position
    Identify Inport blocks that result in left-flowing signals.

    Passed
    There are no Inport blocks in the model that result in left-flowing signals.
    _________________________________________________________________________________________

    Check Outport block position
    Identify Outport blocks that result in left-flowing signals.

    Passed
    There are no Outport blocks in the model that result in left-flowing signals.
    _________________________________________________________________________________________

    Check port orientation
    Identify port blocks with nondefault orientation.

    Passed
    All ports use the default orientation.
    _________________________________________________________________________________________

    Check for duplicate Inports blocks
    Identify duplicate Inport blocks.

    Passed
    All Inport blocks in the model are used once.

     Check visibility of block port names (02-Jun-2016 10:22:47)

    Identify port block names that are not uniformly displayed. The block names must all be displayed or none displayed. Library blocks are an exception to this rule. This check ignores masked and subsystem blocks.

    See Also

    _________________________________________________________________________________________

    Check for incorrect port name display
    Identify ports that are incorrectly displaying names.

    Passed
    Subsystem blocks are correctly displayed.
    _________________________________________________________________________________________

    Check for incorrect subsystem port name display
    Identify subsystems that are incorrectly displaying names.

    Passed
    Subsystem blocks are correctly displayed.

    Input Parameters Selection
    NameValue
    Display all port names (Diagram > Format > Show Block Name).true

     Check the display attributes of block names (02-Jun-2016 10:22:47)

    Identify whether to display block names.

    See Also

    _________________________________________________________________________________________

    Check for blocks with hidden names and obvious function
    Identify block names that are displayed but can be hidden due to obvious behavior.

    Passed
    All blocks with obvious behavior have hidden names.
    _________________________________________________________________________________________

    Check for non-descriptive displayed block names
    Identify block names that are displayed but should be hidden due to a lack of a descriptive name.

    Passed
    All displayed names provide descriptive information.
    _________________________________________________________________________________________

    Check for missing block names
    Identify block names that are hidden but should be displayed to show a descriptive name.

    Passed
    All displayed names provide descriptive information.

     Check signal line labels (02-Jun-2016 10:22:47)

    Identify blocks that require labeled signals. A subset of source and destination blocks require labeled signals.

    See Also

    _________________________________________________________________________________________

    Check source block labels
    The following source blocks require labeled signals; Inport, From, Data Store Read, Constant, Bus Selector, Demux, Selector. If the signal name is visible on the block, this rule is considered met.

    Warning
    The following signals have no label:

    ∧ Less
    Recommended Action
    Add a new or propagated label to the signal line.
    _________________________________________________________________________________________

    Check destination block labels
    The following destination blocks require labeled signals; Outport, Goto, Data Store Write, Bus Creator, Mux, Subsystem, Chart. If the signal name is visible on the source block, this rule is considered met.

    Warning
    The following signals have no label:

    ∧ Less
    Recommended Action
    Add a new or propagated label to the signal line.

     Check for propagated signal labels (02-Jun-2016 10:22:47)

    Identify propagated labels on signal lines.

    See Also

    _________________________________________________________________________________________

    Check subsystem block input labels
    Identify inputs to subsystem blocks to verify that the signals have labels.

    Warning
    The following subsystem-level Inport block signals should propagate signal labels from the parent system.

    Recommended Action
    Add labels to the input signals.
    _________________________________________________________________________________________

    Check subsystem input signals
    Identify inputs to subsystem blocks to ensure that propagated signals are displayed.

    Warning
    The following subsystem-level Inport block signals have no propagated signal labels. Signals coming from parent system should have a label.

    Recommended Action
    Display signal labels for propagated signals on the inputs signals.
    _________________________________________________________________________________________

    Check subsystem output label propagation
    Identify outputs from subsystem blocks where propagated signals are not displayed.

    Warning
    The following subsystem-level Outport block signals have no propagated signal label. Signals coming from the subsystem should have a label.

    Recommended Action
    Display signal labels for propagated signals on the output signals.
    _________________________________________________________________________________________

    Signal propagation for nonsubsystem blocks
    Identify the signal propagation status for both transformative and nontransformative blocks.

    Passed
    All outputs from non subsystem blocks correctly use labels and display propagated signals.



            Stateflow

     Check usage of exclusive and default states in state machines (02-Jun-2016 10:22:47)

    Identify Stateflow charts and substates that incorrectly use or define exclusive and default states.
    Note: This check does not support charts that use MATLAB as the action language.

    See Also

    _________________________________________________________________________________________

    Check Stateflow charts for exclusive states
    Identify Stateflow charts that have singular exclusive (OR) states.

    Passed
    The Stateflow charts do not have singular exclusive (OR) states.
    _________________________________________________________________________________________

    Check Stateflow charts for undefined default states
    Identify Stateflow charts that do not define default states.

    Passed
    Each Stateflow chart defines a default state.
    _________________________________________________________________________________________

    Check for multiple states assigned as the default state
    At the root level in the Stateflow hierarchy only one state should be assigned as the default.

    Passed
    The root level of the chart has only one default state assigned.
    _________________________________________________________________________________________

    Check for substates with singular OR states
    States configured as OR should always be part of a group of states.

    Passed
    No singular OR states were detected.
    _________________________________________________________________________________________

    Check for substates without default states defined
    At every level in the Stateflow hierarchy a default state should be assigned.

    Passed
    All substates have default states assigned.
    _________________________________________________________________________________________

    Check for substates with multiple default states defined
    At every level in the Stateflow hierarchy only one state should be assigned as the default.

    Passed
    All levels of the chart have only one default state assigned.

     Check transition orientations in flowcharts (02-Jun-2016 10:22:47)

    Identify transitions in Stateflow flowcharts that are drawn incorrectly.

    See Also

    _________________________________________________________________________________________

    Check for conditions drawn vertically
    Condition expressions should be drawn on the horizontal segments of flowcharts.

    Passed
    All conditions expressions were drawn horizontally.
    _________________________________________________________________________________________

    Check for action transitions drawn vertically
    Transition actions should be drawn on the vertical segments of flowcharts.

    Passed
    All transitions actions where drawn vertically.
    _________________________________________________________________________________________

    Check for junctions for default transitions
    All Junctions in a flow chart should have a default exit transition.

    Passed
    All Junctions have a default exit transition.
    _________________________________________________________________________________________

    Check for transitions that combine condition and action
    Flowcharts should not combine condition evaluations and action expressions in a single transition.

    Passed
    No combined expressions where found in the chart.



            MATLAB Functions

        Requirements Consistency Checking

     Identify selection-based links having description fields that do not match their requirements document text

    Inconsistencies:

    The following selection-based links have descriptions that differ from their corresponding selections in the requirements documents. If this reflects a change in the requirements document, click Update to replace the current description in the selection-based link with the text from the requirements document (the external description).
     
    Block 

    		Current description External description  

    SF028A_AssiHiFrq/AssiHiFrq/VehSpd

    		REQ:SF028A_9REQ: SF028A_9

    		Update

    SF028A_AssiHiFrq/AssiHiFrq/HwTq

    		REQ:SF028A_32REQ: SF028A_32

    		Update

    SF028A_AssiHiFrq/AssiHiFrq/WhlImbRejctnAmp

    		REQ:SF028A_33REQ: SF028A_33

    		Update

    SF028A_AssiHiFrq/AssiHiFrq/AssiHiFrqCmd

    		REQ:SF028A_11REQ: SF028A_11

    		Update

    SF028A_AssiHiFrq/AssiHiFrq/AssiHiFrqPer1/Determine Gain

    		REQ:SF028A_43REQ: SF028A_43

    		Update

    SF028A_AssiHiFrq/AssiHiFrq/AssiHiFrqPer1/FilHpUpdGain

    		REQ:SF028A_41REQ: SF028A_41

    		Update

    SF028A_AssiHiFrq/AssiHiFrq/AssiHiFrqPer1/FilHpUpdOutp

    		REQ:SF028A_41REQ: SF028A_41

    		Update

    SF028A_AssiHiFrq/AssiHiFrq/AssiHiFrqPer1/FixdToFloat_f32_u16

    		REQ:SF028A_41REQ: SF028A_41

    		Update

    SF028A_AssiHiFrq/AssiHiFrq/AssiHiFrqPer1/FloatToFixd_u16_f32

    		REQ:SF028A_41REQ: SF028A_41

    		Update

    SF028A_AssiHiFrq/AssiHiFrq/AssiHiFrqPer1/From2

    		REQ:SF028A_41REQ: SF028A_41

    		Update

    SF028A_AssiHiFrq/AssiHiFrq/AssiHiFrqPer1/LimStat_f1

    		REQ:SF028A_63REQ: SF028A_63

    		Update

    SF028A_AssiHiFrq/AssiHiFrq/AssiHiFrqPer1/LnrIntrpn_u16_u16VariXu16VariY

    		REQ:SF028A_41REQ: SF028A_41

    		Update

    SF028A_AssiHiFrq/AssiHiFrq/AssiHiFrqPer1/Product1

    		REQ:SF028A_40REQ: SF028A_40

    		Update


        Simulation Accuracy

        Simulation Runtime Accuracy Diagnostics

        Simulink Model File Integrity

        Upgrading to the Current Simulink Version