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Component Implementation
1 - SnsrOffLrng_MDD
Module Design Document
For
Sensor Offset Learning
Dec 7, 2016
Prepared By:
Shruthi Raghavan,
Nexteer Automotive,
Saginaw, MI, USA
Change History
| Version | Description | Author | Date | 
| 1 | Initial Version | Selva Sengottaiyan | 07-Feb-2016 | 
| 2 | Updated as per FDD v 1.2.0 | Krishna Anne | 07-Mar-2016 | 
| 3 | Updated graphical representation | Nick Saxton | 17-Aug-2016 | 
| 4 | Updated design limitations for FDD v1.5.0 | Shruthi Raghavan | 7-Dec-2016 | 
Table of Contents1 Introduction 6
2 SnsrOffsLrng & High-Level Description 7
3 Design details of software module 8
3.1 Graphical representation of SnsrOffsLrng 9
4.1 Program (fixed) Constants 11
5 Software Component Implementation 12
5.1.1 Init: SnsrOffsLrngInit1 12
5.1.2 Per: SnsrOffsLrngPer1 12
5.1.2.2 Store Module Inputs to Local copies 12
5.1.2.3 (Processing of function)……… 12
5.1.2.4 Store Local copy of outputs into Module Outputs 12
5.1.1 Per: SnsrOffsLrngPer2 12
5.1.1.2 Store Module Inputs to Local copies 12
5.1.1.3 (Processing of function)……… 12
5.1.1.4 Store Local copy of outputs into Module Outputs 12
5.2.1.2 Store Module Inputs to Local copies 13
5.2.1.3 (Processing of function)……… 13
5.2.1.4 Store Local copy of outputs into Module Outputs 13
5.2.2 SnsrOffsLrng_RstYawAndAg 13
5.2.2.2 Store Module Inputs to Local copies 13
5.2.2.3 (Processing of function)……… 13
5.2.2.4 Store Local copy of outputs into Module Outputs 13
5.2.3 SnsrOffsLrng_SetHwAgOffs 13
5.2.3.2 Store Module Inputs to Local copies 13
5.2.3.3 (Processing of function)……… 13
5.2.3.4 Store Local copy of outputs into Module Outputs 13
5.2.4 SnsrOffsLrng_GetHwAgOffs 14
5.2.4.2 Store Module Inputs to Local copies 14
5.2.4.3 (Processing of function)……… 14
5.2.4.4 Store Local copy of outputs into Module Outputs 14
5.2.5 SnsrOffsLrng_SetHwTqOffs 14
5.2.5.2 Store Module Inputs to Local copies 14
5.2.5.3 (Processing of function)……… 14
5.2.5.4 Store Local copy of outputs into Module Outputs 14
5.2.6 SnsrOffsLrng_GetHwTqOffs 14
5.2.6.2 Store Module Inputs to Local copies 14
5.2.6.3 (Processing of function)……… 14
5.2.6.4 Store Local copy of outputs into Module Outputs 14
5.2.7 SnsrOffsLrng_SetYawRateOffs 15
5.2.7.2 Store Module Inputs to Local copies 15
5.2.7.3 (Processing of function)……… 15
5.2.7.4 Store Local copy of outputs into Module Outputs 15
5.2.8 SnsrOffsLrng_GetYawRateOffs 15
5.2.8.2 Store Module Inputs to Local copies 15
5.2.8.3 (Processing of function)……… 15
5.2.8.4 Store Local copy of outputs into Module Outputs 15
5.3 Module Internal (Local) Functions 15
5.3.1 Module Internal (Local) Functions 15
6 Known Limitations with Design 19
Appendix A Abbreviations and Acronyms 21
Introduction
Refer the Design Subproject.
SnsrOffsLrng & High-Level Description
Refer the Design Subproject.
Design details of software module
Graphical representation of SnsrOffsLrng
Constant Data Dictionary
Program (fixed) Constants
Embedded Constants
Local Constants
| Constant Name | Resolution | Units | Value | 
|---|---|---|---|
| HWTQOFFSHILIM_HWNWTMTR_F32 | Single precision float | HwNwtMtr | 4 | 
| HWTQOFFSLOLIM_HWNWTMTR_F32 | Single precision float | HwNwtMtr | -4 | 
| VEHYAWRATEOFFSHILIM_VEHDEGPERSEC_F32 | Single precision float | VehDegPerSec | 20 | 
| VEHYAWRATEOFFSLOLIM_VEHDEGPERSEC_F32 | Single precision float | VehDegPerSec | -20 | 
| HWAGOFFSHILIM_HWDEG_F32 | Single precision float | HwDeg | -30 | 
| HWAGOFFSLOLIM_HWDEG_F32 | Single precision float | HwDeg | -30 | 
| MTRXSIZE_CNT_U08 | 1 | Cnt | 3 | 
Software Component Implementation
Sub-Module Functions
Init: SnsrOffsLrngInit1
Design Rationale
Refer the Design.
Module Outputs
Refer the Design.
Per: SnsrOffsLrngPer1
Design Rationale
Refer the Design.
Store Module Inputs to Local copies
Refer the Design.
(Processing of function)………
Refer the Design.
Store Local copy of outputs into Module Outputs
Refer the Design.
Per: SnsrOffsLrngPer2
Design Rationale
Refer the Design.
Store Module Inputs to Local copies
Refer the Design.
(Processing of function)………
Refer the Design.
Store Local copy of outputs into Module Outputs
Refer the Design.
Server Runables
SnsrOffsLrng_RstHwTq
Design Rationale
Refer the Design.
Store Module Inputs to Local copies
Refer the Design.
(Processing of function)………
Refer the Design.
Store Local copy of outputs into Module Outputs
Refer the Design.
SnsrOffsLrng_RstYawAndAg
Design Rationale
Refer the Design.
Store Module Inputs to Local copies
Refer the Design.
(Processing of function)………
Refer the Design.
Store Local copy of outputs into Module Outputs
Refer the Design.
SnsrOffsLrng_SetHwAgOffs
Design Rationale
Refer the Design.
Store Module Inputs to Local copies
Refer the Design.
(Processing of function)………
Refer the Design.
Store Local copy of outputs into Module Outputs
Refer the Design.
SnsrOffsLrng_GetHwAgOffs
Design Rationale
Refer the Design.
Store Module Inputs to Local copies
Refer the Design.
(Processing of function)………
Refer the Design.
Store Local copy of outputs into Module Outputs
Refer the Design.
SnsrOffsLrng_SetHwTqOffs
Design Rationale
Refer the Design.
Store Module Inputs to Local copies
Refer the Design.
(Processing of function)………
Refer the Design.
Store Local copy of outputs into Module Outputs
Refer the Design.
SnsrOffsLrng_GetHwTqOffs
Design Rationale
Refer the Design.
Store Module Inputs to Local copies
Refer the Design.
(Processing of function)………
Refer the Design.
Store Local copy of outputs into Module Outputs
Refer the Design.
SnsrOffsLrng_SetYawRateOffs
Design Rationale
Refer the Design.
Store Module Inputs to Local copies
Refer the Design.
(Processing of function)………
Refer the Design.
Store Local copy of outputs into Module Outputs
Refer the Design.
SnsrOffsLrng_GetYawRateOffs
Design Rationale
Refer the Design.
Store Module Inputs to Local copies
Refer the Design.
(Processing of function)………
Refer the Design.
Store Local copy of outputs into Module Outputs
Refer the Design.
Module Internal (Local) Functions
Module Internal (Local) Functions
Calculate LearnHwAg
| Function Name | LearnHwAg | Type | Min | Max | UTP Tol. | 
| Arguments Passed | HwAgLrngLrngCdnVld_Cnt_T_logl | Boolean | FALSE | TRUE | |
| HwAgLrngEna_Cnt_T_logl | Boolean | FALSE | TRUE | ||
| SysTqFild_HwNm_T_f32 | float32 | -8.8 | 8.8 | ||
| HandwheelPosition_HwDeg_T_f32 | float32 | -1440 | 1440 | ||
| Return Value | None | 
Description
No flowchart added. For Unit test FDD should provide the information needed regarding function processing
Calculate SOaCHierarchyManager
| Function Name | SOaCHierarchyManager | Type | Min | Max | UTP Tol. | 
| Arguments Passed | *EnableYOC_Cnt_T_logl | Boolean | FALSE | TRUE | |
| *HwAgLrngEna_Cnt_T_logl | Boolean | FALSE | TRUE | ||
| *HwAgLrngRst_Cnt_T_logl | Boolean | FALSE | TRUE | ||
| Return Value | 
Description
No flowchart added. For Unit test FDD should provide the information needed regarding function processing
Calculate Perform_TqInpDetn
| Function Name | Perform_TqInpDetn | Type | Min | Max | UTP Tol. | 
| Arguments Passed | None | ||||
| Return Value | 
Description
No flowchart added. For Unit test FDD should provide the information needed regarding function processing
Calculate EnableLearning
| Function Name | EnableLearning | Type | Min | Max | UTP Tol. | 
| Arguments Passed | |||||
| Return Value | HwTqLrngEna_Cnt_T_logl | Boolean | FALSE | TRUE | 
Description
No flowchart added. For Unit test FDD should provide the information needed regarding function processing
Calculate CalculateKVector
| Function Name | CalculateKVector | Type | Min | Max | UTP Tol. | 
| Arguments Passed | TqMdlXAry_HwRadpS_T_f32[3] | float32 | -42 | 42 | |
| KVect_Uls_T_f32[3] | float32 | -42 | 42 | ||
| Return Value | 
Description
No flowchart added. For Unit test FDD should provide the information needed regarding function processing
Calculate EnablePreProcessing
| Function Name | EnablePreProcessing | Type | Min | Max | UTP Tol. | 
| Arguments Passed | HwTqPreproc_dB_T_f32 | float32 | -100 | 30 | |
| SampleCntrLim_Cnt_T_u16 | Uint16 | 1 | 65535 | ||
| TqInpPrsntVld_Cnt_T_logl | Boolean | FALSE | TRUE | ||
| TqInpPrsnt_Cnt_T_logl | Boolean | FALSE | TRUE | ||
| Return Value | 
Description
No flowchart added. For Unit test FDD should provide the information needed regarding function processing
Calculate UpdateCovarianceMatrix
| Function Name | UpdateCovarianceMatrix | Type | Min | Max | UTP Tol. | 
| Arguments Passed | TqMdlXAry_HwRadpS_T_f32[3] | float32 | -42 | 42 | |
| KVect_Uls_T_f32[3] | float32 | -42 | 42 | ||
| Return Value | 
Description
No flowchart added. For Unit test FDD should provide the information needed regarding function processing
TblSize_Cnt_T_u16 is size of the single dimension of TqMdlAryKVect_Uls_T_f32.
Calculate UpdateHwTqOffs
| Function Name | UpdateHwTqOffs | Type | Min | Max | UTP Tol. | 
| Arguments Passed | HwTqEstimnVld_Cnt_T_logl | boolean | FALSE | TRUE | |
| HwTqDriftEstimnOnCentr_HwNm_T_f32 | float32 | -10 | 10 | ||
| Return Value | None | 
Description
No flowchart added. For Unit test FDD should provide the information needed regarding function processing
Calculate UpdateSampleCnt
| Function Name | UpdateSampleCnt | Type | Min | Max | UTP Tol. | 
| Arguments Passed | HwAgMeasd_HwDeg_T_f32 | float32 | -1440 | 1440 | |
| Return Value | None | 
Description
No flowchart added. For Unit test FDD should provide the information needed regarding function processing
Known Limitations with Design
The display variable dSnsrOffsLrngSysTqFild and PIM SysTqCdngFil structure have wrong ranges defined in the datadict.m file. The actual range according to developer is [-366, 366]. However, since the given range is larger and includes the correct range and because these variables are not affecting the downstream operations in a way that will fail the PIL, this is not changed in the interest of time (changing this would mean rerunning the robustness test and there wasn’t enough time for that before release).
The name of the NVM structure type SnsrLrndOffsRec2 is changed without any change to the name or datatype of the corresponding elements. The only difference between SnsrLrndOffsRec1 and SnsrLrndOffsRec2 is the ranges of the elements within the structure.
Since this is not the agreed process for EA4, the implementation deviates from FDD and uses the original structure in order to avoid a change to StdDef to only add a redundant datatype. For the next FDD revision we need to make a decision on whether to go back to SnsrLrndOffsRec1 in the FDD or change the StdDef and add SnsrLrndOffsRec2 type in it. Either way, once the new tool is officially rolled out for use, such deviations of type will be caught in the Polyspace as an error (necessitating manual fixes to work around such issues).
UNIT TEST CONSIDERATION
The display variable dSnsrOffsLrngSysTqFild and PIM SysTqCdngFil structure have wrong ranges defined in the datadict.m file. The actual range according to developer is [-366, 366]. However, since the given range is larger and includes the correct range and because these variables are not affecting the downstream operations in a way that will fail the PIL, this is not changed in the interest of time (changing this would mean rerunning the robustness test and there wasn’t enough time for that before release).
Abbreviations and Acronyms
| Abbreviation or Acronym | Description | 
|---|---|
Glossary
Note: Terms and definitions from the source “Nexteer Automotive” take precedence over all other definitions of the same term. Terms and definitions from the source “Nexteer Automotive” are formulated from multiple sources, including the following:
- ISO 9000 
- ISO/IEC 12207 
- ISO/IEC 15504 
- Automotive SPICE® Process Reference Model (PRM) 
- Automotive SPICE® Process Assessment Model (PAM) 
- ISO/IEC 15288 
- ISO 26262 
- IEEE Standards 
- SWEBOK 
- PMBOK 
- Existing Nexteer Automotive documentation 
| Term | Definition | Source | 
|---|---|---|
| MDD | Module Design Document | |
| DFD | Data Flow Diagram | 
References
| Ref. # | Title | Version | 
|---|---|---|
| 1 | AUTOSAR Specification of Memory Mapping (Link:AUTOSAR_SWS_MemoryMapping.pdf) | v1.3.0 R4.0 Rev 2 | 
| 2 | MDD Guideline | EA4 01.00.01 | 
| 3 | Software Naming Conventions.doc | 1.0 | 
| 4 | Software Design and Coding Standards.doc | 2.1 | 
| 5 | SF051A_SnsrOffsLrng_Design | See the synergy sub-project version included. | 
2 - SnsrOffLrng_ReviewChecklists
Overview
Summary SheetSynergy Project
Davinci Files
Source Code
MDD
PolySpace
Sheet 1: Summary Sheet

Sheet 2: Synergy Project
Sheet 3: Davinci Files
Sheet 4: Source Code
| Rev 1.2 | 8-Jun-15 | |||||||||||||||||||||||
| Peer Review Meeting Log (Source Code Review) | ||||||||||||||||||||||||
| Source File Name: | SnsrOffsLrng.c | Source File Revision: | 6 | |||||||||||||||||||||
| Header File Name: | Header File Revision: | |||||||||||||||||||||||
| MDD Name: | SnsrOffsLrng_MDD.docx | Revision: | 4 | |||||||||||||||||||||
| FDD/SCIR/DSR/FDR/CM Name: | SF051A_SnsrOffsLrng_Design | Revision: | 1.5.0 | |||||||||||||||||||||
| Quality Check Items: | ||||||||||||||||||||||||
| Rationale is required for all answers of No | ||||||||||||||||||||||||
| Working EA4 Software Naming Convention followed: | ||||||||||||||||||||||||
| for variable names | Yes | Comments: | ||||||||||||||||||||||
| for constant names | N/A | Comments: | ||||||||||||||||||||||
| for function names | N/A | Comments: | ||||||||||||||||||||||
| for other names (component, memory | N/A | Comments: | ||||||||||||||||||||||
| mapping handles, typedefs, etc.) | ||||||||||||||||||||||||
| All paths assign a value to outputs, ensuring | N/A | Comments: | ||||||||||||||||||||||
| all outputs are initialized prior to being written | ||||||||||||||||||||||||
| Requirements Tracability tags in code match the requirements tracability in the FDD | N/A | Comments: | ||||||||||||||||||||||
| requirements tracability in the FDD | Removed Requirement Tags and requirements.csv | |||||||||||||||||||||||
| All variables are declared at the function level. | Yes | Comments: | ||||||||||||||||||||||
| Synergy version matches change history | Yes | Comments: | ||||||||||||||||||||||
| and Version Control version in file comment block | ||||||||||||||||||||||||
| Change log contains detailed description of changes | Yes | Comments: | ||||||||||||||||||||||
| and Work CR number | ||||||||||||||||||||||||
| Code accurately implements FDD (Document or Model) | Yes | Comments: | ||||||||||||||||||||||
| Verified no Compiler Errors or Warnings | Yes | Comments: | ||||||||||||||||||||||
| Component.h is included | N/A | Comments: | ||||||||||||||||||||||
| All other includes are actually needed. (System includes | N/A | Comments: | ||||||||||||||||||||||
| only allowed in Nexteer library components) | ||||||||||||||||||||||||
| Software Design and Coding Standards followed: | Version: 2.1 | |||||||||||||||||||||||
| Code comments are clear, correct, and adequate | Yes | Comments: | ||||||||||||||||||||||
| and have been updated for the change: [N40] and | ||||||||||||||||||||||||
| all other rules in the same section as rule [N40], | ||||||||||||||||||||||||
| plus [N75], [N12], [N23], [N33], [N37], [N38], | ||||||||||||||||||||||||
| [N48], [N54], [N77], [N79], [N72] | ||||||||||||||||||||||||
| Source file (.c and .h) comment blocks are per | N/A | Comments: | ||||||||||||||||||||||
| standards and contain correct information: [N41], [N42] | ||||||||||||||||||||||||
| Function comment blocks are per standards and | N/A | Comments: | ||||||||||||||||||||||
| contain correct information: [N43] | ||||||||||||||||||||||||
| Code formatting (indentation, placement of | Yes | Comments: | ||||||||||||||||||||||
| braces, etc.) is per standards: [N5], [N55], [N56], | ||||||||||||||||||||||||
| [N57], [N58], [N59] | ||||||||||||||||||||||||
| Embedded constants used per standards; no | Yes | Comments: | ||||||||||||||||||||||
| "magic numbers": [N12] | ||||||||||||||||||||||||
| Memory mapping for non-RTE code | N/A | Comments: | ||||||||||||||||||||||
| is per standard | ||||||||||||||||||||||||
| All execution-order-dependent code can be | Yes | Comments: | ||||||||||||||||||||||
| recognized by the compiler: [N80] | ||||||||||||||||||||||||
| All loops have termination conditions that ensure | N/A | Comments: | ||||||||||||||||||||||
| finite loop iterations: [N63] | ||||||||||||||||||||||||
| All divides protect against divide by zero | N/A | Comments: | ||||||||||||||||||||||
| if needed: [N65] | ||||||||||||||||||||||||
| All integer division and modulus operations | N/A | Comments: | ||||||||||||||||||||||
| handle negative numbers correctly: [N76] | ||||||||||||||||||||||||
| All typecasting and fixed point arithmetic, | Yes | Comments: | ||||||||||||||||||||||
| including all use of fixed point macros and | ||||||||||||||||||||||||
| timer functions, is correct and has no possibility | ||||||||||||||||||||||||
| of unintended overflow or underflow: [N66] | ||||||||||||||||||||||||
| All float-to-unsiged conversions ensure the. | N/A | Comments: | ||||||||||||||||||||||
| float value is non-negative: [N67] | ||||||||||||||||||||||||
| All conversions between signed and unsigned | N/A | Comments: | ||||||||||||||||||||||
| types handle msb==1 as intended: [N78] | ||||||||||||||||||||||||
| All pointer dereferencing protects against | N/A | Comments: | ||||||||||||||||||||||
| null pointer if needed: [N70] | ||||||||||||||||||||||||
| Component outputs are limited to the legal range | N/A | Comments: | ||||||||||||||||||||||
| defined in the FDD DataDict.m file : [N53] | ||||||||||||||||||||||||
| All code is mapped with FDD (all FDD | Yes | Comments: | ||||||||||||||||||||||
| subfunctions and/or model blocks identified | ||||||||||||||||||||||||
| with code comments; all code corresponds to | ||||||||||||||||||||||||
| some FDD subfunction and/or model block): [N40] | ||||||||||||||||||||||||
| Review did not identify violations of other | Yes | Comments: | ||||||||||||||||||||||
| coding standard rules | ||||||||||||||||||||||||
| Anomaly or Design Work CR created | N/A | Comments: List Anomaly or CR numbers | ||||||||||||||||||||||
| for any FDD corrections needed | ||||||||||||||||||||||||
| General Notes / Comments: | ||||||||||||||||||||||||
| FDD has pending changes needed that are noted in the MDD | ||||||||||||||||||||||||
| Change Owner: | Shruthi Raghavan | Review Date : | 12/08/16 | |||||||||||||||||||||
| Lead Peer Reviewer: | Avinash James | Approved by Reviewer(s): | Yes | |||||||||||||||||||||
| Other Reviewer(s): | Krishna Anne | Daniel Rabadan | ||||||||||||||||||||||
Sheet 5: MDD
Sheet 6: PolySpace
3 - SnsrOffsLrng_IntegrationManual
Integration Manual
For
SnsrOffsLrng
VERSION: 1
DATE: 07-Mar-2016
Prepared By:
Krishna Anne
Nexteer Automotive,
Saginaw, MI, USA
Location: The official version of this document is stored in the Nexteer Configuration Management System.
Revision History
| Sl. No. | Description | Author | Version | Date | 
| 1 | Initial version | S. Sengottaiyan | 1.0 | 07-Feb-2016 | 
| 2 | Updated as per FDD v 1.2.0 | Krishna Anne | 2.0 | 07-Mar-2016 | 
Table of Contents
3.2 Global Functions(Non RTE) to be provided to Integration Project 6
4.2 Global Functions(Non RTE) to be provided to Integration Project 7
5 Configuration REQUIREMeNTS 8
5.2 Configuration Files to be provided by Integration Project 8
5.3 Da Vinci Parameter Configuration Changes 8
5.4 DaVinci Interrupt Configuration Changes 8
5.5 Manual Configuration Changes 8
6 Integration DATAFLOW REQUIREMENTS 9
6.1 Required Global Data Inputs 9
6.2 Required Global Data Outputs 9
6.3 Specific Include Path present 9
Abbrevations And Acronyms
| Abbreviation | Description | 
| DFD | Design functional diagram | 
| MDD | Module design Document | 
| <ADD more to the table if applicable> | |
References
This section lists the title & version of all the documents that are referred for development of this document
| Sr. No. | Title | Version | 
| 1 | FDD – SF51_SnsrOffsLrng_Impl | See Synergy subproject version | 
| 2 | Software Naming Conventions | Process 04.02.01 | 
| 3 | Software Coding Standards | Process 04.02.01 | 
Dependencies
SWCs
| Module | Required Feature | 
| None | 
Note : Referencing the external components should be avoided in most cases. Only in unavoidable circumstance external components should be referred. Developer should track the references.
Global Functions(Non RTE) to be provided to Integration Project
< Global function (except the ones that are defined in RTE modules) that is defined in this component but used by other function
Dependencies
SWCs
| Module | Required Feature | 
| None | 
Note : Referencing the external components should be avoided in most cases. Only in unavoidable circumstance external components should be referred. Developer should track the references.
Global Functions(Non RTE) to be provided to Integration Project
None
Configuration REQUIREMeNTS
Build Time Config
| Modules | Notes | |
| None | 
Configuration Files to be provided by Integration Project
None
Da Vinci Parameter Configuration Changes
| Parameter | Notes | SWC | 
| None | 
DaVinci Interrupt Configuration Changes
| ISR Name | VIM # | Priority Dependency | Notes | 
| None | 
Manual Configuration Changes
| Constant | Notes | SWC | 
| None | 
Integration DATAFLOW REQUIREMENTS
Required Global Data Inputs
Refer .m file
Required Global Data Outputs
Refer .m file
Specific Include Path present
No
Runnable Scheduling
This section specifies the required runnable scheduling.
| Init | Scheduling Requirements | Trigger | 
| SnsrOffsLrngInit1 | None | Rte | 
| Runnable | Scheduling Requirements | Trigger | ||
| SnsrOffsLrngPer1 | None | RTE(2ms) | ||
| SnsrOffsLrngPer2 | None | RTE(10ms) | ||
| RstHwTq | None | On server invocation call | ||
| RstYawAndAg | None | On server invocation call | ||
| SetHwAgOffs | None | On server invocation call | ||
| SetHwTqOffs | None | On server invocation call | ||
| SetYawRateOffs | None | On server invocation call | ||
| GetHwAgOffs | None | On server invocation call | ||
| GetHwTqOffs | None | On server invocation call | ||
| GetYawRateOffs | None | On server invocation call | ||
.
Memory Map REQUIREMENTS
Mapping
| Memory Section | Contents | Notes | 
* Each …START_SEC… constant is terminated by a …STOP_SEC… constant as specified in the AUTOSAR Memory Mapping requirements.
Usage
| Feature | RAM | ROM | 
| None | 
Table 1: ARM Cortex R4 Memory Usage
RTE NvM Blocks
| Block Name | 
| SnsrOffsLrnd | 
Compiler Settings
Preprocessor MACRO
None
Optimization Settings
None
Appendix
None


