ExcpnHndlg Module Design Document

Module Design Document

For

ExcpnHndlg

April 5, 2016

Prepared For:

Software Engineering

Nexteer Automotive,

Saginaw, MI, USA

Prepared By:

Software Group,

Nexteer Automotive,

Saginaw, MI, USA
Change History

Table of Contents

1 Introduction 7

1.1 Purpose 7

1.2 Scope 7

2 ExcpnHndlg & High-Level Description 8

3 Design details of software module 9

3.1 Graphical representation of ExcpnHndlg 9

3.2 Data Flow Diagram 9

3.2.1 Component level DFD 9

3.2.2 Function level DFD 9

4 Constant Data Dictionary 10

4.1 Program (fixed) Constants 10

4.1.1 Embedded Constants 10

5 Software Component Implementation 13

5.1 Sub-Module Functions 13

5.1.1 Init: ExcpnHndlgInit1 13

5.1.1.1 Design Rationale 13

5.1.1.2 Module Outputs 13

5.1.2 Init: ExcpnHndlgInit2 13

5.1.2.1 Design Rationale 13

5.1.2.2 Module Outputs 13

5.1.3 Per: ExcpnHndlgPer1 13

5.1.3.1 Design Rationale 13

5.1.3.2 Store Module Inputs to Local copies 13

5.1.3.3 (Processing of function)……… 13

5.1.3.4 Store Local copy of outputs into Module Outputs 13

5.2 Server Runables 13

5.2.1 ChkForStrtUpTest 13

5.2.1.1 Design Rationale 13

5.2.1.2 (Processing of function)……… 13

5.2.2 FeNmiClkMonr0RtLowrLimFlt 14

5.2.2.1 Design Rationale 14

5.2.2.2 (Processing of function)……… 14

5.2.3 FeNmiClkMonr0RtUpprLimFlt 14

5.2.3.1 Design Rationale 14

5.2.3.2 (Processing of function)……… 14

5.2.4 FeNmiClkMonr1RtLowrLimFlt 14

5.2.4.1 Design Rationale 14

5.2.4.2 (Processing of function)……… 14

5.2.5 FeNmiClkMonr1RtUpprLimFlt 14

5.2.5.1 Design Rationale 14

5.2.5.2 (Processing of function)……… 14

5.2.6 FeNmiClkMonr2RtLowrLimFlt 14

5.2.6.1 Design Rationale 14

5.2.6.2 (Processing of function)……… 14

5.2.7 FeNmiClkMonr2RtUpprLimFlt 14

5.2.7.1 Design Rationale 14

5.2.7.2 (Processing of function)……… 15

5.2.8 FeNmiClkMonr3RtLowrLimFlt 15

5.2.8.1 Design Rationale 15

5.2.8.2 (Processing of function)……… 15

5.2.9 FeNmiClkMonr3RtUpprLimFlt 15

5.2.9.1 Design Rationale 15

5.2.9.2 (Processing of function)……… 15

5.2.10 FeNmiDmaTrf 15

5.2.10.1 Design Rationale 15

5.2.10.2 (Processing of function)……… 15

5.2.11 FeNmiDmaRegAcsProtnErr 15

5.2.11.1 Design Rationale 15

5.2.11.2 (Processing of function)……… 15

5.2.12 FeNmiEcmMstChkrCmp 15

5.2.12.1 Design Rationale 15

5.2.12.2 (Processing of function)……… 15

5.2.13 FeNmiOperModErrFlsProgmModStrtd 16

5.2.13.1 Design Rationale 16

5.2.13.2 (Processing of function)……… 16

5.2.14 FeNmiOperModErrSngChipInactv 16

5.2.14.1 Design Rationale 16

5.2.14.2 (Processing of function)……… 16

5.2.15 FeNmiOperModErrTestModStrtd 16

5.2.15.1 Design Rationale 16

5.2.15.2 (Processing of function)……… 16

5.2.16 FeNmiPeg 16

5.2.16.1 Design Rationale 16

5.2.16.2 (Processing of function)……… 16

5.2.17 FeNmiWdg 16

5.2.17.1 Design Rationale 16

5.2.17.2 (Processing of function)……… 16

5.2.18 GetMcuDiagcIdnData 17

5.2.18.1 Design Rationale 17

5.2.18.2 (Processing of function)……… 17

5.2.19 ProcMpuExcpnErr 17

5.2.19.1 Design Rationale 17

5.2.19.2 (Processing of function)……… 17

5.2.20 ProcNonCritOsErr 17

5.2.20.1 Design Rationale 17

5.2.20.2 (Processing of function)……… 17

5.2.21 ProcPrmntOsErr 17

5.2.21.1 Design Rationale 17

5.2.21.2 (Processing of function)……… 17

5.2.22 ProcPrvlgdInstrExcpnErr 17

5.2.22.1 Design Rationale 17

5.2.22.2 (Processing of function)……… 17

5.2.23 ProcUkwnExcpnErr 18

5.2.23.1 Design Rationale 18

5.2.23.2 (Processing of function)……… 18

5.2.24 SetMcuDiagcIdnData 18

5.2.24.1 Design Rationale 18

5.2.24.2 (Processing of function)……… 18

5.3 Interrupt Functions 18

5.3.1 AlgnErrIrq 18

5.3.1.1 Design Rationale 18

5.3.1.2 (Processing of the ISR function)….. 18

5.3.2 FpuErrIrq 18

5.3.2.1 Design Rationale 18

5.3.2.2 (Processing of the ISR function)….. 18

5.3.3 SysErrIrq 18

5.3.3.1 Design Rationale 18

5.3.3.2 (Processing of the ISR function)….. 18

5.3.4 ResdOperIrq 19

5.3.4.1 Design Rationale 19

5.3.4.2 (Processing of the ISR function)….. 19

5.4 Module Internal (Local) Functions 19

5.4.1 ProcStrtUpOrSwRst 19

5.4.1.1 Design Rationale 19

5.4.1.2 Processing 19

5.4.2 ProcEcmRst 19

5.4.2.1 Design Rationale 19

5.4.2.2 Processing 19

5.4.3 ProcPinRst 19

5.4.3.1 Design Rationale 20

5.4.3.2 Processing 20

5.5 GLOBAL Function/Macro Definitions 20

5.5.1 GLOBAL Function #1 20

5.5.1.1 Design Rationale 20

5.5.1.2 processing 20

6 Known Limitations with Design 21

7 UNIT TEST CONSIDERATION 22

Appendix A Abbreviations and Acronyms 23

Appendix B Glossary 24

Appendix C References 25

Introduction

Purpose

This document details the design in the FDD and also lists out any deviations which were made from the design for the implementation due to any constraints in development. ExcpnHndlg MDD describes the exception handling / reset cause determination for microcontroller diagnostics

Scope

The following definitions are used throughout this document:

• Shall: indicates a mandatory requirement without exception in compliance.

• Should: indicates a mandatory requirement; exceptions allowed only with documented justification.

• May: indicates an optional action.

ExcpnHndlg & High-Level Description

Refer FDD

Design details of software module

Graphical representation of ExcpnHndlg

Data Flow Diagram

Component level DFD

N/A

Function level DFD

N/A

Constant Data Dictionary

Program (fixed) Constants

Embedded Constants

Local Constants

Software Component Implementation

Sub-Module Functions

Init: ExcpnHndlgInit1

Design Rationale

Non-RTE function because it needs to be called before the OS is started - so that floating point exceptions can be enabled before anything uses floating point

Module Outputs

None

Init: ExcpnHndlgInit2

Design Rationale

RTE function to initialize all the NTCs to pass

Module Outputs

None

Per: ExcpnHndlgPer1

Design Rationale

RTE Periodic function called every 2 ms to check for OS errors

Store Module Inputs to Local copies

Refer MDD

(Processing of function)………

Triggered on Timing Event every 2ms

Store Local copy of outputs into Module Outputs

None

Server Runables

ChkForStrtUpTest

Design Rationale

Refer FDD

(Processing of function)………

Refer FDD

FeNmiClkMonr0RtLowrLimFlt

Design Rationale

Refer FDD

(Processing of function)………

Refer FDD

FeNmiClkMonr0RtUpprLimFlt

Design Rationale

Refer FDD

(Processing of function)………

Refer FDD

FeNmiClkMonr1RtLowrLimFlt

Design Rationale

Refer FDD

(Processing of function)………

Refer FDD

FeNmiClkMonr1RtUpprLimFlt

Design Rationale

Refer FDD

(Processing of function)………

Refer FDD

FeNmiClkMonr2RtLowrLimFlt

Design Rationale

Refer FDD

(Processing of function)………

Refer FDD

FeNmiClkMonr2RtUpprLimFlt

Design Rationale

Refer FDD

(Processing of function)………

Refer FDD

FeNmiClkMonr3RtLowrLimFlt

Design Rationale

Refer FDD

(Processing of function)………

Refer FDD

FeNmiClkMonr3RtUpprLimFlt

Design Rationale

Refer FDD

(Processing of function)………

Refer FDD

FeNmiDmaTrf

Design Rationale

Refer FDD

(Processing of function)………

Refer FDD

FeNmiDmaRegAcsProtnErr

Design Rationale

Refer FDD

(Processing of function)………

Refer FDD

FeNmiEcmMstChkrCmp

Design Rationale

Refer FDD

(Processing of function)………

Refer FDD

FeNmiOperModErrFlsProgmModStrtd

Design Rationale

Refer FDD

(Processing of function)………

Refer FDD

FeNmiOperModErrSngChipInactv

Design Rationale

Refer FDD

(Processing of function)………

Refer FDD

FeNmiOperModErrTestModStrtd

Design Rationale

Refer FDD

(Processing of function)………

Refer FDD

FeNmiPeg

Design Rationale

Refer FDD

(Processing of function)………

Refer FDD

FeNmiWdg

Design Rationale

Refer FDD

(Processing of function)………

Refer FDD

GetMcuDiagcIdnData

Design Rationale

Refer FDD

(Processing of function)………

Refer FDD

ProcMpuExcpnErr

Design Rationale

Refer FDD

(Processing of function)………

Refer FDD

ProcNonCritOsErr

Design Rationale

Refer FDD

(Processing of function)………

Refer FDD

ProcPrmntOsErr

Design Rationale

Refer FDD

(Processing of function)………

Refer FDD

ProcPrvlgdInstrExcpnErr

Design Rationale

Refer FDD

(Processing of function)………

Refer FDD

ProcUkwnExcpnErr

Design Rationale

Refer FDD

(Processing of function)………

Refer FDD

SetMcuDiagcIdnData

Design Rationale

Refer FDD

(Processing of function)………

Refer FDD

Interrupt Functions

AlgnErrIrq

Design Rationale

Refer FDD

(Processing of the ISR function)…..

Refer FDD

FpuErrIrq

Design Rationale

Refer FDD

(Processing of the ISR function)…..

Refer FDD

SysErrIrq

Design Rationale

Refer FDD

(Processing of the ISR function)…..

Refer FDD

ResdOperIrq

Design Rationale

Refer FDD

(Processing of the ISR function)…..

Refer FDD

Module Internal (Local) Functions

ProcStrtUpOrSwRst

Design Rationale

Refer FDD

Processing

ProcEcmRst

Design Rationale

Refer FDD

Processing

ProcPinRst

Design Rationale

Refer FDD

Processing

GLOBAL Function/Macro Definitions

<If these are numerous and defined in a separate source file then reference the source file only.>

GLOBAL Function #1

Design Rationale

processing

(Place flowchart/design for local function)

Known Limitations with Design

None

UNIT TEST CONSIDERATION

None

Abbreviations and Acronyms

Glossary

Note: Terms and definitions from the source “Nexteer Automotive” take precedence over all other definitions of the same term. Terms and definitions from the source “Nexteer Automotive” are formulated from multiple sources, including the following:

• ISO 9000

• ISO/IEC 12207

• ISO/IEC 15504

• Automotive SPICE® Process Reference Model (PRM)

• Automotive SPICE® Process Assessment Model (PAM)

• ISO/IEC 15288

• ISO 26262

• IEEE Standards

• SWEBOK

• PMBOK

• Existing Nexteer Automotive documentation

References