MtrCntrl_Integration_Manual

1 Dependencies 2

1.1 SWCs 2

1.2 Configuration Files to be provided by Integration Project 2

1.3 Functions to be provided by Integration Project 2

2 Configuration 3

2.1 Build Time Config 3

2.2 Generator Config 3

3 Integration 4

3.1 Global Data 4

3.2 Component Conflicts 4

3.3 Include Path 4

3.4 ADC2 Changes 4

3.5 Configurator Changes 4

3.5.1 DIO 4

3.5.2 Port 5

4 Runnable Scheduling 6

5 Memory Mapping 7

5.1 Mapping 7

5.2 Usage 7

6 Revision Control Log 8

Dependencies

SWCs

ModuleRequired Feature

Configuration Files to be provided by Integration Project

MtrCtrl_Cfg.h

Functions to be provided to Integration Project

PICurrCntrl_Per1()

TrqCogCancRefPer1()

Configuration

Build Time Config

ModulesNotes

PICurrentCntrl

TrqCanc

Optimization level greater than 3

Generator Config

ConstantNotesSWC
None

Integration

Global Data

The global symbols mapping done in MtrCtrl_Cfg.h.

Component Conflicts

None

Include Path

The “include” directory of this SWC needs to be included in the integration project include search path.

.

Configurator Changes

None

Runnable Scheduling

This section specifies the required runnable scheduling.

RunnableScheduling RequirementsTrigger
TrqCogCancRefPer1()Must be placed in the motor control ISR, after MtrPosCyclic (ISR)
PICurrCntrl_Per1()Must be placed in the motor control ISR after TrqCogCancRefPer1()Cyclic (ISR)
RunnableScheduling RequirementsTrigger
CurrParamComp_Init()RTE (init)
TrqCanc_InitMust be placed after CurrParamComp_InitRTE (init)
QuadDet_Per1Must run after TrqReasonable DiagnosticsRTE (2ms)
CurrCmd_Per1Must run after QuadDetRTE (2ms)
TrqCanc_Per1Must run after CurrCmd_Per1RTE (2ms)
PICurrCntrl_Per2()Must be placed after TrqCanc_Per1RTE (2ms)
CurrParamComp_Per1()Must be placed after PICurrCntrl_Per2RTE (2ms)
PeakCurrEst_Per1()Must be placed after PICurrCntrl_Per2RTE (2ms)

*Note: In motor control ISR include Ap_MtrCtrl.h instead of CDD_Func.h

Proper Initialization of input signals should occur before running each function for the first time. (CurrParamComp_Init).

Memory Mapping

Mapping

Memory SectionContentsNotes
RTE Memory mapping

* Each …START_SEC… constant is terminated by a …STOP_SEC… constant as specified in the AUTOSAR Memory Mapping requirements.

Usage

FeatureRAMROM
Full driver

Table 1: ARM Cortex R4 Memory Usage

RTE NvM Blocks

Block Name Size
Rte_Pim_CogTrqCal 512
Rte_Pim_CogTrqRplComp 9

Note : Size of the NVM block is changed.

Revision Control Log

Rev #Change DescriptionDateAuthor
1Initial version25-Mar-13Selva
2Updated TrqCanc_Init in RTE Runnables and size of the NVM block CogTrqCal is changed from 512 to 52121-Oct-13Selva
3Added new NVM block “Rte_Pim_CogTrqRplComp”23-Oct-13Selva
Last modified October 12, 2025: Initial commit (0347a62)