TrqReasonableness_Integration_Manual

1 Dependencies 2

1.1 SWCs 2

1.2 Global Functions(Non RTE) to be provided to Integration Project 2

2 Configuration 3

2.1 Build Time Config 3

2.2 Configuration Files to be provided by Integration Project 3

2.2.1 Da Vinci Parameter Configuration Changes 3

2.2.2 DaVinci Interrupt Configuration Changes 3

2.2.3 Manual Configuration Changes 3

3 Integration 4

3.1 Required Global Data Inputs 4

3.2 Required Global Data Outputs 4

3.3 Specific Include Path present 4

4 Runnable Scheduling 5

5 Memory Mapping 6

5.1 Mapping 6

5.2 Usage 6

5.3 Non RTE NvM Blocks 6

5.4 RTE NvM Blocks 6

6 Compiler Settings 6

6.1 Preprocessor MACRO 6

6.2 Optimization Settings 6

7 Revision Control Log 7

Dependencies

SWCs

ModuleRequired Feature
None

Note : Referencing the external components should be avoided in most cases. Only in unavoidable circumstance external components should be refered. Developer should track the references.

Global Functions(Non RTE) to be provided to Integration Project

None

Configuration

Build Time Config

ModulesNotes
None

Configuration Files to be provided by Integration Project

Ap_TqRsDg_Cfg.h generated by Ap_TqRsDg_Cfg.h.tt

Da Vinci Parameter Configuration Changes

ParameterNotesSWC
TqRsDgGeneral/TqRsDgCPEnableTo enable checkpointsTqRsDg

DaVinci Interrupt Configuration Changes

ISR NameVIM #Priority DependencyNotes
None

Manual Configuration Changes

ConstantNotesSWC
None

Integration

Required Global Data Inputs

DervLambdaAlphaDiag_Volt_f32
DervLambdaBetaDiag_Volt_f32
OutputRampMult_Uls_f32
TrqLimitMin_MtrNm_f32

Required Global Data Outputs

Specific Include Path present

No

Runnable Scheduling

This section specifies the required runnable scheduling.

InitScheduling RequirementsTrigger
TqRsDg _Init1Called from RTE before any call to the periodic functionsRTE init
RunnableScheduling RequirementsTrigger
TqRsDg_Per1

Must run after CmMtrCurr_Per2

and before CurrCmd_Per1

RTE (2ms)

.

Memory Mapping

Mapping

Memory SectionContentsNotes
TQRSDG_START_SEC_VAR_CLEARED_32
TQRSDG_START_SEC_VAR_NOINIT_UNSPECIFIED
TQRSDG_START_SEC_VAR_CLEARED_16
RTE_START_SEC_AP_TQRSDG_APPL_CODE

* Each …START_SEC… constant is terminated by a …STOP_SEC… constant as specified in the AUTOSAR Memory Mapping requirements.

Usage

Table 1: ARM Cortex R4 Memory Usage

FeatureRAMROM
<Memmap usuage info>

Non RTE NvM Blocks

Block Name
None

Note : Size of the NVM block if configured in developer

RTE NvM Blocks

Block Name

Note : Size of the NVM block if configured in developer

Compiler Settings

Preprocessor MACRO

None

Optimization Settings

None.

Revision Control Log

Rev #Change DescriptionDateAuthor
1Initial version10-Apr-13Selva
2Updated for the new torque reasonableness23-Nov-13Selva
Last modified October 12, 2025: Initial commit (0347a62)